Clifford Wolf
bc541b47ea
Improved performance of freduce input cone reduction
2014-01-04 13:10:51 +01:00
Clifford Wolf
b791af174e
Improved freduce performance on const signals
2014-01-04 00:06:36 +01:00
Clifford Wolf
10f45b8c8e
Performance improvements in freduce pass
2014-01-03 21:29:28 +01:00
Clifford Wolf
c44e1bec6d
More freduce cleanups
2014-01-03 18:17:28 +01:00
Clifford Wolf
03f0ab9de2
Cleanups in freduce command
2014-01-03 17:50:39 +01:00
Clifford Wolf
8a8d444648
Tiny cleanup in proc_mux.cc
2014-01-03 16:54:59 +01:00
Clifford Wolf
60fbca9970
Added "splitnets -driver"
2014-01-03 14:01:06 +01:00
Clifford Wolf
bf5e5429c1
Use selection in freduce command
2014-01-03 13:15:11 +01:00
Clifford Wolf
c3e9f0712f
Another small freduce cleanup/bugfix
2014-01-03 12:34:18 +01:00
Clifford Wolf
914e208aa3
Added "connect" command
2014-01-03 12:33:00 +01:00
Clifford Wolf
67d155078d
More freduce cleanups and bugfixes
2014-01-03 02:44:05 +01:00
Clifford Wolf
fb2bf934dc
Added correct handling of $memwr priority
2014-01-03 00:22:17 +01:00
Clifford Wolf
536e20bde1
Fixed more complex undef cases in freduce
2014-01-02 23:40:20 +01:00
Clifford Wolf
5a0f561d9c
Now */ is optional in */<mode>:<arg> selections
2014-01-02 20:35:37 +01:00
Clifford Wolf
456ae31a8a
Added "rename -hide" command
2014-01-02 20:23:34 +01:00
Clifford Wolf
0759c97748
More "freduce" related fixes and improvements
2014-01-02 19:37:34 +01:00
Clifford Wolf
ced4d7b321
Added support for module->connections to select %ci, %co and %x handling
2014-01-02 18:44:24 +01:00
Clifford Wolf
c6b33f81eb
Some cleanups in freduce -inv mode (and switched from -noinv to -inv)
2014-01-02 18:11:01 +01:00
Clifford Wolf
249ef8695a
Major rewrite of "freduce" command
2014-01-02 16:52:33 +01:00
Clifford Wolf
e09ebf475c
Fixed use of limited length buffer in ABC blif parser
2013-12-31 21:58:35 +01:00
Clifford Wolf
4892a3ce6d
Added abc -dff and -clk support
2013-12-31 21:25:09 +01:00
Clifford Wolf
be5dab87fd
Now using BLIF as ABC input format
2013-12-31 14:29:29 +01:00
Clifford Wolf
c616802ac7
Always use BLIF as ABC output format
2013-12-31 13:41:16 +01:00
Clifford Wolf
bf607df6d5
Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)
2013-12-29 17:39:49 +01:00
Clifford Wolf
fe8ec32a1c
Added new cell types to manual
2013-12-28 12:10:32 +01:00
Clifford Wolf
c69c416d28
Added $bu0 cell (for easy correct $eq/$ne mapping)
2013-12-28 12:02:14 +01:00
Clifford Wolf
7f71787599
Added sat -prove-x and -set-def-inputs
2013-12-28 11:24:36 +01:00
Clifford Wolf
bd39263796
Improved $_MUX_ handling in opt_const
2013-12-28 10:30:31 +01:00
Clifford Wolf
d81e3ed3ae
More conservastive $eq/$ne/$eqx/$nex opt_const code
2013-12-28 10:29:22 +01:00
Clifford Wolf
c9699fe76d
More $eq/$ne/$eqx/$nex fixes in opt_const
2013-12-27 15:18:14 +01:00
Clifford Wolf
7b02a44efb
Fixed/improved opt_const $eq/$ne/$eqx/$nex handling
2013-12-27 14:21:24 +01:00
Clifford Wolf
369bf81a70
Added support for non-const === and !== (for miter circuits)
2013-12-27 14:20:15 +01:00
Clifford Wolf
11ffa78677
Added sat -set-def/-set-*-undef support
2013-12-27 13:27:21 +01:00
Clifford Wolf
fb31d10236
Renamed sat -set-undef to -set-any-undef
2013-12-27 13:02:46 +01:00
Clifford Wolf
334b0cc803
Fixed dfflibmap for unused output ports
2013-12-21 20:47:22 +01:00
Clifford Wolf
8856cec308
Now prefer smallest cells in dfflibmap
2013-12-21 08:42:37 +01:00
Clifford Wolf
1fb29050e5
Cleanup of dfflibmap cellmap exploration code
2013-12-20 14:21:18 +01:00
Clifford Wolf
eaf7d9675d
Further improved dfflibmap cellmap exploration
2013-12-20 12:34:34 +01:00
Clifford Wolf
404bcc2d1e
Fixed dfflibmap endless-loop bug
2013-12-20 12:13:51 +01:00
Clifford Wolf
c904f5e197
Prefer non-inverted clocks in dfflibmap
2013-12-19 13:21:57 +01:00
Clifford Wolf
2b90ba1e96
Added sat -max_undef feature
2013-12-07 23:58:55 +01:00
Clifford Wolf
8a815ac741
Added "sat" undef support and "sat -set-init" options
2013-12-07 17:28:51 +01:00
Clifford Wolf
5de57e9970
Fixed compiler warining in passes/sat/eval.cc
2013-12-07 16:19:24 +01:00
Clifford Wolf
325b764341
Added eval -set-undef and eval -table
2013-12-07 11:58:22 +01:00
Clifford Wolf
06d96e8fcf
Fixes in fsm detect/extract for better detection of non-fsm circuits
2013-12-06 12:53:20 +01:00
Clifford Wolf
f4b46ed31e
Replaced signed_parameters API with CONST_FLAG_SIGNED
2013-12-04 14:24:44 +01:00
Clifford Wolf
93a70959f3
Replaced RTLIL::Const::str with generic decoder method
2013-12-04 14:14:05 +01:00
Clifford Wolf
6e227e3666
Fixed submod for non-primitive cells
2013-12-02 12:53:55 +01:00
Clifford Wolf
e881878341
Fixed submod for non-cleaned designs
2013-12-02 12:18:07 +01:00
Clifford Wolf
97efc2ed5f
A fix in memory_dff for write ports with static addresses
2013-12-01 14:08:18 +01:00
Clifford Wolf
7295b25955
Progress on AppNote 011
2013-11-29 16:42:49 +01:00
Clifford Wolf
c60aaf8fa3
Added pattern support to "ls" command
2013-11-28 21:34:41 +01:00
Clifford Wolf
293356e87c
Improved ID matching scheme in select (and thus for all commands)
2013-11-28 21:13:16 +01:00
Clifford Wolf
792bbad448
Fixes and improvements in "show" command
2013-11-28 21:02:19 +01:00
Clifford Wolf
0e52f3fa01
Added "src" attribute to processes
2013-11-28 17:37:50 +01:00
Clifford Wolf
5af7f4db72
Added support for "show -pause" and "show -format dot"
2013-11-28 13:35:28 +01:00
Clifford Wolf
38e7fa6530
Tighter integration of ABC build
2013-11-27 09:08:35 +01:00
Clifford Wolf
bc3cc88719
Started implementing undef support in "sat" command
2013-11-25 21:40:00 +01:00
Clifford Wolf
3d95047ce2
Bugfixes in new "stat" command
2013-11-25 21:08:34 +01:00
Clifford Wolf
4c7d6e63ec
Added "stat" command
2013-11-25 20:43:57 +01:00
Clifford Wolf
61412d167f
Improvements in satgen undef handling
2013-11-25 16:50:45 +01:00
Clifford Wolf
bd65e67d8a
Improvements in satgen undef handling
2013-11-25 15:12:01 +01:00
Clifford Wolf
8c3f4b3957
Started implementing undef handling in satgen
2013-11-25 04:51:33 +01:00
Clifford Wolf
76f7c10cfc
Using simplemap mappers from techmap
2013-11-24 23:31:14 +01:00
Clifford Wolf
3ee33cbdaf
Added simplemap pass
2013-11-24 22:52:30 +01:00
Clifford Wolf
8dafecd34d
Added module->avail_parameters (for advanced techmap features)
2013-11-24 20:29:07 +01:00
Clifford Wolf
4011d47646
Added techmap -D and -I options
2013-11-24 20:04:48 +01:00
Clifford Wolf
20175afd29
Added "techmap -share_map" option
2013-11-24 19:50:25 +01:00
Clifford Wolf
f71e27dbf1
Remove auto_wire framework (smarter than the verilog standard)
2013-11-24 17:29:11 +01:00
Clifford Wolf
609caa23b5
Implemented correct handling of signed module parameters
2013-11-24 17:17:21 +01:00
Clifford Wolf
72b35e0b99
Fixed "flatten" top-module detection: Only use on fully selected designs
2013-11-24 14:10:46 +01:00
Clifford Wolf
28093d9dd2
Added "top" attribute to mark top module in hierarchy
2013-11-24 05:03:43 +01:00
Clifford Wolf
5f9c7fc6ea
Improved handling of techmap special wires
2013-11-23 16:49:58 +01:00
Clifford Wolf
532091afcb
Added more generic _TECHMAP_ wire mechanism to techmap pass
2013-11-23 15:58:06 +01:00
Clifford Wolf
295e352ba6
Renamed "placeholder" to "blackbox"
2013-11-22 15:01:12 +01:00
Clifford Wolf
1c4a6411af
Updated abc
2013-11-21 22:39:10 +01:00
Clifford Wolf
09471846c5
Major improvements in mem2reg and added "init" sync rules
2013-11-21 13:49:00 +01:00
Clifford Wolf
84ced2bb8e
Fixed a bug in "add -global_input"
2013-11-21 03:01:20 +01:00
Clifford Wolf
64a5f8f75e
Added "proc_arst -global_arst" feature
2013-11-20 21:00:43 +01:00
Clifford Wolf
2279b2a196
Added "add" command (only wires for now)
2013-11-20 19:37:40 +01:00
Clifford Wolf
63285b300c
Renamed temp module generated by "abc" pass from "logic" to "netlist"
2013-11-19 01:03:57 +01:00
Clifford Wolf
a694324a75
Fixed abc pass blif parser for constant bits
2013-11-13 15:46:28 +01:00
Clifford Wolf
e5b974fa2a
Cleanups and bugfixes in response to new internal cell checker
2013-11-11 00:39:45 +01:00
Clifford Wolf
378cc509cd
Call internal checker more often
2013-11-10 23:24:21 +01:00
Clifford Wolf
223892ac28
Improved user-friendliness of "sat" and "eval" expression parsing
2013-11-09 12:02:27 +01:00
Clifford Wolf
18f9477e95
Added verification of SAT model to "eval -vloghammer_report" command
2013-11-09 11:38:17 +01:00
Clifford Wolf
b04051a0e2
Fixed keep attribute on wires in opt_clean
2013-11-08 05:20:15 +01:00
Clifford Wolf
947bd9b96b
Renamed extend_un0() to extend_u0() and use it in genrtlil
2013-11-07 18:17:10 +01:00
Clifford Wolf
0e1661f84e
Fixed type of sign extension in opt_const $eq/$ne handling
2013-11-07 16:53:28 +01:00
Clifford Wolf
db42a8f89b
Fixed $eq/$ne bitwise optimization in opt_const
2013-11-07 11:54:59 +01:00
Clifford Wolf
f485962c5e
Added handling of unconnected/unspecified signals to eval -vloghammer_report
2013-11-06 22:42:07 +01:00
Clifford Wolf
031a91dc94
Added correct RTL undef handling to eval vloghammer mode
2013-11-06 13:16:47 +01:00
Clifford Wolf
f94266bb42
Added eval -vloghammer_report mode
2013-11-06 04:14:56 +01:00
Clifford Wolf
1d34fd7608
Added support for "keep" attributes on wires
2013-11-05 15:52:29 +01:00
Clifford Wolf
eab536a203
Merge branch 'master' of github.com:cliffordwolf/yosys
2013-11-03 21:13:21 +01:00
Clifford Wolf
f7f0af6f9c
Added resolution of positional arguments to hierarchy pass
2013-11-03 09:42:51 +01:00
Clifford Wolf
0efe16f118
Added placeholder check to dfflibmap and cleaned up some other placeholder checks
2013-10-31 12:27:07 +01:00
Clifford Wolf
b8bfa020fa
Added detection for endless recursion in fsm_detect pass
2013-10-30 00:47:58 +01:00
Clifford Wolf
888c43210b
Fixed help message typo (memory pass)
2013-10-30 00:47:31 +01:00
Clifford Wolf
613750155d
Added -format option to splitnets
2013-10-29 11:01:04 +01:00
Clifford Wolf
ceb971eab9
Added support for i/o buffers to iopadmap
2013-10-26 22:27:40 +02:00
Clifford Wolf
dd56004fc0
Added support for sr flip-flops to dfflibmap
2013-10-24 18:20:06 +02:00
Clifford Wolf
628b994cf6
Added support for complex set-reset flip-flops in proc_dff
2013-10-24 16:54:05 +02:00
Clifford Wolf
e679a5d046
Fixed handling of boolean attributes (passes)
2013-10-24 11:37:54 +02:00
Clifford Wolf
d61699843f
Improved handling of dff with async resets
2013-10-21 14:51:58 +02:00
Clifford Wolf
56ea230676
Added handling of multiple async paths in proc_arst
2013-10-19 00:50:13 +02:00
Clifford Wolf
bfa1a65fa9
Added dffsr support to proc_dff pass
2013-10-18 13:26:52 +02:00
Clifford Wolf
9bc703b964
Improved way of connecting ports in techmap pass
2013-10-17 22:19:38 +02:00
Clifford Wolf
8cc53ef72c
Only prefer connected signals iff they have public names
2013-10-17 22:10:55 +02:00
Clifford Wolf
95dbacefbf
Fixed bug in synthesis of memories that are never written
2013-10-17 21:00:37 +02:00
Clifford Wolf
c20571ca5e
Avoid re-arranging signals on register outputs
2013-10-17 20:48:40 +02:00
Clifford Wolf
f5c0ed6c79
Fixed detection of major wires in opt_clean
2013-10-17 02:41:59 +02:00
Clifford Wolf
96e7abad48
Added iopadmap pass
2013-10-16 16:16:06 +02:00
Clifford Wolf
b6db2d9b33
Moved dfflibmap from passes/dfflibmap to passes/techmap
2013-10-16 15:32:26 +02:00
Clifford Wolf
845590aa8e
Fixed parsing or liberty file statements such as 'clocked_on : "(!CLK)";'
...
Patch by Tim Edwards
2013-10-16 06:32:35 +02:00
Clifford Wolf
288ba9618a
Moved common techlib files to techlibs/common
2013-09-15 11:52:57 +02:00
Clifford Wolf
f8107ab7fc
Some minor documentation fixes
2013-08-21 12:16:44 +02:00
Clifford Wolf
1af1cebb64
Minor fixes in abc build instructions and abc pass
2013-08-20 09:46:05 +02:00
Clifford Wolf
2f3da54f26
Added sat -ignore_div_by_zero switch
2013-08-15 11:40:01 +02:00
Clifford Wolf
d0e93e04d1
Added eval -brute_force_equiv_checker_x mode
2013-08-15 11:09:30 +02:00
Clifford Wolf
a5836af172
Added "clean -purge" and ";;;" support
2013-08-11 13:59:14 +02:00
Clifford Wolf
080f0aac34
Added ";;" as shortcut for "; clean;"
2013-08-11 13:33:38 +02:00
Clifford Wolf
6068b8902f
freduce performance fix
2013-08-10 15:03:13 +02:00
Clifford Wolf
376150c926
Added techmap -opt mode
2013-08-09 15:20:22 +02:00
Clifford Wolf
05483619f0
Some fixes to improve determinism
2013-08-09 12:42:32 +02:00
Clifford Wolf
d97782b848
Sort ctrl signals in fsm_extract
2013-08-08 15:46:00 +02:00
Clifford Wolf
6a40e46a04
Added -try option to freduce pass
2013-08-08 10:56:27 +02:00
Clifford Wolf
8cd153612e
Added "clean" command (less verbose opt_clean)
2013-08-08 10:53:37 +02:00
Clifford Wolf
56e01ce389
Fixed topological ordering in freduce pass
2013-08-07 19:38:19 +02:00
Clifford Wolf
e729857647
Improved handling of private names in opt_clean and rename commands
2013-08-07 18:39:49 +02:00
Clifford Wolf
653750faac
Small bugfixes in freduce pass
2013-08-06 15:53:09 +02:00
Clifford Wolf
6efca9ea5a
Added freduce command
2013-08-06 15:04:52 +02:00
Clifford Wolf
0f38008ed3
Added "design" command (-reset, -save, -load)
2013-07-27 14:27:51 +02:00
Clifford Wolf
88d0829d65
Automatically run "proc" on extract map files
2013-07-24 20:19:08 +02:00
Clifford Wolf
ad9bbcbf40
Added $lut cells and abc lut mapping support
2013-07-23 16:19:34 +02:00
Clifford Wolf
a9fefc6ce1
Bugfixes for empty signal vectors
2013-07-10 12:52:29 +02:00
Clifford Wolf
cf885c4a28
Added opt_clean -purge option
2013-07-07 12:59:30 +02:00
Clifford Wolf
0c0197cf45
Fixed handling of $eq and $ne in opt_const
2013-07-07 12:59:00 +02:00
Clifford Wolf
101491132f
Added SAT support for -all/-max with -verify
2013-06-23 13:28:30 +02:00
Clifford Wolf
46b177eb8a
Merge branch 'master' of github.com:cliffordwolf/yosys
2013-06-20 12:49:28 +02:00
Clifford Wolf
8fbb5b6240
Added timout functionality to SAT solver
2013-06-20 12:49:10 +02:00
Clifford Wolf
a6aeb3dbf0
Added renaming of wires and cells to "rename" command
2013-06-19 16:55:43 +02:00
Clifford Wolf
21e38bed98
Added "eval" pass
2013-06-19 09:30:37 +02:00
Clifford Wolf
48aa72ae8f
Added splitnets command
2013-06-18 17:11:36 +02:00
Clifford Wolf
c09b66b2a1
Added support for "assign" statements in abc vlparse
2013-06-15 13:50:38 +02:00
Clifford Wolf
6d7b5f9064
Fixed even more ConstEval bugs found using xsthammer
2013-06-14 17:50:26 +02:00
Clifford Wolf
30db70b1ba
Added consteval testing to xsthammer and fixed bugs
2013-06-13 19:51:13 +02:00
Clifford Wolf
7f6c83a853
More xsthammer improvements (using xst 14.5 now)
2013-06-13 17:23:51 +02:00
Clifford Wolf
a42dd4549b
Added "scatter" command
2013-06-12 14:41:33 +02:00
Clifford Wolf
49293a182d
Renamed yosys-show temp files to be dot-files in the users home directory
2013-06-12 10:42:59 +02:00
Clifford Wolf
7d790febb0
Improvements and fixes in SAT code
2013-06-10 16:09:29 +02:00
Clifford Wolf
95e937438f
Added "rename" command
2013-06-10 12:37:22 +02:00
Clifford Wolf
08e2fa978c
Renamed "sat_solve" pass to "sat"
2013-06-09 21:55:53 +02:00
Clifford Wolf
a75b249427
Implemented temporal induction proofs in sat_solve
2013-06-09 18:07:05 +02:00
Clifford Wolf
b210234612
Added support for non-temporal proofs to sat_solve
2013-06-09 16:30:37 +02:00
Clifford Wolf
1349b845e3
Re-organization in sat_solver pass for temporal induction
2013-06-09 15:49:32 +02:00
Clifford Wolf
41932e8b64
Added ezSAT api support for don't care values in models
2013-06-09 14:21:18 +02:00
Clifford Wolf
b7ba90910d
Fixed handling of $_XOR_ in SAT generator
2013-06-09 14:01:50 +02:00
Clifford Wolf
0efde13775
Added sequential solving support to sat_solve
2013-06-09 13:35:46 +02:00
Clifford Wolf
bf59a28f80
Look for yosys-abc and yosys-svgviewer where the main exe is
2013-06-09 00:07:26 +02:00
Clifford Wolf
6c8a424872
Added "make abc" and "make install-abc"
2013-06-08 23:48:19 +02:00
Clifford Wolf
5a592b3739
Moved cmds from kernel/ to passes/cmds/
2013-06-08 23:16:36 +02:00
Clifford Wolf
4b7f070b69
Fixed typo is sat_solve help msg
2013-06-08 15:36:32 +02:00
Clifford Wolf
23a7973094
Added support for shifter cells to SAT generator
2013-06-08 15:12:08 +02:00
Clifford Wolf
1434312fdd
Various improvements in sat_solve pass and SAT generator
2013-06-08 14:11:50 +02:00
Clifford Wolf
99957a825f
Added -all and -max options to sat_solve
2013-06-08 12:17:30 +02:00
Clifford Wolf
c681c17038
Improved auto-detection of -show signals in sat_solve
2013-06-08 09:34:36 +02:00
Clifford Wolf
56b593b91c
Improved sat generator and sat_solve pass
2013-06-07 14:37:33 +02:00
Clifford Wolf
46fbe9d262
Added SAT generator and simple sat_solve command
2013-06-07 13:59:13 +02:00
Clifford Wolf
c32b918681
Renamed opt_rmunused to opt_clean
2013-06-05 07:07:31 +02:00
Clifford Wolf
5f2c5f9017
Fixed techmap/flatten for positional module arguments
2013-05-26 12:21:17 +02:00
Clifford Wolf
b11d9408d9
Improved log messages generated by hierarchy pass
2013-05-26 12:20:51 +02:00
Clifford Wolf
cc587fb5f3
Added -nodetect option to fsm pass
2013-05-24 15:34:25 +02:00
Clifford Wolf
66bc46b30b
Improved FSM one-hot encoding, added binary encoding
2013-05-24 14:39:19 +02:00
Clifford Wolf
ccd2a93439
Added log_abort() api
2013-05-24 12:32:06 +02:00
Clifford Wolf
585fcace10
Fixed a gcc vs. clang determinism problem in abc pass
2013-05-23 16:17:23 +02:00
Clifford Wolf
f674150f1c
Fixed memory corruption bug in opt_rmunused
2013-05-23 13:19:28 +02:00
Clifford Wolf
e04d88cf22
Added missing newline to some error messages
2013-05-23 11:19:33 +02:00
Clifford Wolf
3b8882ae49
Some improvements in opt_rmdff
2013-05-23 07:48:18 +02:00
Clifford Wolf
3ecc314238
Fixed to aggressive x-folding in opt_const
2013-05-17 14:55:18 +02:00
Clifford Wolf
83c743f717
Added support for const cell inputs in techmap
2013-04-27 18:30:29 +02:00
Clifford Wolf
b1cb4d7871
Added "flatten" pass
2013-04-26 14:40:45 +02:00
Clifford Wolf
94744ac7b0
Fixed hierarchy pass for hierarchies of parametric modules
2013-04-26 13:28:15 +02:00
Clifford Wolf
6626aad29a
Added "submod -name ..." support
2013-04-15 11:58:24 +02:00
Clifford Wolf
c6198ea5a8
Fixed a bug in opt_const when optimizing 1-bit compares with constants
2013-04-13 21:18:24 +02:00
Johann Glaser
7ef245aa7d
fsm_export: optionally use binary state encoding as state names instead of
...
s0, s1, ...
2013-04-05 15:34:40 +02:00
Johann Glaser
9714072b28
fsm_export: specify KISS filename on command line
2013-04-05 11:17:49 +02:00
Clifford Wolf
88af5b6a16
Improved opt_share for reduce cells
2013-03-29 11:19:21 +01:00
Clifford Wolf
0d48b846ac
Improved opt_share for commutative standard cells
2013-03-29 11:01:26 +01:00
Clifford Wolf
8edf4f378a
Added proper TECHMAP_FAIL support and added support for the celltype attribute in the map file
2013-03-28 10:12:50 +01:00
Clifford Wolf
7bfc7b61a8
Implemented proper handling of stub placeholder modules
2013-03-28 09:20:10 +01:00
Clifford Wolf
9c401b58a2
Added yosys-svgviewer to build system and renamed filterlib to yosys-filterlib
2013-03-27 10:51:15 +01:00
Clifford Wolf
6a231816fa
Collect parameters in hierarchy -generate (and do nothing with them)
2013-03-26 19:11:53 +01:00
Clifford Wolf
227520f94d
Added nosync attribute and some async reset related fixes
2013-03-25 17:13:14 +01:00
Clifford Wolf
0f5378b559
Improved method for finding fsm_expand candidates
2013-03-25 02:24:11 +01:00
Clifford Wolf
4a7d624bef
Added hierarchy -generate command for generating skeletton modules
2013-03-25 02:14:33 +01:00
Clifford Wolf
4bd6f1ee8e
Changed fsm_expand to merge multiplexers more aggressively
2013-03-24 17:59:44 +01:00
Clifford Wolf
8d37d1e08b
Added -nomap option to memory pass
2013-03-21 09:11:06 +01:00
Clifford Wolf
9f10acb840
added optimizations for single-bit $eq/$ne with constant input to opt_const
2013-03-19 13:33:33 +01:00
Clifford Wolf
d8a7fa6b67
improved $mux optimization in opt_const
2013-03-19 13:32:39 +01:00
Clifford Wolf
b7fcf1fb9a
keep $mux and $_MUX_ optimizations separate in opt_const
2013-03-19 13:32:04 +01:00
Johann Glaser
69674652c5
added one more suggestion to optimize MUXes in pass "opt_const"
2013-03-18 22:06:16 +01:00
Johann Glaser
a4e2c887f1
also optimize single-bit "$mux" cells in pass "opt_const", added suggestions
...
for more optimizations
2013-03-18 22:05:21 +01:00
Clifford Wolf
020a35d11e
Removed date from auto-generated passes/techmap/stdcells.inc
2013-03-18 07:32:33 +01:00
Clifford Wolf
52914c2e68
Fixed abc eeror handling
2013-03-18 07:31:59 +01:00
Johann Glaser
3b8ebd694d
add header to autogenerated file on its origin
2013-03-18 07:28:31 +01:00
Johann Glaser
cd8008bda0
fixed typos
2013-03-18 07:28:31 +01:00
Clifford Wolf
ba3793b642
Fixed strerrno vs. strerror types in ABC pass
2013-03-17 09:28:58 +01:00
Clifford Wolf
1390de4b74
Cleaned up ABC file/io error handling
2013-03-17 09:17:18 +01:00
Johann Glaser
0cb4a5936f
added error checking at execution of ABC
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2013-03-17 09:06:03 +01:00
Johann Glaser
fb494d4dd7
corrected typos
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2013-03-17 09:06:02 +01:00
Clifford Wolf
35b4a2c553
Fixed gcc warnings and added error handling to shell escape
2013-03-15 10:29:25 +01:00
Clifford Wolf
cd5767d61b
Added scc pass (find logic loops)
2013-03-15 10:24:08 +01:00
Clifford Wolf
10956cb84a
Added [[CITE]] tags to abc and fsm_extract passes
2013-03-15 10:23:02 +01:00
Clifford Wolf
55f927eecb
Fixed detection of public wires in opt_rmunused
2013-03-10 14:20:03 +01:00
Clifford Wolf
b96ffed69b
Automatically select new objects in abc and techmap passes
2013-03-08 09:16:25 +01:00
Clifford Wolf
ef4f1c55b6
Split extract -attr into extract -cell_attr and -wire_attr
2013-03-08 08:19:24 +01:00
Clifford Wolf
bf3a3b9589
Added support for attribute matching in extract pass
2013-03-07 18:51:17 +01:00
Clifford Wolf
4347423ca6
Changed default value for extract -mine_cells_span
2013-03-05 21:52:57 +01:00
Clifford Wolf
29c17fddf5
Implemented -mine_split option to extract pass
2013-03-05 13:50:31 +01:00
Clifford Wolf
334fd03e1c
Implemented much better #x select operator
2013-03-05 12:53:40 +01:00
Clifford Wolf
efbb89de1a
Implemented extract -mine_max_fanout <num> option
2013-03-03 23:48:00 +01:00
Clifford Wolf
bc8d94b4ae
Added "shared nodes" feature to the subcircuit library
2013-03-03 21:19:55 +01:00
Clifford Wolf
3ebc365c09
Added support for "extract_order" attribute to extract pass
2013-03-03 21:10:27 +01:00
Clifford Wolf
d4680fd5a0
Added design->select() api and use it in extract pass
2013-03-03 20:53:24 +01:00
Clifford Wolf
45bfe26f5f
Minor hotfixes (mostly gcc build fixes)
2013-03-03 13:18:37 +01:00
Clifford Wolf
65e5e1658c
Added library support to celltypes class and show pass
2013-03-03 10:36:23 +01:00
Clifford Wolf
4fcb9a7b99
Implemented general handler for selection arguments
2013-03-03 10:05:37 +01:00
Clifford Wolf
5bed90ae3a
Finished "extract -mine" feature
2013-03-02 18:57:14 +01:00
Clifford Wolf
23eb0ba8bc
Added -mine option to extract pass (not finished)
2013-03-02 16:22:37 +01:00
Clifford Wolf
a338d1a082
Added help messages for fsm_* passes
2013-03-01 12:35:12 +01:00
Clifford Wolf
f3a849512f
Added help messages to memory_* passes
2013-03-01 10:17:35 +01:00
Clifford Wolf
f952309c81
Added help messages to proc_* passes
2013-03-01 09:26:29 +01:00
Clifford Wolf
36954471a6
Added help messages for opt_* passes
2013-03-01 09:01:49 +01:00
Clifford Wolf
7fccad92f7
Added more help messages
2013-03-01 00:36:19 +01:00
Clifford Wolf
af561800ed
Added online help for "show" and "hierarchy" commands
2013-02-28 13:59:49 +01:00
Clifford Wolf
6ac41b2bb1
Added help for command line options
2013-02-28 13:13:56 +01:00
Clifford Wolf
cb592504f4
Added more help messages (extract, abc, dfflibmap)
2013-02-28 11:14:59 +01:00
Clifford Wolf
c3cc9839a9
Added port swapping and compatible types to "extract" pass
2013-02-28 10:00:42 +01:00
Clifford Wolf
08c43f27af
Added "extract -constports" feature
2013-02-27 23:39:10 +01:00
Clifford Wolf
500786af55
Fixed "extract" pass for non-optimized needles
2013-02-27 23:19:30 +01:00
Clifford Wolf
1bbc2b34c8
Added support for simple gates with one constant input to opt_const
2013-02-27 18:00:01 +01:00
Clifford Wolf
da3d55a29c
Added extract -verbose and -map ilang support
2013-02-27 17:26:32 +01:00
Clifford Wolf
f28b6aff40
Implemented basic functionality of "extract" pass
2013-02-27 16:27:20 +01:00
Clifford Wolf
c59d77aa30
Added support for constant signals in "extract" pass
2013-02-27 13:35:30 +01:00
Clifford Wolf
b02e140030
Added "extract" pass (not functional yet)
2013-02-27 13:25:18 +01:00
Clifford Wolf
a321a5c412
Moved stand-alone libs to libs/ directory and added libs/subcircuit
2013-02-27 09:32:19 +01:00
Martin Schmölzer
5a005cefe2
"fsm_export" pass: fix KISS file generation.
...
The KISS file format now follows the conventions specified in
"Logic Synthesis and Optimization Benchmarks User Guide", Version 3.0
by Saeyang Yang.
This change ensures interoperability with the "trfsmgen" program by Johann
Glaser.
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2013-02-23 18:22:19 +01:00
Martin Schmölzer
4f6cda502d
Add support for "fsm_export" synthesis attributes to fsm_export pass.
...
This allows to specify the file name for exported files directly in the HDL
source via the fsm_export=... attribute on the FSM state register.
Verilog example:
(* fsm_export="my_fsm.kiss2" *)
reg [3:0] state;
The fsm_export pass now also accepts the option "-noauto". This causes only
FSMs with the fsm_export attribute to be exported, any other FSMs are ignored.
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
2013-01-08 09:43:35 +01:00
Clifford Wolf
a7988c01af
Copy attributes from state signal to fsm cell
2013-01-05 11:44:47 +01:00
Clifford Wolf
6543917fb8
added .gitignore files
2013-01-05 11:19:11 +01:00
Clifford Wolf
7764d0ba1d
initial import
2013-01-05 11:13:26 +01:00