riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Changed fsm_expand to merge multiplexers more aggressively

This commit is contained in:
Clifford Wolf 2013-03-24 17:59:44 +01:00
parent d9bc024d29
commit 4bd6f1ee8e
1 changed files with 4 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
passes/fsm/fsm_expand.cc
View File

@ -42,6 +42,9 @@ struct FsmExpand
bool is_cell_merge_candidate(RTLIL::Cell *cell)
{
if (cell->type == "$mux" || cell->type == "$pmux" || cell->type == "$safe_pmux")
return cell->connections.at("\\A").width < 2;
RTLIL::SigSpec new_signals;
if (cell->connections.count("\\A") > 0)
new_signals.append(assign_map(cell->connections["\\A"]));
@ -137,7 +140,7 @@ struct FsmExpand
input_sig.sort_and_unify();
input_sig.remove_const();
assert(input_sig.width <= 4);
assert(input_sig.width <= 4 || cell->type == "$mux" || cell->type == "$pmux" || cell->type == "$safe_pmux");
std::vector<RTLIL::Const> truth_tab;
for (int i = 0; i < (1 << input_sig.width); i++) {