Another small freduce cleanup/bugfix

This commit is contained in:
Clifford Wolf 2014-01-03 12:34:18 +01:00
parent 914e208aa3
commit c3e9f0712f
1 changed files with 2 additions and 1 deletions

View File

@ -482,7 +482,8 @@ struct FreduceWorker
RTLIL::Cell *drv = drivers.at(grp[i].bit).first;
RTLIL::Wire *dummy_wire = module->new_wire(1, NEW_ID);
for (auto &port : drv->connections)
sigmap(port.second).replace(grp[i].bit, dummy_wire, &port.second);
if (ct.cell_output(drv->type, port.first))
sigmap(port.second).replace(grp[i].bit, dummy_wire, &port.second);
if (grp[i].inverted)
{