mirror of https://github.com/YosysHQ/yosys.git
Improved FSM one-hot encoding, added binary encoding
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ed0e2f7a6f
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66bc46b30b
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@ -56,6 +56,7 @@ struct FsmPass : public Pass {
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log(" -expand, -norecode, -export, -nomap\n");
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log(" enable or disable passes as indicated above\n");
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log("\n");
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log(" -encoding tye\n");
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log(" -fm_set_fsm_file file\n");
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log(" passed through to fsm_recode pass\n");
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log("\n");
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@ -67,6 +68,7 @@ struct FsmPass : public Pass {
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bool flag_expand = false;
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bool flag_export = false;
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std::string fm_set_fsm_file_opt;
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std::string encoding_opt;
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log_header("Executing FSM pass (extract and optimize FSM).\n");
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log_push();
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@ -78,6 +80,10 @@ struct FsmPass : public Pass {
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fm_set_fsm_file_opt = " -fm_set_fsm_file " + args[++argidx];
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continue;
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}
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if (arg == "-encoding" && argidx+1 < args.size() && fm_set_fsm_file_opt.empty()) {
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encoding_opt = " -encoding " + args[++argidx];
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continue;
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}
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if (arg == "-norecode") {
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flag_norecode = true;
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continue;
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@ -112,7 +118,7 @@ struct FsmPass : public Pass {
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}
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if (!flag_norecode)
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Pass::call(design, "fsm_recode" + fm_set_fsm_file_opt);
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Pass::call(design, "fsm_recode" + fm_set_fsm_file_opt + encoding_opt);
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Pass::call(design, "fsm_info");
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if (!flag_nomap)
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@ -77,27 +77,30 @@ static void implement_pattern_cache(RTLIL::Module *module, std::map<RTLIL::Const
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and_sig.append(RTLIL::SigSpec(eq_wire));
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}
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if (or_sig.width == 1)
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if (or_sig.width < num_states-int(fullstate_cache.size()))
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{
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and_sig.append(or_sig);
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}
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else if (or_sig.width < num_states && int(it.second.size()) < num_states)
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{
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RTLIL::Wire *or_wire = new RTLIL::Wire;
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or_wire->name = NEW_ID;
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module->add(or_wire);
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if (or_sig.width == 1)
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{
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and_sig.append(or_sig);
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}
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else
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{
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RTLIL::Wire *or_wire = new RTLIL::Wire;
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or_wire->name = NEW_ID;
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module->add(or_wire);
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RTLIL::Cell *or_cell = new RTLIL::Cell;
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or_cell->name = NEW_ID;
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or_cell->type = "$reduce_or";
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or_cell->connections["\\A"] = or_sig;
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or_cell->connections["\\Y"] = RTLIL::SigSpec(or_wire);
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or_cell->parameters["\\A_SIGNED"] = RTLIL::Const(false);
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or_cell->parameters["\\A_WIDTH"] = RTLIL::Const(or_sig.width);
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or_cell->parameters["\\Y_WIDTH"] = RTLIL::Const(1);
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module->add(or_cell);
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RTLIL::Cell *or_cell = new RTLIL::Cell;
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or_cell->name = NEW_ID;
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or_cell->type = "$reduce_or";
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or_cell->connections["\\A"] = or_sig;
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or_cell->connections["\\Y"] = RTLIL::SigSpec(or_wire);
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or_cell->parameters["\\A_SIGNED"] = RTLIL::Const(false);
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or_cell->parameters["\\A_WIDTH"] = RTLIL::Const(or_sig.width);
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or_cell->parameters["\\Y_WIDTH"] = RTLIL::Const(1);
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module->add(or_cell);
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and_sig.append(RTLIL::SigSpec(or_wire));
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and_sig.append(RTLIL::SigSpec(or_wire));
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}
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}
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switch (and_sig.width)
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@ -131,7 +134,7 @@ static void implement_pattern_cache(RTLIL::Module *module, std::map<RTLIL::Const
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cases_vector.append(RTLIL::SigSpec(1, 1));
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break;
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default:
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assert(!"This should never happen!");
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log_abort();
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}
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}
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@ -184,6 +187,9 @@ static void map_fsm(RTLIL::Cell *fsm_cell, RTLIL::Module *module)
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state_dff->type = "$adff";
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state_dff->parameters["\\ARST_POLARITY"] = fsm_cell->parameters["\\ARST_POLARITY"];
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state_dff->parameters["\\ARST_VALUE"] = fsm_data.state_table[fsm_data.reset_state];
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for (auto &bit : state_dff->parameters["\\ARST_VALUE"].bits)
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if (bit != RTLIL::State::S1)
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bit = RTLIL::State::S0;
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state_dff->connections["\\ARST"] = fsm_cell->connections["\\ARST"];
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}
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state_dff->parameters["\\WIDTH"] = RTLIL::Const(fsm_data.state_bits);
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@ -221,8 +227,7 @@ static void map_fsm(RTLIL::Cell *fsm_cell, RTLIL::Module *module)
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}
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else
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{
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if (sig_b.as_bool() || sig_b.width != fsm_data.state_bits)
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encoding_is_onehot = false;
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encoding_is_onehot = false;
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RTLIL::Cell *eq_cell = new RTLIL::Cell;
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eq_cell->name = NEW_ID;
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@ -266,6 +271,7 @@ static void map_fsm(RTLIL::Cell *fsm_cell, RTLIL::Module *module)
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if (encoding_is_onehot)
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{
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RTLIL::SigSpec next_state_sig(RTLIL::State::Sm, next_state_wire->width);
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for (size_t i = 0; i < fsm_data.state_table.size(); i++) {
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RTLIL::Const state = fsm_data.state_table[i];
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int bit_idx = -1;
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@ -273,8 +279,10 @@ static void map_fsm(RTLIL::Cell *fsm_cell, RTLIL::Module *module)
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if (state.bits[j] == RTLIL::State::S1)
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bit_idx = j;
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if (bit_idx >= 0)
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module->connections.push_back(RTLIL::SigSig(RTLIL::SigSpec(next_state_wire, 1, bit_idx), RTLIL::SigSpec(next_state_onehot, 1, i)));
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next_state_sig.replace(bit_idx, RTLIL::SigSpec(next_state_onehot, 1, i));
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}
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log_assert(!next_state_sig.has_marked_bits());
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module->connections.push_back(RTLIL::SigSig(next_state_wire, next_state_sig));
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}
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else
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{
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@ -23,6 +23,7 @@
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#include "kernel/consteval.h"
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#include "kernel/celltypes.h"
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#include "fsmdata.h"
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#include "math.h"
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#include <string.h>
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static void fm_set_fsm_print(RTLIL::Cell *cell, RTLIL::Module *module, FsmData &fsm_data, const char *prefix, FILE *f)
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@ -46,31 +47,50 @@ static void fm_set_fsm_print(RTLIL::Cell *cell, RTLIL::Module *module, FsmData &
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prefix, RTLIL::unescape_id(module->name).c_str());
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}
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static void fsm_recode(RTLIL::Cell *cell, RTLIL::Module *module, FILE *fm_set_fsm_file)
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static void fsm_recode(RTLIL::Cell *cell, RTLIL::Module *module, FILE *fm_set_fsm_file, std::string default_encoding)
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{
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std::string encoding = cell->attributes.count("\\fsm_encoding") ? cell->attributes.at("\\fsm_encoding").str : "auto";
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log("Recoding FSM `%s' from module `%s' using `%s' encoding:\n", cell->name.c_str(), module->name.c_str(), encoding.c_str());
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if (encoding != "none" && encoding != "one-hot" && encoding != "binary") {
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if (encoding != "auto")
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log(" unkown encoding `%s': using auto (%s) instead.\n", encoding.c_str(), default_encoding.c_str());
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encoding = default_encoding;
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}
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if (encoding == "none") {
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log(" nothing to do for encoding `none'.\n");
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return;
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}
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FsmData fsm_data;
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fsm_data.copy_from_cell(cell);
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log("Recoding FSM `%s' from module `%s':\n", cell->name.c_str(), module->name.c_str());
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if (fm_set_fsm_file != NULL)
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fm_set_fsm_print(cell, module, fsm_data, "r", fm_set_fsm_file);
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fsm_data.state_bits = fsm_data.state_table.size();
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if (fsm_data.reset_state >= 0)
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fsm_data.state_bits--;
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int bit_pos = 0;
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for (size_t i = 0; i < fsm_data.state_table.size(); i++)
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if (encoding == "one-hot") {
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fsm_data.state_bits = fsm_data.state_table.size();
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} else
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if (encoding == "auto" || encoding == "binary") {
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fsm_data.state_bits = ceil(log2(fsm_data.state_table.size()));
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} else
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log_error("FSM encoding `%s' is not supported!\n", encoding.c_str());
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int state_idx_counter = fsm_data.reset_state >= 0 ? 1 : 0;
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for (int i = 0; i < int(fsm_data.state_table.size()); i++)
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{
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int state_idx = fsm_data.reset_state == i ? 0 : state_idx_counter++;
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RTLIL::Const new_code;
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if (int(i) == fsm_data.reset_state)
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new_code = RTLIL::Const(RTLIL::State::S0, fsm_data.state_bits);
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else {
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RTLIL::Const state_code(RTLIL::State::Sa, fsm_data.state_bits);
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state_code.bits[bit_pos++] = RTLIL::State::S1;
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new_code = state_code;
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}
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if (encoding == "one-hot") {
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new_code = RTLIL::Const(RTLIL::State::Sa, fsm_data.state_bits);
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new_code.bits[state_idx] = RTLIL::State::S1;
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} else
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if (encoding == "auto" || encoding == "binary") {
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new_code = RTLIL::Const(state_idx, fsm_data.state_bits);
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} else
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log_abort();
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log(" %s -> %s\n", fsm_data.state_table[i].as_string().c_str(), new_code.as_string().c_str());
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fsm_data.state_table[i] = new_code;
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@ -88,10 +108,12 @@ struct FsmRecodePass : public Pass {
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" fsm_recode [-fm_set_fsm_file file] [selection]\n");
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log(" fsm_recode [-encoding type] [-fm_set_fsm_file file] [selection]\n");
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log("\n");
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log("This pass reassign the state encodings for FSM cells. At the moment only\n");
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log("one-hot encoding is supported.\n");
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log("one-hot encoding and binary encoding is supported. The option -encoding\n");
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log("can be used to specify the encoding scheme used for FSMs without the\n");
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log("`fsm_encoding' attribute (or with the attribute set to `auto'.\n");
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log("\n");
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log("The option -fm_set_fsm_file can be used to generate a file containing the\n");
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log("mapping from old to new FSM encoding in form of Synopsys Formality set_fsm_*\n");
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@ -101,6 +123,7 @@ struct FsmRecodePass : public Pass {
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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{
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FILE *fm_set_fsm_file = NULL;
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std::string default_encoding = "one-hot";
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log_header("Executing FSM_RECODE pass (re-assigning FSM state encoding).\n");
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size_t argidx;
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@ -112,6 +135,10 @@ struct FsmRecodePass : public Pass {
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log_error("Can't open fm_set_fsm_file `%s' for writing: %s\n", args[argidx].c_str(), strerror(errno));
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continue;
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}
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if (arg == "-encoding" && argidx+1 < args.size() && fm_set_fsm_file == NULL) {
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default_encoding = args[++argidx];
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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@ -120,7 +147,7 @@ struct FsmRecodePass : public Pass {
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if (design->selected(mod_it.second))
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for (auto &cell_it : mod_it.second->cells)
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if (cell_it.second->type == "$fsm" && design->selected(mod_it.second, cell_it.second))
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fsm_recode(cell_it.second, mod_it.second, fm_set_fsm_file);
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fsm_recode(cell_it.second, mod_it.second, fm_set_fsm_file, default_encoding);
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if (fm_set_fsm_file != NULL)
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fclose(fm_set_fsm_file);
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