mirror of https://github.com/YosysHQ/yosys.git
Added eval -brute_force_equiv_checker_x mode
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@ -362,15 +362,21 @@ RTLIL::Const RTLIL::const_mul(const RTLIL::Const &arg1, const RTLIL::Const &arg2
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RTLIL::Const RTLIL::const_div(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
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{
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int undef_bit_pos = -1;
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BigInteger y = const2big(arg1, signed1, undef_bit_pos) / const2big(arg2, signed2, undef_bit_pos);
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return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
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BigInteger a = const2big(arg1, signed1, undef_bit_pos);
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BigInteger b = const2big(arg2, signed2, undef_bit_pos);
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if (b.isZero())
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return RTLIL::Const(RTLIL::State::Sx, result_len);
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return big2const(a / b, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
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}
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RTLIL::Const RTLIL::const_mod(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
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{
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int undef_bit_pos = -1;
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BigInteger y = const2big(arg1, signed1, undef_bit_pos) % const2big(arg2, signed2, undef_bit_pos);
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return big2const(y, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
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BigInteger a = const2big(arg1, signed1, undef_bit_pos);
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BigInteger b = const2big(arg2, signed2, undef_bit_pos);
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if (b.isZero())
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return RTLIL::Const(RTLIL::State::Sx, result_len);
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return big2const(a % b, result_len >= 0 ? result_len : std::max(arg1.bits.size(), arg2.bits.size()), std::min(undef_bit_pos, 0));
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}
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RTLIL::Const RTLIL::const_pow(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len)
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@ -35,6 +35,7 @@ struct BruteForceEquivChecker
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RTLIL::SigSpec mod1_inputs, mod1_outputs;
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RTLIL::SigSpec mod2_inputs, mod2_outputs;
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int counter, errors;
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bool ignore_x_mod1;
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void run_checker(RTLIL::SigSpec &inputs)
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{
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@ -63,8 +64,16 @@ struct BruteForceEquivChecker
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log("Failed ConstEval of module 2 outputs at signal %s (input: %s = %s).\n",
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log_signal(undef2), log_signal(mod1_inputs), log_signal(inputs));
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if (ignore_x_mod1) {
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sig1.expand(), sig2.expand();
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for (size_t i = 0; i < sig1.chunks.size(); i++)
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if (sig1.chunks.at(i) == RTLIL::SigChunk(RTLIL::State::Sx))
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sig2.chunks.at(i) = RTLIL::SigChunk(RTLIL::State::Sx);
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sig1.optimize(), sig2.optimize();
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}
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if (sig1 != sig2) {
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log("Found counter-example:\n");
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log("Found counter-example (ignore_x_mod1 = %s):\n", ignore_x_mod1 ? "active" : "inactive");
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log(" Module 1: %s = %s => %s = %s\n", log_signal(mod1_inputs), log_signal(inputs), log_signal(mod1_outputs), log_signal(sig1));
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log(" Module 2: %s = %s => %s = %s\n", log_signal(mod2_inputs), log_signal(inputs), log_signal(mod2_outputs), log_signal(sig2));
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errors++;
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@ -73,8 +82,8 @@ struct BruteForceEquivChecker
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counter++;
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}
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BruteForceEquivChecker(RTLIL::Module *mod1, RTLIL::Module *mod2) :
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mod1(mod1), mod2(mod2), counter(0), errors(0)
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BruteForceEquivChecker(RTLIL::Module *mod1, RTLIL::Module *mod2, bool ignore_x_mod1) :
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mod1(mod1), mod2(mod2), counter(0), errors(0), ignore_x_mod1(ignore_x_mod1)
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{
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log("Checking for equivialence (brute-force): %s vs %s\n", mod1->name.c_str(), mod2->name.c_str());
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for (auto &w : mod1->wires)
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@ -144,15 +153,16 @@ struct EvalPass : public Pass {
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shows.push_back(args[++argidx]);
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continue;
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}
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if (args[argidx] == "-brute_force_equiv_checker" && argidx+2 < args.size()) {
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if ((args[argidx] == "-brute_force_equiv_checker" || args[argidx] == "-brute_force_equiv_checker_x") && argidx+2 < args.size()) {
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/* this should only be used for regression testing of ConstEval -- see tests/xsthammer */
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std::string mod1_name = RTLIL::escape_id(args[++argidx]);
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std::string mod2_name = RTLIL::escape_id(args[++argidx]);
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extra_args(args, argidx, design);
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if (design->modules.count(mod1_name) == 0)
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log_error("Can't find module `%s'!\n", mod1_name.c_str());
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if (design->modules.count(mod2_name) == 0)
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log_error("Can't find module `%s'!\n", mod2_name.c_str());
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BruteForceEquivChecker checker(design->modules.at(mod1_name), design->modules.at(mod2_name));
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BruteForceEquivChecker checker(design->modules.at(mod1_name), design->modules.at(mod2_name), args[argidx-2] == "-brute_force_equiv_checker_x");
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if (checker.errors > 0)
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log_cmd_error("Modules are not equivialent!\n");
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log("Verified %s = %s (using brute-force check on %d cases).\n",
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