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1266 Commits

Author SHA1 Message Date
Clifford Wolf 658f93663b Fixed iopadmap attribute handling 2016-05-04 10:48:23 +02:00
Clifford Wolf e01464e2ac Added "qwp -v" 2016-04-28 23:17:30 +02:00
Clifford Wolf 0d2923cccd Connections between inputs and inouts are driven by the input 2016-04-26 19:49:05 +02:00
Clifford Wolf 958fb29c76 Fixed test_autotb for modules with many cell ports 2016-04-25 16:37:11 +02:00
Clifford Wolf 93e107e455 Fixed proc_mux performance bug 2016-04-25 10:43:04 +02:00
Clifford Wolf b1d6f05fa2 Fixed performance bug in proc_dlatch 2016-04-24 19:29:56 +02:00
Clifford Wolf 096c25d29d Improvements in greenpak4 shreg mapping 2016-04-23 23:10:13 +02:00
Andrew Zonenberg 7f16784f3c Merge https://github.com/cliffordwolf/yosys 2016-04-23 12:22:08 -07:00
Clifford Wolf e13c66122e Added "shregmap -zinit" for greenpak4 tech 2016-04-23 20:20:21 +02:00
Andrew Zonenberg 2849fd486e Fixed typo in help text 2016-04-22 23:01:39 -07:00
Clifford Wolf 7311be4028 Added "shregmap -tech greenpak4" 2016-04-22 19:42:08 +02:00
Clifford Wolf 965b0d59b5 More flexible handling of initialization values 2016-04-22 12:13:06 +02:00
Clifford Wolf 0bc95f1e04 Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
Clifford Wolf 1565d1af69 Fixed performance bug in "share" pass 2016-04-21 19:47:25 +02:00
Clifford Wolf f38ca3e18f Improvements in opt_expr 2016-04-21 14:23:04 +02:00
Clifford Wolf 1761d08dd2 Bugfix and improvements in memory_share 2016-04-21 14:22:58 +02:00
Clifford Wolf f1fa757d0e Added "shregmap -params" 2016-04-18 11:58:21 +02:00
Clifford Wolf 525651c8f6 Added "shregmap -zinit" and "shregmap -init" 2016-04-18 11:44:10 +02:00
Clifford Wolf ce7c980ec7 Improvements in "shregmap" 2016-04-17 15:37:22 +02:00
Clifford Wolf de647a390c Added "shregmap" pass 2016-04-16 23:20:49 +02:00
Clifford Wolf fbdb8e7b3e Fixed copy&paste error in log message in lut2mux 2016-04-16 23:20:34 +02:00
Clifford Wolf 6041f780c3 Prefer noninverting FFs in dfflibmap 2016-04-05 12:51:04 +02:00
Clifford Wolf eaac5bfbc7 Improved formatting of "sat" output tables 2016-04-05 08:26:10 +02:00
Clifford Wolf 6cafd08ac1 Improved opt_merge support for $pmux cells 2016-03-31 09:58:55 +02:00
Clifford Wolf e5dd5c0bcc Preserve empty $pmux default cases 2016-03-31 09:57:23 +02:00
Clifford Wolf e2f6d61c00 Typo fixes in opt_expr and opt_merge 2016-03-31 09:56:56 +02:00
Clifford Wolf ec93680bd5 Renamed opt_share to opt_merge 2016-03-31 08:52:49 +02:00
Clifford Wolf 1d0f0d668a Renamed opt_const to opt_expr 2016-03-31 08:46:56 +02:00
Andrew Zonenberg 984561c034 Renamed counters pass to greenpak4_counters 2016-03-30 22:52:01 -07:00
Andrew Zonenberg 1ae33344f4 Added initial implementation of "counters" pass to synth_greenpak4. Can only infer non-resettable down counters for now. 2016-03-30 22:40:14 -07:00
Andrew Zonenberg 1b42e0c471 Reduced log verbosity 2016-03-30 22:03:50 -07:00
Andrew Zonenberg ad19e0c64a Continued work on counter extraction. Can recognize compatible RTL counters but not replace with hard macros. 2016-03-30 21:54:23 -07:00
Andrew Zonenberg d16d05e415 Merge https://github.com/cliffordwolf/yosys 2016-03-30 20:38:18 -07:00
Andrew Zonenberg dd7204c0bd Fixed typo in log message 2016-03-30 20:30:03 -07:00
Andrew Zonenberg 489caf32c5 Initial work on greenpak4 counter extraction. Doesn't work but a decent start 2016-03-30 01:07:20 -07:00
Clifford Wolf a47f69536a Added support for installed plugins 2016-03-30 10:02:03 +02:00
Clifford Wolf 9717495401 Fixed handling of inverters (aka 1-input luts) in nlutmap 2016-03-23 08:56:08 +01:00
Clifford Wolf 043fa0fad0 Cleanup abstract modules at end of "hierarchy -top" 2016-03-21 16:37:35 +01:00
Clifford Wolf 2c7e107d7a Support for abstract modules in chparam 2016-03-21 16:37:35 +01:00
Clifford Wolf bb9374b67c Improvements in ABCEXTERNAL handling 2016-03-19 20:02:40 +01:00
Sergey Kvachonok 2656b2c55a Support calling out to an external ABC. 
$ make ABCEXTERNAL=my-abc && make ABCEXTERNAL=my-abc install

configures yosys to use an external ABC executable instead of
building and installing the in-tree ABC copy (yosys-abc).
 2016-03-19 18:36:18 +03:00
Clifford Wolf c4aaed099f Using "mfs" and "lutpack" in ABC lut mapping 2016-03-07 11:14:11 +01:00
Clifford Wolf bcc873b805 Fixed some visual studio warnings 2016-02-13 17:31:24 +01:00
Clifford Wolf 0d7fd2585e Added "int ceil_log2(int)" function 2016-02-13 16:52:16 +01:00
Clifford Wolf 825b99efc1 Added "stat -liberty" for calculating chip area 2016-02-04 12:26:13 +01:00
Clifford Wolf 801c022457 Improved dffsr2dff pass 2016-02-02 19:42:49 +01:00
Clifford Wolf d69395ca08 Added dffsr2dff 2016-02-02 17:19:01 +01:00
Clifford Wolf d6592d5b99 Use alphanumerical order instead of idstring idx in opt_clean compare_signals() 2016-02-02 09:16:18 +01:00
Clifford Wolf 17372d8abd Added "abc -luts" option, Improved Xilinx logic mapping 2016-02-01 12:40:32 +01:00
Clifford Wolf 9251553592 Improvements in dfflibmap (FFs with Q/QN outputs, DFFs from ADFFs) 2016-02-01 11:49:11 +01:00
Clifford Wolf 71f418c468 More clang sanitizer stuff 2016-01-31 19:55:48 +01:00
Clifford Wolf 8b3f8cd220 Added "equiv_struct -fwonly" 2016-01-08 10:59:16 +01:00
Clifford Wolf f5008f4f8a Bugfixes in equiv_struct 2016-01-08 09:57:28 +01:00
Clifford Wolf d00c63c927 Added "submod -copy" 2016-01-08 09:08:12 +01:00
Clifford Wolf c3fd03d722 Added "equiv_struct -maxiter <N>" 2016-01-06 13:54:54 +01:00
Clifford Wolf 1f8c47fb47 Added "equiv_add -try" mode 2016-01-06 13:54:00 +01:00
Clifford Wolf 1d62f8710f Fixed "splitnets -ports" for hierarchical designs 2015-12-22 13:25:00 +01:00
Clifford Wolf ab0c44d3ed Added %R select expression 2015-12-20 13:35:58 +01:00
Clifford Wolf 1ea6db3db8 Improved proc_mux performance for huge always blocks 2015-12-02 22:02:20 +01:00
Clifford Wolf e61c7f887a Added torder command 2015-11-19 15:34:32 +01:00
Clifford Wolf d98d99aec6 Added "abc -g" 2015-11-10 11:10:11 +01:00
Marcus Comstedt 8c2bdef36d Fix a segfault in dffinit when the value has too few bits 
The code was already trying to add the required number of bits, but
fell one short of the mark.
 2015-11-08 19:16:56 +01:00
Clifford Wolf 1ec6429bad Added "singleton" pass 2015-11-07 19:10:43 +01:00
Clifford Wolf f401eeb0cf Bugfix in mapping $tribuf to $_TBUF_ 2015-11-05 12:37:43 +01:00
Clifford Wolf ddf3e2dc65 Bugfix in memory_dff 2015-10-31 22:01:41 +01:00
Clifford Wolf ccdbf41be6 Improvements in wreduce 2015-10-31 13:39:30 +01:00
Clifford Wolf 0c202a2549 Use mfp<> in equiv_mark 2015-10-27 19:15:35 +01:00
Clifford Wolf 27714acd8a Improvements in equiv_struct 2015-10-25 22:04:20 +01:00
Clifford Wolf d014ba2d0e Major refactoring of equiv_struct 2015-10-25 19:31:29 +01:00
Clifford Wolf 207736b4ee Import more std:: stuff into Yosys namespace 2015-10-25 19:30:49 +01:00
Clifford Wolf da923c198e Added "equiv_add -cell" 2015-10-25 14:35:40 +01:00
Clifford Wolf 83bd27bf6e equiv_struct now creates equiv_merged attributes 2015-10-25 02:15:20 +02:00
Clifford Wolf 453736d918 Improvements in equiv_struct 2015-10-24 23:04:17 +02:00
Clifford Wolf 7f110e7018 renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit() 2015-10-24 22:56:40 +02:00
Clifford Wolf 6af8076967 improvement in "stat" 2015-10-24 21:56:53 +02:00
Clifford Wolf 6fe48cf41e equiv_purge bugfix, using SigChunk in Yosys namespace 2015-10-24 19:09:45 +02:00
Clifford Wolf 2a0f577f83 Fixed handling of driver-driver conflicts in wreduce 2015-10-24 13:44:35 +02:00
Clifford Wolf 4cec1c058d Added equiv_mark command 2015-10-23 23:56:58 +02:00
Clifford Wolf c35db8c19e Disabled "Skipping blackbox module" msg in show command 2015-10-23 20:11:05 +02:00
Clifford Wolf 15a67392f1 Also merge $equiv cells in equiv_struct 2015-10-23 15:26:58 +02:00
Clifford Wolf d19069b0fb Improvements in equiv_struct 2015-10-23 15:11:57 +02:00
Clifford Wolf 84a07ffb8a Added equiv_purge 2015-10-22 15:40:27 +02:00
Clifford Wolf 00e05b1310 Added equiv_struct command 2015-10-21 17:12:35 +02:00
Clifford Wolf 6416dfee93 Improved inout handling in equiv_make 2015-10-21 15:42:50 +02:00
Clifford Wolf 1d83854d84 Bugfixes in handling of "keep" attribute on wires 2015-10-15 14:57:28 +02:00
Clifford Wolf eb1e3caae7 Fixed "flatten" for unconnected inout ports 2015-10-13 10:30:23 +02:00
Clifford Wolf c58bd5dc30 Added edgetypes command 2015-09-27 11:53:20 +02:00
Clifford Wolf 281c1f4029 Some cleanups in qwp 2015-09-26 10:42:27 +02:00
Clifford Wolf ddcfc99f8c Added "test_cell -noeval" 2015-09-25 17:27:18 +02:00
Clifford Wolf 82028c42e0 Added wreduce $mul support and fixed signed $mul opt_const bug 2015-09-25 17:27:06 +02:00
Clifford Wolf 4864736167 Bugfix in bram read-enable code 2015-09-25 14:22:33 +02:00
Clifford Wolf 924d9d6e86 Added read-enable to memory model 2015-09-25 12:23:11 +02:00
Clifford Wolf ec92c89659 Added pivoting to qwp solver 2015-09-24 22:16:37 +02:00
Clifford Wolf 69071bbc5f Improved qwp performance 2015-09-24 21:50:37 +02:00
Clifford Wolf b1e9cb332d Added statistics summary to "qwp" 2015-09-24 21:22:24 +02:00
Clifford Wolf 3501f8e364 Fixed memory_bram for ROMs in BRAMs with write-enable inputs 2015-09-24 11:37:15 +02:00
Clifford Wolf b66bf8bed1 Do not detect fsm state registers with init attribute 2015-09-21 11:54:00 +02:00
Clifford Wolf 11c27b5e69 Bugfix in "qwp" pass 2015-09-21 10:37:24 +02:00
Clifford Wolf 80898dcbc8 Improvements and fixes in "qwp" pass 2015-09-21 01:05:13 +02:00
Clifford Wolf 6329bea873 Added "qwp -dump" 2015-09-20 22:36:35 +02:00
Clifford Wolf 539c5eeb0f Added "qwp" command 2015-09-20 18:28:46 +02:00
Clifford Wolf 598a475724 Added nlutmap 2015-09-18 21:57:34 +02:00
Clifford Wolf c851f51656 Added lut2mux pass 2015-09-18 21:55:48 +02:00
Clifford Wolf db548800b6 Added buffer detection to "abc -lut" 2015-09-18 20:12:56 +02:00
Clifford Wolf 452d4bf741 Added support for "dfflibmap -liberty +/..." 2015-09-18 11:55:57 +02:00
Clifford Wolf 51e1295d79 Added detection of "mux inverter" chains in opt_const 2015-09-18 11:55:31 +02:00
Clifford Wolf b7535a6c75 Added $logic_not handling to fsm_detect 2015-09-18 10:46:50 +02:00
Clifford Wolf e7c018e5d1 Fixed sharing of $memrd cells 2015-09-12 16:01:20 +02:00
Clifford Wolf 6f9a6fd783 Fixed port ordering in "splitnets" cmd 2015-09-01 13:10:36 +02:00
Clifford Wolf b10ea0550d gcc-4.6 build fixes 2015-09-01 12:51:23 +02:00
Clifford Wolf 24e7cf89bc Fixed iopadmap help message 2015-08-31 16:49:42 +02:00
Clifford Wolf 92dce21f6e Using dict<> and pool<> in alumacc pass 2015-08-31 16:26:01 +02:00
Clifford Wolf f40d1b78b6 Added sat -show-regs, -show-public, -show-all 2015-08-18 17:14:30 +02:00
Clifford Wolf 246e362717 Bugfix in fsm_detect for complex muxtrees 2015-08-18 14:17:50 +02:00
Clifford Wolf f43815054e Properly clean up unused "init" attributes 2015-08-18 13:50:15 +02:00
Clifford Wolf 9c33172ece Added tribuf command 2015-08-16 12:55:25 +02:00
Clifford Wolf ff50bc2ac3 Added $tribuf and $_TBUF_ cell types 2015-08-16 12:54:52 +02:00
Clifford Wolf ae09c89f62 Fixed opt_clean handling of inout ports 2015-08-16 09:50:17 +02:00
Larry Doolittle 6c00704a5e Another block of spelling fixes 
Smaller this time
 2015-08-14 23:27:05 +02:00
Larry Doolittle 022f570563 Keep gcc from complaining about uninitialized variables 2015-08-14 23:26:49 +02:00
Clifford Wolf 0350074819 Re-created command-reference-manual.tex, copied some doc fixes to online help 2015-08-14 11:27:19 +02:00
Clifford Wolf 84bf862f7c Spell check (by Larry Doolittle) 2015-08-14 10:56:05 +02:00
Clifford Wolf 80910d13a6 Merge branch 'master' of github.com:cliffordwolf/yosys 2015-08-13 09:52:06 +02:00
Clifford Wolf 08ad5409a2 Some ASCII encoding fixes (comments and docs) by Larry Doolittle 2015-08-13 09:30:20 +02:00
Clifford Wolf e4ef000b70 Adjust makefiles to work with out-of-tree builds 
This is based on work done by Larry Doolittle
 2015-08-12 15:04:44 +02:00
Clifford Wolf c43f38c81b Improved handling of "keep" attributes in hierarchical designs in opt_clean 2015-08-12 14:10:14 +02:00
Clifford Wolf 667b015018 Merge pull request #70 from gaomy3832/bugfix 
Remove unused blackbox modules in opt_clean.
 2015-08-12 08:45:04 +02:00
Mingyu Gao cbda56d178 Remove unused blackbox modules in opt_clean. 2015-08-11 09:51:08 -07:00
Mingyu Gao 8c4c62f3e1 Bugfix for cell hash cache option in opt_share. 2015-08-11 11:40:23 +02:00
Clifford Wolf 2185125760 Added missing ct_all setup to opt_clean 2015-08-11 07:54:32 +02:00
Mingyu Gao 021b4a2436 Bugfix for cell hash cache option in opt_share. 2015-08-10 13:01:44 -07:00
Clifford Wolf 883e09d8ed Use MEMID as name for $mem cell 2015-08-09 13:35:44 +02:00
Clifford Wolf 8d6d5c30d9 Added WORDS parameter to $meminit 2015-07-31 10:40:09 +02:00
Clifford Wolf 3860c9a9f2 Fixed flatten $meminit handling 2015-07-30 21:43:41 +02:00
Clifford Wolf 4d0ba9b3b2 Fixed "check" command for inout ports 2015-07-27 09:54:58 +02:00
Clifford Wolf 2a613b1b66 Some cleanups in opt_rmdff 2015-07-25 12:09:57 +02:00
Clifford Wolf badc5f7eb9 Added "miter -assert" 2015-07-25 12:09:57 +02:00
Clifford Wolf 2397078485 Keep modules with $assume (like $assert) 2015-07-25 12:09:57 +02:00
Clifford Wolf 914ae3401e Improved $adff simplification 2015-07-24 14:12:50 +02:00
Clifford Wolf ad919ae4e3 Fixed techmap processes error msg 2015-07-18 12:16:27 +02:00
Clifford Wolf 8393f70538 Some fixes in "select" command 2015-07-16 22:10:26 +02:00
Clifford Wolf d2ff5d9994 Do not collect disabled $memwr cells 2015-07-06 13:28:00 +02:00
Clifford Wolf 766dd51447 Bugfix in fsm_extract 2015-07-03 18:42:36 +02:00
Clifford Wolf 6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
Clifford Wolf 053058d781 Added opt_const -clkinv 2015-07-01 10:49:21 +02:00
Clifford Wolf ee9188a5b4 Added logic-loop error handling to freduce 2015-06-30 17:11:46 +02:00
Clifford Wolf 77e89399a6 Bugfix in chparam 2015-06-30 01:38:34 +02:00
Clifford Wolf caa274ada6 Added design->rename(module, new_name) 2015-06-30 01:37:59 +02:00
Clifford Wolf 99100f367d Added "rename -top new_name" 2015-06-17 09:38:56 +02:00
Clifford Wolf 66910e15b2 Modernized memory_dff (and fixed a bug) 2015-06-14 16:15:51 +02:00
Clifford Wolf f6eca509bb Added "memory -nordff" 2015-06-14 15:47:11 +02:00
Clifford Wolf 4c733301e6 Fixed cstr_buf for std::string with small string optimization 2015-06-11 13:39:49 +02:00
Clifford Wolf 1ae360cf72 AigMaker refactoring 2015-06-10 23:00:12 +02:00
Clifford Wolf 56d4822719 Renamed "aig" to "aigmap" 2015-06-10 07:24:26 +02:00
Clifford Wolf 85287295b2 Fixed cellaigs port extending 2015-06-10 07:16:30 +02:00
Clifford Wolf 66f9ee412a Added "aig" pass 2015-06-09 22:33:26 +02:00
Clifford Wolf b57cb4a7fe Merge clock inverters in memory_dff 2015-06-09 07:25:12 +02:00
Clifford Wolf 08f9b38a9c Added opt_share -share_all 2015-05-31 14:24:34 +02:00
Clifford Wolf 522705cc28 Added liberty dont_use support to dfflibmap 2015-05-31 07:51:12 +02:00
Clifford Wolf 9f772eb970 Improved "flatten" handlings of inout ports 2015-05-23 10:14:53 +02:00
Clifford Wolf 4b6221478e Added simple $dlatch support to opt_rmdff 2015-05-23 09:45:48 +02:00
Clifford Wolf e122c2644e preserve used $-wires with init attribute in opt_clean 2015-05-22 08:20:29 +02:00
Clifford Wolf e5116eeb77 Generalized blifparse API 2015-05-17 15:10:37 +02:00
Clifford Wolf 7dad017c9c abc/blifparse files reorganization 2015-05-17 14:44:28 +02:00
Clifford Wolf c2f30e0de4 Added .barbuf support to abc BLIF parser 2015-05-13 06:45:12 +02:00
Clifford Wolf 7462618591 Fixed memory_unpack for initialized memories 2015-04-29 19:55:32 +02:00
Clifford Wolf 96be31de89 Preserve important attributes in splitnets 2015-04-29 07:44:57 +02:00
Clifford Wolf f483dce7c2 Added $eq/$neq -> $logic_not/$reduce_bool optimization 2015-04-29 07:28:15 +02:00
Clifford Wolf 794d22969d Added simplemap $lut support 2015-04-27 10:16:07 +02:00
Clifford Wolf 49859393bb Improved attributes API and handling of "src" attributes 2015-04-24 22:04:05 +02:00
Clifford Wolf 11f77205f5 Fixed memory_share for unconditional write with part select to memory 2015-04-22 06:40:23 +02:00
Clifford Wolf faa95dd845 don't consider blackbox modules in "sat" command 2015-04-18 09:29:03 +02:00
Clifford Wolf 9041f34233 Improved handling of init values in opt_rmdff 
based on a patch by Mingyu Gao, user gaomy3832 on github
 2015-04-18 08:04:31 +02:00
Clifford Wolf 8cdbcf6859 Bugfix for $_DFF_?_ in "dff2dffe -direct-match" 2015-04-17 21:35:59 +02:00
Clifford Wolf e050467b89 Improved "maccmap" help message 2015-04-16 18:23:43 +02:00
Clifford Wolf dc30b034f7 Fixed "dff2dffe -direct-match" 2015-04-16 11:47:59 +02:00
Clifford Wolf f80d020f17 Added "dff2dffe -direct-match" 2015-04-16 11:30:17 +02:00
Clifford Wolf 2fc2f8f5b3 Added "splice -wires" 2015-04-13 19:28:12 +02:00
Clifford Wolf e305d85807 Added handling of bool-output cells to "wreduce" 2015-04-13 19:27:49 +02:00
Clifford Wolf 7319951145 Added memory_bram "make_outreg" feature 2015-04-09 16:08:54 +02:00
Clifford Wolf d176e613c2 Minor fixes in handling of "init" attribute 2015-04-09 15:12:26 +02:00
Clifford Wolf be7b9b34ca techmap code cleanup 2015-04-09 12:02:26 +02:00
Clifford Wolf 21a1cc1b60 Added support for "file names with blanks" 2015-04-08 12:14:34 +02:00
Clifford Wolf aa0ab975b9 Removed "techmap -share_map" (use "-map +/filename" instead) 2015-04-08 12:13:53 +02:00
Clifford Wolf 8eadd8fb18 Added %M and %C select operators 2015-04-07 22:22:09 +02:00
Clifford Wolf 724cead61d Added "pmuxtree" command 2015-04-07 20:27:10 +02:00
Clifford Wolf 1f33b2a490 Added "chparam -list" 2015-04-07 19:21:30 +02:00
Clifford Wolf 590f74d8f0 Added decoder generation to "muxcover" 2015-04-07 18:03:27 +02:00
Clifford Wolf f7fb21f185 Added "muxcover" command 2015-04-07 15:42:25 +02:00
Clifford Wolf c1af590f4e typo fix 2015-04-07 07:43:01 +02:00
Clifford Wolf 329b841aac Added "chparam" command 2015-04-07 07:30:14 +02:00
Clifford Wolf 169d1c4711 Added support for initialized brams 2015-04-06 17:06:15 +02:00
Clifford Wolf a1c62b79d5 Avoid parameter values with size 0 ($mem cells) 2015-04-05 18:04:19 +02:00
Clifford Wolf 706631225e Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types 2015-04-05 09:45:14 +02:00
Clifford Wolf c52a4cdeed Added "dffinit", Support for initialized Xilinx DFF 2015-04-04 19:00:15 +02:00
Clifford Wolf 4b44907619 documentation improvements 2015-03-29 20:22:08 +02:00
Clifford Wolf 68bbb15214 Fixed detection of absolute paths in ABC for win32 2015-03-22 11:03:56 +01:00
Clifford Wolf 8b1e0bdd9e Fixed handling of quotes in liberty parser 2015-03-18 16:03:19 +01:00
Clifford Wolf aed4d763cf Added hierarchy -auto-top 2015-03-18 08:33:40 +01:00
Clifford Wolf ed15400fc6 Fixed bug in "hierarchy" for parametric designs 2015-03-04 15:52:34 +01:00
Clifford Wolf 1f1deda888 Added non-std verilog assume() statement 2015-02-26 18:47:39 +01:00
Clifford Wolf 27a918eadf Merge branch 'master' of github.com:cliffordwolf/yosys 2015-02-25 23:01:54 +01:00
Clifford Wolf 331f8b8d0b Bugfix in iopadmap 2015-02-25 23:01:42 +01:00
Clifford Wolf 3fe18c26cd Added "keep_hierarchy" attribute 2015-02-25 12:46:00 +01:00
Clifford Wolf 9ae21263f0 Some cleanups in "clean" 2015-02-24 22:31:30 +01:00
Clifford Wolf 81fa4e81a6 Fixed compilation problems with gcc 4.6.3; use enum instead of const ints. 
(original patch by Andrew Becker <andrew.becker@epfl.ch>)
 2015-02-24 11:01:00 +01:00
Clifford Wolf c4f383e452 Fixed "check -assert" 2015-02-22 16:29:44 +01:00
Clifford Wolf d361d313e1 Added "check -assert" doc 2015-02-22 13:02:48 +01:00
Clifford Wolf e8307cefd9 Added "check -assert" 2015-02-22 13:00:41 +01:00
Clifford Wolf 39d25b212c Fixed "sat -initsteps" off-by-one bug 2015-02-22 12:42:05 +01:00
Clifford Wolf fae0e75ace Added "sat -stepsize" and "sat -tempinduct-step" 2015-02-21 22:52:49 +01:00
Clifford Wolf b19c926af8 sat docu change 2015-02-21 22:03:54 +01:00
Clifford Wolf 9237fb924e When "sat -tempinduct-baseonly -maxsteps N" reaches maxsteps it is a good thing. 2015-02-21 20:05:16 +01:00
Clifford Wolf 1688b9b464 Added "sat -tempinduct-baseonly -tempinduct-inductonly" 2015-02-21 17:53:22 +01:00
Clifford Wolf dcbd00c101 Fixed basecase init for "sat -tempinduct" 2015-02-21 17:43:49 +01:00
Clifford Wolf 49dd9c713f Fixed "flatten" for non-pre-derived modules 2015-02-21 15:01:13 +01:00
Clifford Wolf 4e6ca7760f Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00
Clifford Wolf f778a4081c Catch constants assigned to cell outputs in "flatten" 2015-02-21 11:21:28 +01:00
Clifford Wolf 08c0fe164f format fixes in "sat -dump_json" 2015-02-19 13:19:04 +01:00
Clifford Wolf 1ecee6c49c Added "sat -dump_json" (WaveJSON format) 2015-02-19 10:53:40 +01:00
Clifford Wolf 20eb5cad4b Changed "show" defaults for Win32 2015-02-19 09:11:38 +01:00
Clifford Wolf f41378af8c Fixed clang (svn trunk) warnings 2015-02-18 14:54:22 +01:00
Clifford Wolf e4cf604ffd Merge branch 'master' of github.com:cliffordwolf/yosys 2015-02-18 07:19:03 +01:00
Clifford Wolf 5f54be54b8 Added "select %xe %cie %coe" 2015-02-18 07:18:34 +01:00
Clifford Wolf 024aa559e2 wreduce help typo fix 2015-02-17 13:02:16 +01:00
Clifford Wolf 0748ef638d Bugfix in wreduce 2015-02-16 09:08:00 +01:00
Clifford Wolf 0283703f9e Added Viz to yosys.js 2015-02-15 22:53:41 +01:00
Clifford Wolf 40f021e136 Added "check -noinit" 2015-02-15 12:58:12 +01:00
Clifford Wolf a54c994e2b Cosmetic fixes in "hierarchy" for blackbox modules 2015-02-15 12:57:41 +01:00
Clifford Wolf 3216f9420e More emscripten stuff, Added example app 2015-02-15 12:09:30 +01:00
Clifford Wolf c6ae9ebb79 Fixed "stat" handling of blackbox modules 2015-02-14 22:36:34 +01:00
Clifford Wolf e9368a1d7e Various fixes for memories with offsets 2015-02-14 14:21:15 +01:00
Clifford Wolf dcf2e24240 Added $meminit support to "memory" command 2015-02-14 12:55:03 +01:00
Clifford Wolf 910556560f Added $meminit cell type 2015-02-14 10:23:03 +01:00
Clifford Wolf a0a0594d1e hotfix in "check" command 2015-02-13 14:40:49 +01:00
Clifford Wolf 04cb947d6a Added "check" command 2015-02-13 14:34:51 +01:00
Clifford Wolf d58c3eca3a Some test related fixes 
(incl. removal of three bad test cases)
 2015-02-12 17:45:44 +01:00
Clifford Wolf 554a8df5e2 Added "proc_dlatch" 2015-02-12 16:56:01 +01:00
Clifford Wolf 87819c62fa Less aggressive "share" defaults 2015-02-10 20:51:37 +01:00
Clifford Wolf 510deb3577 Added "scc -expect <N> -nofeedback" 2015-02-10 08:48:55 +01:00
Clifford Wolf f889e3d385 Fixed iterator invalidation bug in "rename" command 2015-02-09 00:18:36 +01:00
Clifford Wolf 07afb14318 Fixed bug in "show -format .." 2015-02-08 23:29:54 +01:00
Clifford Wolf bcd8a2fc56 Fixed eval_select_op() api 2015-02-08 19:06:16 +01:00
Clifford Wolf 09ee65a050 Added eval_select_args() and eval_select_op() 2015-02-08 18:56:06 +01:00
Clifford Wolf 5170b86108 Added equiv_add 2015-02-08 11:59:38 +01:00
Clifford Wolf d5e30978e9 Added "select -read" 2015-02-06 10:01:22 +01:00
Clifford Wolf a038787c9b Added onehot attribute 2015-02-04 18:52:54 +01:00
Clifford Wolf 8805c24640 Fixed opt_clean performance bug 2015-02-04 16:34:06 +01:00
Clifford Wolf a8f4a099b5 Using design->selected_modules() in opt_* 2015-02-03 23:45:01 +01:00
Clifford Wolf 6eb34038f4 Merge pull request #48 from rubund/master 
Fixed typos found by lintian
 2015-02-01 22:55:52 +01:00
Clifford Wolf 893fe87a33 Improved performance in equiv_simple 2015-02-01 22:50:48 +01:00
Ruben Undheim 49649d6ef0 Fixed typos found by lintian 2015-02-01 21:49:55 +01:00
Clifford Wolf 9abbeefe6e Using selections in "ls" command 2015-02-01 00:13:19 +01:00
Clifford Wolf 8dfa105255 Bugfix in opt_const $eq -> buffer code 2015-01-31 23:25:32 +01:00
Clifford Wolf 1d92915a55 Fixed equiv_make for partially undriven nets (e.g. after "clean -purge") 2015-01-31 21:07:42 +01:00
Clifford Wolf bc86b4a7e9 Added "equiv_induct -undef" 2015-01-31 13:58:04 +01:00
Clifford Wolf e9cfc4a453 Added "equiv_simple -undef" 2015-01-31 13:06:41 +01:00
Clifford Wolf f80f5b721d Added "equiv_make -blacklist <file> -encfile <file>" 2015-01-31 12:08:20 +01:00
Clifford Wolf bedd46338f Added "fsm -encfile" 2015-01-30 22:46:53 +01:00
Clifford Wolf 9ebf803cbe Improved an error message 2015-01-28 00:46:00 +01:00
Clifford Wolf df64542288 Fixed bug in equiv_miter 2015-01-28 00:34:30 +01:00
Clifford Wolf 23e54bda81 Added "sat -show-ports" 2015-01-27 23:04:28 +00:00
Clifford Wolf 13b50bacfe Rethrow with "catch(...) throw;" 2015-01-25 22:57:09 +01:00
Clifford Wolf acfaeb8d34 Added equiv_remove 2015-01-25 14:20:22 +01:00
Clifford Wolf 66a6b86daa Added equiv_miter 2015-01-25 14:00:49 +01:00
Clifford Wolf 2a9ad48eb6 Added ENABLE_NDEBUG makefile options 2015-01-24 12:16:46 +01:00
Clifford Wolf 75bbeb828a Various equiv_* improvements 2015-01-24 00:32:24 +01:00
Clifford Wolf 43951099cf Added dict/pool.sort() 2015-01-24 00:13:27 +01:00
Clifford Wolf 1cb4c925d0 Improvements in equiv_make, equiv_induct 2015-01-22 21:23:01 +01:00
Clifford Wolf 5707ba22c1 Improved xdot calling 2015-01-22 20:45:53 +01:00
Clifford Wolf f6d94e8720 Added equiv_induct 2015-01-22 14:03:18 +01:00
Clifford Wolf a6aa32e762 Various equiv_simple improvements 2015-01-22 13:42:04 +01:00
Clifford Wolf 0a225f8b27 Moved equiv stuff to passes/equiv/ 2015-01-22 12:03:15 +01:00
Clifford Wolf abf8398216 Progress in equiv_simple 2015-01-21 23:59:58 +00:00
Clifford Wolf 74e1de1fac Fixed opt_muxtree performance bug 2015-01-21 16:44:07 +01:00
Clifford Wolf 5febbe3620 Added equiv_simple 2015-01-19 15:08:44 +01:00
Clifford Wolf 615c2e136e Added equiv_status 2015-01-19 14:20:04 +01:00
Clifford Wolf 76c5d863c5 Added equiv_make command 2015-01-19 13:59:08 +01:00
Clifford Wolf 8d295730e5 Refactoring of memory_bram and xilinx brams 2015-01-18 19:05:29 +01:00
Clifford Wolf f630868bc9 Improvements in opt_muxtree 2015-01-18 12:57:36 +01:00
Clifford Wolf d3b35017f8 More opt_muxtree cleanups 2015-01-18 12:13:18 +01:00
Clifford Wolf 61192514e3 Various cleanups and improvements in opt_muxtree 2015-01-18 11:17:56 +01:00
Clifford Wolf 8658eed52a Added support for memories to flatten (techmap) 2015-01-17 20:46:52 +01:00
Clifford Wolf a95c229e12 Fixed a bug in opt_muxtree for "mux forests" 2015-01-17 13:56:53 +01:00
Clifford Wolf 3628ca989c Improved opt_muxtree 2015-01-17 12:05:19 +01:00
Clifford Wolf 8ce8a230f4 Bugfix in dff2dffe 2015-01-16 17:51:17 +01:00
Clifford Wolf 2e36faeced Added "abc -lut w1:w2" 2015-01-15 13:37:48 +01:00
Clifford Wolf 9065fb25cc Fixed handling of foo.__TECHMAP_... 2015-01-15 13:36:57 +01:00
Clifford Wolf 8426884b40 Re-enabled mux->and/or transform (and fixed lm32 in yosys-bigsim) 2015-01-13 13:20:09 +01:00
Clifford Wolf 95f1eb9b87 Only enable code coverage counters on linux 2015-01-09 17:32:53 +01:00
Clifford Wolf fd787609aa disabled problematic mux -> and/or transform 2015-01-07 23:25:51 +01:00
Clifford Wolf b26590f8ab memory_bram hotfix for memories with width 1 2015-01-06 23:59:53 +01:00
Clifford Wolf da72050107 removed old debug code 2015-01-06 16:08:04 +01:00
Clifford Wolf 9474928672 Towards Xilinx bram support 2015-01-06 15:26:33 +01:00
Clifford Wolf 4a0b3a5423 Various small improvements to synth_xilinx 2015-01-06 14:37:50 +01:00
Clifford Wolf 081e1a49f8 Towards Xilinx bram support 2015-01-06 14:26:51 +01:00
Clifford Wolf 462b22f44f dict<> ref vs insert bugfix 2015-01-06 00:16:44 +01:00
Clifford Wolf 9ea2511fe8 Towards Xilinx bram support 2015-01-05 13:59:04 +01:00
Clifford Wolf 8898897f7b Towards Xilinx bram support 2015-01-04 14:23:30 +01:00
Clifford Wolf daae35319b Added memory_bram "shuffle_enable" feature 2015-01-04 13:14:30 +01:00