mirror of https://github.com/YosysHQ/yosys.git
Improvements in greenpak4 shreg mapping
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c9c5192cd6
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@ -26,8 +26,8 @@ PRIVATE_NAMESPACE_BEGIN
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struct ShregmapTech
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{
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virtual ~ShregmapTech() { }
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virtual bool check_taps(const dict<int, SigBit> &taps) = 0;
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virtual bool fixup_shreg(Cell *cell, dict<int, SigBit> &taps) = 0;
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virtual bool analyze(vector<int> &taps) = 0;
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virtual bool fixup(Cell *cell, dict<int, SigBit> &taps) = 0;
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};
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struct ShregmapOptions
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@ -54,18 +54,22 @@ struct ShregmapOptions
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struct ShregmapTechGreenpak4 : ShregmapTech
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{
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bool check_taps(const dict<int, SigBit> &taps)
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bool analyze(vector<int> &taps)
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{
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if (GetSize(taps) > 2 && taps[0] == 0 && taps[2] < 17) {
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taps.clear();
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return true;
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}
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if (GetSize(taps) > 2)
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return false;
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for (auto tap : taps)
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if (tap.first > 16) return false;
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if (taps.back() > 16) return false;
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return true;
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}
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bool fixup_shreg(Cell *cell, dict<int, SigBit> &taps)
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bool fixup(Cell *cell, dict<int, SigBit> &taps)
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{
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auto D = cell->getPort("\\D");
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auto C = cell->getPort("\\C");
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@ -232,31 +236,47 @@ struct ShregmapWorker
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Cell *first_cell = chain[cursor];
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IdString q_port = opts.ffcells.at(first_cell->type).second;
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dict<int, SigBit> taps;
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dict<int, SigBit> taps_dict;
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if (opts.tech)
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{
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vector<SigBit> qbits;
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vector<int> taps;
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for (int i = 0; i < depth; i++)
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{
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Cell *cell = chain[cursor+i];
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auto qbit = sigmap(cell->getPort(q_port));
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qbits.push_back(qbit);
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if (sigbit_with_non_chain_users.count(qbit))
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taps[i] = qbit;
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taps.push_back(i);
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}
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while (depth > 0)
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{
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Cell *last_cell = chain[cursor+depth-1];
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taps[depth-1] = sigmap(last_cell->getPort(q_port));
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if (opts.tech->check_taps(taps))
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if (taps.empty() || taps.back() < depth-1)
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taps.push_back(depth-1);
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if (opts.tech->analyze(taps))
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break;
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taps.erase(--depth);
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taps.pop_back();
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depth--;
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}
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depth = 0;
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for (auto tap : taps) {
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taps_dict[tap] = qbits.at(tap);
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log_assert(depth < tap+1);
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depth = tap+1;
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}
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}
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if (depth < 2)
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return;
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if (depth < 2) {
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cursor++;
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continue;
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}
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Cell *last_cell = chain[cursor+depth-1];
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@ -318,7 +338,7 @@ struct ShregmapWorker
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first_cell->setPort(q_port, last_cell->getPort(q_port));
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first_cell->setParam("\\DEPTH", depth);
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if (opts.tech != nullptr && !opts.tech->fixup_shreg(first_cell, taps))
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if (opts.tech != nullptr && !opts.tech->fixup(first_cell, taps_dict))
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remove_cells.insert(first_cell);
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for (int i = 1; i < depth; i++)
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@ -479,7 +499,6 @@ struct ShregmapPass : public Pass {
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string tech = args[++argidx];
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if (tech == "greenpak4") {
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clkpol = "pos";
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opts.maxlen = 16;
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opts.zinit = true;
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opts.tech = new ShregmapTechGreenpak4;
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} else {
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