mirror of https://github.com/YosysHQ/yosys.git
Improved opt_muxtree
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b32ba6f568
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3628ca989c
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@ -256,7 +256,7 @@ struct OptMuxtreeWorker
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list.push_back(value);
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}
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std::vector<int> sig2bits(RTLIL::SigSpec sig)
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std::vector<int> sig2bits(RTLIL::SigSpec sig, bool skip_non_wires = true)
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{
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std::vector<int> results;
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assign_map.apply(sig);
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@ -271,7 +271,8 @@ struct OptMuxtreeWorker
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bit2num[info.bit] = info.num;
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}
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results.push_back(bit2num[bit]);
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}
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} else if (!skip_non_wires)
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results.push_back(-1);
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return results;
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}
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@ -285,7 +286,7 @@ struct OptMuxtreeWorker
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// database of known active signals
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// the 2nd dimension is the list of or-ed signals. so we know that
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// for each i there is a j so that known_active[i][j] points to an
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// inactive control signal.
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// active control signal.
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std::vector<std::vector<int>> known_active;
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// this is just used to keep track of visited muxes in order to prohibit
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@ -331,10 +332,43 @@ struct OptMuxtreeWorker
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}
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}
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void replace_known(knowledge_t &knowledge, muxinfo_t &muxinfo, IdString portname)
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{
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SigSpec sig = muxinfo.cell->getPort(portname);
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bool did_something = false;
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std::vector<int> bits = sig2bits(sig, false);
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for (int i = 0; i < GetSize(bits); i++) {
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if (bits[i] < 0)
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continue;
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if (knowledge.known_inactive[bits[i]]) {
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sig[i] = State::S0;
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did_something = true;
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} else {
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for (auto &it : knowledge.known_active)
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if (GetSize(it) == 1 && it.front() == bits[i]) {
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sig[i] = State::S1;
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did_something = true;
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break;
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}
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}
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}
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if (did_something) {
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log(" Replacing known input bits on port %s of cell %s: %s -> %s\n", log_id(portname),
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log_id(muxinfo.cell), log_signal(muxinfo.cell->getPort(portname)), log_signal(sig));
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muxinfo.cell->setPort(portname, sig);
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}
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}
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void eval_mux(knowledge_t &knowledge, int mux_idx)
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{
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muxinfo_t &muxinfo = mux2info[mux_idx];
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// set input ports to constants if we find known active or inactive signals
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replace_known(knowledge, muxinfo, "\\A");
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replace_known(knowledge, muxinfo, "\\B");
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// if there is a constant activated port we just use it
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for (size_t port_idx = 0; port_idx < muxinfo.ports.size()-1; port_idx++)
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{
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@ -360,7 +394,7 @@ struct OptMuxtreeWorker
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}
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// compare ports with known_inactive and known_active signals. If all control
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// signals of the port are know_inactive or if the control signals of all other
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// signals of the port are known_inactive or if the control signals of all other
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// ports are known_active this port can't be activated. this loop includes the
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// default port but no known_inactive match is performed on the default port.
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for (size_t port_idx = 0; port_idx < muxinfo.ports.size(); port_idx++)
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