mirror of https://github.com/YosysHQ/yosys.git
Optimizing no-op cell->setPort()
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@ -1839,7 +1839,9 @@ void RTLIL::Cell::setPort(RTLIL::IdString portname, RTLIL::SigSpec signal)
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connections_[portname] = RTLIL::SigSpec();
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conn_it = connections_.find(portname);
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log_assert(conn_it != connections_.end());
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}
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} else
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if (conn_it->second == signal)
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return;
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for (auto mon : module->monitors)
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mon->notify_connect(this, conn_it->first, conn_it->second, signal);
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