mirror of https://github.com/YosysHQ/yosys.git
hotfix in "check" command
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@ -91,7 +91,8 @@ struct CheckPass : public Pass {
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wire_drivers[sig[i]].push_back(stringf("module input %s[%d]", log_id(wire), i));
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}
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if (wire->port_output)
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for (auto bit : sigmap(wire)) used_wires.insert(bit);
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for (auto bit : sigmap(wire))
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if (bit.wire) used_wires.insert(bit);
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}
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for (auto it : wire_drivers)
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