mirror of https://github.com/YosysHQ/yosys.git
Fixed a bug in opt_muxtree for "mux forests"
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3628ca989c
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@ -69,6 +69,8 @@ struct OptMuxtreeWorker
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std::vector<muxinfo_t> mux2info;
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std::set<int> root_muxes;
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OptMuxtreeWorker(RTLIL::Design *design, RTLIL::Module *module) :
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design(design), module(module), assign_map(module), removed_count(0)
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{
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@ -159,15 +161,26 @@ struct OptMuxtreeWorker
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log(" Evaluating internal representation of mux trees.\n");
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std::set<int> root_muxes;
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dict<int, pool<int>> mux_to_users;
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for (auto &bi : bit2info) {
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for (int i : bi.mux_drivers)
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for (int j : bi.mux_users)
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mux_to_users[i].insert(j);
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if (!bi.seen_non_mux)
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continue;
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for (int mux_idx : bi.mux_drivers)
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root_muxes.insert(mux_idx);
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}
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for (int mux_idx : root_muxes)
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for (auto &it : mux_to_users)
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if (GetSize(it.second) > 1)
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root_muxes.insert(it.first);
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for (int mux_idx : root_muxes) {
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log(" Root of a mux tree: %s\n", log_id(mux2info[mux_idx].cell));
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eval_root_mux(mux_idx);
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}
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log(" Analyzing evaluation results.\n");
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@ -317,7 +330,8 @@ struct OptMuxtreeWorker
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parent_muxes.push_back(m);
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}
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for (int m : parent_muxes)
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eval_mux(knowledge, m);
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if (!root_muxes.count(m))
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eval_mux(knowledge, m);
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for (int m : parent_muxes)
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knowledge.visited_muxes.erase(m);
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@ -355,7 +369,7 @@ struct OptMuxtreeWorker
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}
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if (did_something) {
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log(" Replacing known input bits on port %s of cell %s: %s -> %s\n", log_id(portname),
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log(" Replacing known input bits on port %s of cell %s: %s -> %s\n", log_id(portname),
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log_id(muxinfo.cell), log_signal(muxinfo.cell->getPort(portname)), log_signal(sig));
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muxinfo.cell->setPort(portname, sig);
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}
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