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Renamed counters pass to greenpak4_counters

This commit is contained in:
Andrew Zonenberg 2016-03-30 22:52:01 -07:00
parent 1ae33344f4
commit 984561c034
4 changed files with 12 additions and 9 deletions
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1
passes/techmap/Makefile.inc
View File

@ -25,7 +25,6 @@ OBJS += passes/techmap/aigmap.o
OBJS += passes/techmap/tribuf.o
OBJS += passes/techmap/lut2mux.o
OBJS += passes/techmap/nlutmap.o
OBJS += passes/techmap/counters.o
OBJS += passes/techmap/dffsr2dff.o
endif

1
techlibs/greenpak4/Makefile.inc
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@ -1,5 +1,6 @@
OBJS += techlibs/greenpak4/synth_greenpak4.o
OBJS += techlibs/greenpak4/greenpak4_counters.o
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_map.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_sim.v))

15
passes/techmap/counters.cc → techlibs/greenpak4/greenpak4_counters.cc
View File

@ -87,7 +87,7 @@ bool is_unconnected(const RTLIL::SigSpec& port, ModIndex& index)
return true;
}
void counters_worker(ModIndex& index, Module *module, Cell *cell, unsigned int& total_counters)
void greenpak4_counters_worker(ModIndex& index, Module *module, Cell *cell, unsigned int& total_counters)
{
SigMap& sigmap = index.sigmap;
@ -243,20 +243,21 @@ void counters_worker(ModIndex& index, Module *module, Cell *cell, unsigned int&
module->remove(underflow_inv);
}
struct CountersPass : public Pass {
CountersPass() : Pass("counters", "Extract counter cells") { }
struct Greenpak4CountersPass : public Pass {
Greenpak4CountersPass() : Pass("greenpak4_counters", "Extract GreenPak4 counter cells") { }
virtual void help()
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
log(" counters [options] [selection]\n");
log(" greenpak4_counters [options] [selection]\n");
log("\n");
log("This pass converts resettable down counters to GreenPak4 counter cells\n");
log("This pass converts non-resettable down counters to GreenPak4 counter cells\n");
log("(All other GreenPak4 counter modes must be instantiated manually for now.)\n");
log("\n");
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{
log_header("Executing COUNTERS pass (mapping counters to hard IP blocks).\n");
log_header("Executing GREENPAK4_COUNTERS pass (mapping counters to hard IP blocks).\n");
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++)
@ -273,7 +274,7 @@ struct CountersPass : public Pass {
{
ModIndex index(module);
for (auto cell : module->selected_cells())
counters_worker(index, module, cell, total_counters);
greenpak4_counters_worker(index, module, cell, total_counters);
}
if(total_counters)

4
techlibs/greenpak4/synth_greenpak4.cc
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@ -82,6 +82,8 @@ struct SynthGreenPAK4Pass : public Pass {
log(" synth -run coarse\n");
log("\n");
log(" fine:\n");
log(" greenpak4_counters\n");
log(" clean\n");
log(" opt -fast -mux_undef -undriven -fine\n");
log(" memory_map\n");
log(" opt -undriven -fine\n");
@ -187,7 +189,7 @@ struct SynthGreenPAK4Pass : public Pass {
if (check_label(active, run_from, run_to, "fine"))
{
Pass::call(design, "counters");
Pass::call(design, "greenpak4_counters");
Pass::call(design, "clean");
Pass::call(design, "opt -fast -mux_undef -undriven -fine");
Pass::call(design, "memory_map");