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Added logic-loop error handling to freduce

This commit is contained in:
Clifford Wolf 2015-06-30 17:11:46 +02:00
parent 7987f23200
commit ee9188a5b4
1 changed files with 11 additions and 0 deletions
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11
passes/sat/freduce.cc
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@ -229,6 +229,7 @@ struct PerformReduction
SigMap &sigmap;
drivers_t &drivers;
std::set<std::pair<RTLIL::SigBit, RTLIL::SigBit>> &inv_pairs;
pool<SigBit> recursion_guard;
ezSatPtr ez;
SatGen satgen;
@ -246,6 +247,15 @@ struct PerformReduction
if (sigdepth.count(out) != 0)
return sigdepth.at(out);
if (recursion_guard.count(out)) {
string loop_signals;
for (auto loop_bit : recursion_guard)
loop_signals += string(" ") + log_signal(loop_bit);
log_error("Found logic loop:%s\n", loop_signals.c_str());
}
recursion_guard.insert(out);
if (drivers.count(out) != 0) {
std::pair<RTLIL::Cell*, std::set<RTLIL::SigBit>> &drv = drivers.at(out);
if (celldone.count(drv.first) == 0) {
@ -264,6 +274,7 @@ struct PerformReduction
sigdepth[out] = 0;
}
recursion_guard.erase(out);
return sigdepth.at(out);
}