mirror of https://github.com/YosysHQ/yosys.git
Fixed "stat" handling of blackbox modules
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@ -208,20 +208,17 @@ struct StatPass : public Pass {
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}
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extra_args(args, argidx, design);
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for (auto &it : design->modules_)
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for (auto mod : design->selected_modules())
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{
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if (!design->selected_module(it.first))
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continue;
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if (!top_mod && design->full_selection())
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if (it.second->get_bool_attribute("\\top"))
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top_mod = it.second;
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if (mod->get_bool_attribute("\\top"))
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top_mod = mod;
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statdata_t data(design, it.second, width_mode);
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mod_stat[it.first] = data;
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statdata_t data(design, mod, width_mode);
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mod_stat[mod->name] = data;
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log("\n");
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log("=== %s%s ===\n", RTLIL::id2cstr(it.first), design->selected_whole_module(it.first) ? "" : " (partially selected)");
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log("=== %s%s ===\n", RTLIL::id2cstr(mod->name), design->selected_whole_module(mod->name) ? "" : " (partially selected)");
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log("\n");
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data.log_data();
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}
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