Fixed test_autotb for modules with many cell ports

This commit is contained in:
Clifford Wolf 2016-04-25 16:37:11 +02:00
parent 93e107e455
commit 958fb29c76
1 changed files with 6 additions and 3 deletions

View File

@ -218,7 +218,8 @@ static void autotest(std::ostream &f, RTLIL::Design *design, int num_iter)
if (len > 0)
header2 += shorthand, len--;
header1.push_back(" " + it->first);
header1.back()[0] = shorthand++;
header1.back()[0] = shorthand;
shorthand = shorthand == 'Z' ? 'A' : shorthand+1;
}
else {
f << stringf(" 1'bx");
@ -237,7 +238,8 @@ static void autotest(std::ostream &f, RTLIL::Design *design, int num_iter)
if (len > 0)
header2 += shorthand, len--;
header1.push_back(" " + it->first);
header1.back()[0] = shorthand++;
header1.back()[0] = shorthand;
shorthand = shorthand == 'Z' ? 'A' : shorthand+1;
}
} else {
f << stringf(" 1'bx");
@ -256,7 +258,8 @@ static void autotest(std::ostream &f, RTLIL::Design *design, int num_iter)
if (len > 0)
header2 += shorthand, len--;
header1.push_back(" " + it->first);
header1.back()[0] = shorthand++;
header1.back()[0] = shorthand;
shorthand = shorthand == 'Z' ? 'A' : shorthand+1;
}
} else {
f << stringf(" 1'bx");