mirror of https://github.com/YosysHQ/yosys.git
Using dict<> and pool<> in alumacc pass
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09b51cb375
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@ -98,9 +98,9 @@ struct AlumaccWorker
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}
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};
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std::map<RTLIL::SigBit, int> bit_users;
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std::map<RTLIL::SigSpec, maccnode_t*> sig_macc;
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std::map<RTLIL::SigSig, std::set<alunode_t*>> sig_alu;
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dict<RTLIL::SigBit, int> bit_users;
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dict<RTLIL::SigSpec, maccnode_t*> sig_macc;
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dict<RTLIL::SigSig, pool<alunode_t*, hash_ptr_ops>> sig_alu;
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int macc_counter, alu_counter;
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AlumaccWorker(RTLIL::Module *module) : module(module), sigmap(module)
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@ -215,7 +215,7 @@ struct AlumaccWorker
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{
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while (1)
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{
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std::set<maccnode_t*> delete_nodes;
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pool<maccnode_t*, hash_ptr_ops> delete_nodes;
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for (auto &it : sig_macc)
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{
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@ -267,7 +267,7 @@ struct AlumaccWorker
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void macc_to_alu()
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{
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std::set<maccnode_t*> delete_nodes;
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pool<maccnode_t*, hash_ptr_ops> delete_nodes;
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for (auto &it : sig_macc)
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{
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