Miodrag Milanovic
|
c0b14cfea7
|
Fixes for MSVC build
|
2019-10-04 16:29:46 +02:00 |
Eddie Hung
|
e9645c7fa7
|
Fix broken CI, check reset even for constants, trim rstmux
|
2019-10-02 21:26:26 -07:00 |
Eddie Hung
|
d99810ad8a
|
Refactor peepopt_dffmux and be sensitive to \init when trimming
|
2019-10-02 18:01:45 -07:00 |
Eddie Hung
|
aebbfffd71
|
Ooops AREG and BREG to default to -1
|
2019-09-27 11:57:53 -07:00 |
Eddie Hung
|
26657037b8
|
Update doc with max cascade chain of 20
|
2019-09-26 14:31:02 -07:00 |
Eddie Hung
|
5b9deef10d
|
Do not always zero out C (e.g. during cascade breaks)
|
2019-09-26 13:59:05 -07:00 |
Eddie Hung
|
95f0dd57df
|
Update doc
|
2019-09-26 13:44:41 -07:00 |
Eddie Hung
|
58f31096ab
|
Zero out ports
|
2019-09-26 13:40:38 -07:00 |
Eddie Hung
|
af59856ba1
|
xilinx_dsp_cascade to also cascade AREG and BREG
|
2019-09-26 13:29:18 -07:00 |
Eddie Hung
|
832216dab0
|
Try recursive pmgen for P cascade
|
2019-09-26 12:09:57 -07:00 |
Eddie Hung
|
bd8661e024
|
CREG to check for \keep
|
2019-09-26 10:32:01 -07:00 |
Eddie Hung
|
c0bb1d22e8
|
Remove newline
|
2019-09-26 10:31:55 -07:00 |
Eddie Hung
|
f1de93edf5
|
Do not die if DSP48E1.P has no users (would otherwise get 'clean'-ed)
|
2019-09-25 22:58:03 -07:00 |
Eddie Hung
|
cd8a640989
|
Reject if (* init *) present
|
2019-09-25 18:21:08 -07:00 |
Eddie Hung
|
aeb1539818
|
Rework xilinx_dsp postAdd for new wreduce call
|
2019-09-25 17:22:30 -07:00 |
Eddie Hung
|
5f8917c984
|
Fix memory issue since SigSpec& could be invalidated
|
2019-09-25 16:45:51 -07:00 |
Eddie Hung
|
486dd7c483
|
unextend only used in init
|
2019-09-25 14:05:59 -07:00 |
Eddie Hung
|
53ea5daa42
|
Call 'wreduce' after mul2dsp to avoid unextend()
|
2019-09-25 14:04:36 -07:00 |
Eddie Hung
|
e556d48d45
|
Set [AB]CASCREG to legal values
|
2019-09-23 16:00:11 -07:00 |
Eddie Hung
|
b824a56cde
|
Comment to explain separating CREG packing
|
2019-09-23 13:58:10 -07:00 |
Eddie Hung
|
15dfbc8125
|
Separate out CREG packing into new pattern, to avoid conflict with PREG
|
2019-09-23 13:27:10 -07:00 |
Eddie Hung
|
26a6c55665
|
Move log_debug("\n") later
|
2019-09-23 13:27:00 -07:00 |
Eddie Hung
|
d0dbbc2605
|
Move unextend initialisation later
|
2019-09-23 13:26:34 -07:00 |
Eddie Hung
|
a67af3d5e5
|
Use new port() overload once more
|
2019-09-23 13:00:44 -07:00 |
Eddie Hung
|
53817b8575
|
Use new port/param overload in pmg
|
2019-09-20 14:21:22 -07:00 |
Eddie Hung
|
d122083a11
|
Output pattern matcher items as log_debug()
|
2019-09-20 12:42:28 -07:00 |
Eddie Hung
|
95644b00cb
|
OPMODE is port not param
|
2019-09-20 12:37:29 -07:00 |
Eddie Hung
|
eb597431f0
|
Do not run xilinx_dsp_cascadeAB for now
|
2019-09-20 12:18:37 -07:00 |
Eddie Hung
|
0bca366bcd
|
WIP for xiinx_dsp_cascadeAB
|
2019-09-20 12:07:14 -07:00 |
Eddie Hung
|
b0ad2592be
|
Run until convergence
|
2019-09-20 12:04:16 -07:00 |
Eddie Hung
|
1b892ca1be
|
Cleanup ice40_dsp.pmg
|
2019-09-20 12:03:45 -07:00 |
Eddie Hung
|
d88903e610
|
Cleanup xilinx_dsp
|
2019-09-20 12:03:25 -07:00 |
Eddie Hung
|
1809f463fb
|
More exceptions
|
2019-09-20 12:03:10 -07:00 |
Eddie Hung
|
70c5444b25
|
Update doc
|
2019-09-20 10:07:54 -07:00 |
Eddie Hung
|
ed187ef1cf
|
Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT
|
2019-09-20 10:00:09 -07:00 |
Eddie Hung
|
1844498c5f
|
Add an overload for port/param with default value
|
2019-09-20 09:59:42 -07:00 |
Eddie Hung
|
a0d3ecf8c6
|
Small cleanup
|
2019-09-20 08:41:28 -07:00 |
Eddie Hung
|
8cfcaf108e
|
Disable support for SB_MAC16 reset since it is async
|
2019-09-19 22:48:57 -07:00 |
Eddie Hung
|
a59f80834f
|
SB_MAC16 ffCD to not pack same as ffO
|
2019-09-19 22:39:47 -07:00 |
Eddie Hung
|
1b88211ec6
|
Clarify
|
2019-09-19 21:58:34 -07:00 |
Eddie Hung
|
34f9a8ceb2
|
Update doc for ice40_dsp
|
2019-09-19 21:57:11 -07:00 |
Eddie Hung
|
8a94ce7aa5
|
Add an index
|
2019-09-19 20:04:44 -07:00 |
Eddie Hung
|
c83a667555
|
Fix width of D
|
2019-09-19 18:08:46 -07:00 |
Eddie Hung
|
a8bc460805
|
Use ID() macro
|
2019-09-19 16:13:22 -07:00 |
Eddie Hung
|
37b0fc17e3
|
Re-enable sign extension for C input
|
2019-09-19 15:40:17 -07:00 |
Eddie Hung
|
64a72ed51e
|
Do not perform width-checks for DSP48E1 which is much more complicated
|
2019-09-19 14:50:11 -07:00 |
Eddie Hung
|
517ca49963
|
Remove TODO as check should not be necessary
|
2019-09-19 14:49:47 -07:00 |
Eddie Hung
|
307b2dc8e5
|
Revert index to select
|
2019-09-19 14:46:53 -07:00 |
Eddie Hung
|
ea5e5a212e
|
Cleanup xilinx_dsp too
|
2019-09-19 14:34:06 -07:00 |
Eddie Hung
|
1a0f7ed09c
|
Refactor ce{mux,pol} -> hold{mux,pol}
|
2019-09-19 14:27:25 -07:00 |
Eddie Hung
|
429c9852ce
|
Add HOLD/RST support for SB_MAC16
|
2019-09-19 14:02:55 -07:00 |
Eddie Hung
|
2766465a2b
|
Add support for SB_MAC16 CD and H registers
|
2019-09-19 12:14:33 -07:00 |
Eddie Hung
|
c8310a6e76
|
Refactor ice40_dsp.pmg
|
2019-09-19 12:00:48 -07:00 |
Eddie Hung
|
29d446d758
|
Cleanup
|
2019-09-19 10:39:00 -07:00 |
Eddie Hung
|
f7dbfef792
|
Merge remote-tracking branch 'origin/master' into xc7dsp
|
2019-09-18 12:40:21 -07:00 |
Eddie Hung
|
b66c99ece0
|
Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext
peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells
|
2019-09-18 12:40:08 -07:00 |
Eddie Hung
|
44bf4ac35c
|
Add doc on pattern detector for overflow
|
2019-09-18 12:35:24 -07:00 |
Eddie Hung
|
347cbf59bd
|
Check overflow condition is power of 2 without using int32
|
2019-09-18 12:16:03 -07:00 |
Eddie Hung
|
1f18736d20
|
Add support for overflow using pattern detector
|
2019-09-18 09:39:59 -07:00 |
Eddie Hung
|
0932e23dff
|
Separate dffrstmux from dffcemux, fix typos
|
2019-09-18 09:34:42 -07:00 |
Eddie Hung
|
14d72c39c3
|
Revert "Make one check $shift(x)? only; change testcase to be 8b"
This reverts commit e2c2d784c8 .
|
2019-09-13 16:33:18 -07:00 |
Eddie Hung
|
3a39073302
|
Set more ports explicitly
|
2019-09-12 17:10:43 -07:00 |
Eddie Hung
|
f3081c20e7
|
Add support for A1 and B1 registers
|
2019-09-11 17:16:46 -07:00 |
Eddie Hung
|
4369fc17d0
|
Raise a RuntimeError instead of AssertionError
|
2019-09-11 17:06:37 -07:00 |
Eddie Hung
|
6fa6bf483c
|
Rename {A,B} -> {A2,B2}
|
2019-09-11 16:21:24 -07:00 |
Eddie Hung
|
3a49aa6b4a
|
Tidy up
|
2019-09-11 14:20:49 -07:00 |
Eddie Hung
|
817ac7c5e0
|
Fix UB
|
2019-09-11 14:18:02 -07:00 |
Eddie Hung
|
63431fe42a
|
Fix UB
|
2019-09-11 14:17:45 -07:00 |
Eddie Hung
|
690b1a064d
|
Add PCOUT -> PCIN non-shifted cascading
|
2019-09-11 13:48:45 -07:00 |
Eddie Hung
|
c0f26c2da8
|
Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
|
2019-09-11 13:37:11 -07:00 |
Eddie Hung
|
bdb5e0f29c
|
Cope with presence of reset muxes too
|
2019-09-11 13:36:37 -07:00 |
Eddie Hung
|
4937917cd8
|
Cleanup
|
2019-09-11 13:22:52 -07:00 |
Eddie Hung
|
e9eb855d38
|
Make unextend a udata
|
2019-09-11 13:06:49 -07:00 |
Eddie Hung
|
bbef0d2ac8
|
Only display log message if did_something
|
2019-09-11 12:29:26 -07:00 |
Eddie Hung
|
d232e6a6cd
|
Input registers to add DSP as new siguser to block upstream packing
|
2019-09-11 11:46:21 -07:00 |
Eddie Hung
|
e5bdb521fa
|
More cleanup
|
2019-09-11 10:55:45 -07:00 |
Eddie Hung
|
0d709d2bb5
|
Add support for A/B/C/D/AD reset
|
2019-09-11 10:15:19 -07:00 |
Eddie Hung
|
ded805ae5d
|
Add support for RSTM
|
2019-09-11 07:34:14 -07:00 |
Eddie Hung
|
fc7008671f
|
Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
|
2019-09-11 00:57:25 -07:00 |
Eddie Hung
|
edf90afd20
|
Rename dffmuxext -> dffmux, also remove constants in dff+mux
|
2019-09-11 00:56:38 -07:00 |
Eddie Hung
|
6b23c7c227
|
Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
|
2019-09-11 00:07:33 -07:00 |
Eddie Hung
|
feb3fa65a3
|
Merge remote-tracking branch 'origin/master' into xc7dsp
|
2019-09-11 00:01:31 -07:00 |
Eddie Hung
|
b08797da6b
|
Only pack out registers if \init is zero or x; then remove \init from PREG
|
2019-09-10 21:33:14 -07:00 |
Eddie Hung
|
37a34eeb04
|
Fix RSTP
|
2019-09-10 20:56:13 -07:00 |
Eddie Hung
|
af147d1430
|
Add support for RSTP
|
2019-09-10 20:51:48 -07:00 |
Eddie Hung
|
c6df55a9e7
|
enpol -> cepol
|
2019-09-10 18:59:03 -07:00 |
Eddie Hung
|
86700c2bea
|
d?ffmux -> d?ffcemux
|
2019-09-10 18:52:54 -07:00 |
Eddie Hung
|
8b8a68b38a
|
Refactor MREG and PREG to out_dffe subpattern
|
2019-09-10 18:27:05 -07:00 |
Eddie Hung
|
e64e650f9c
|
Update help text
|
2019-09-10 16:35:10 -07:00 |
Eddie Hung
|
d30b2a6d7e
|
Update xilinx_dsp help text
|
2019-09-10 16:33:13 -07:00 |
Eddie Hung
|
cba63fe72b
|
Oops
|
2019-09-09 22:06:23 -07:00 |
Eddie Hung
|
02cf9933b9
|
Support subtraction as well
|
2019-09-09 21:39:42 -07:00 |
Eddie Hung
|
31e60353ac
|
Support TWO24
|
2019-09-09 21:11:41 -07:00 |
Eddie Hung
|
0bb6fd8448
|
Refactor
|
2019-09-09 20:58:54 -07:00 |
Eddie Hung
|
5a6552e56b
|
Add initial USE_SIMD=FOUR12 support
|
2019-09-09 20:57:20 -07:00 |
Eddie Hung
|
2c04430445
|
Only trim sigM if USE_MULT; only look for ffM then too
|
2019-09-09 20:57:03 -07:00 |
Eddie Hung
|
be0eaf3a9a
|
Fix misspelling
|
2019-09-09 16:46:33 -07:00 |
Eddie Hung
|
6348f9512c
|
Rename
|
2019-09-09 16:45:38 -07:00 |
Eddie Hung
|
1df9c5d277
|
Oops
|
2019-09-09 16:07:40 -07:00 |
Eddie Hung
|
5f8f0e1383
|
Tidy up
|
2019-09-09 15:59:10 -07:00 |
Eddie Hung
|
04bc287271
|
Refactor using subpattern in_dffe
|
2019-09-09 15:51:14 -07:00 |
Eddie Hung
|
e2c2d784c8
|
Make one check $shift(x)? only; change testcase to be 8b
|
2019-09-06 22:48:23 -07:00 |
Eddie Hung
|
74a5c802f7
|
Pack CREG
|
2019-09-06 21:01:36 -07:00 |
Eddie Hung
|
6a9205280f
|
Use unextend lambda
|
2019-09-06 18:40:11 -07:00 |
Eddie Hung
|
b69512a5b9
|
Fix ffP just like ffPmux
|
2019-09-06 15:51:21 -07:00 |
Eddie Hung
|
5344bfe637
|
Perform D replacement properly
|
2019-09-06 15:46:15 -07:00 |
Eddie Hung
|
74eac76699
|
Add support for DREG
|
2019-09-06 15:32:26 -07:00 |
Eddie Hung
|
ef56f8596f
|
Fine tune nusers when postAdd
|
2019-09-06 15:11:41 -07:00 |
Eddie Hung
|
0d1d8b4d24
|
Fix macc and mul tests
|
2019-09-06 14:57:36 -07:00 |
Eddie Hung
|
8246062acf
|
Fix enable polarity
|
2019-09-06 14:36:10 -07:00 |
Eddie Hung
|
2c32056990
|
Logging for ffAD
|
2019-09-06 14:10:12 -07:00 |
Eddie Hung
|
e926f2973e
|
Add support for pre-adder and AD register
|
2019-09-06 14:06:57 -07:00 |
Eddie Hung
|
da8fe83f7a
|
Tidy up ice40_dsp some more
|
2019-09-06 12:16:40 -07:00 |
Eddie Hung
|
776d769941
|
Use more index patterns
|
2019-09-06 12:07:35 -07:00 |
Eddie Hung
|
a945f6c7ef
|
Fix ffPmux to cope with offset
|
2019-09-06 11:58:56 -07:00 |
Eddie Hung
|
fbf1b74946
|
Simplify filter expressions
|
2019-09-06 11:39:20 -07:00 |
Eddie Hung
|
39a5d046ea
|
Fix nusers condition in ffP
|
2019-09-06 11:38:19 -07:00 |
Eddie Hung
|
cdc1e1f5c2
|
Check adder is <= 48 bits before packing
|
2019-09-06 10:35:06 -07:00 |
Eddie Hung
|
91f68c4de2
|
Check nusers for M and P enable muxes
|
2019-09-06 09:59:35 -07:00 |
Eddie Hung
|
4fe24b20f9
|
More nusers() checks for A and B enable muxes
|
2019-09-06 09:47:32 -07:00 |
Eddie Hung
|
dc10559f31
|
Cleanup
|
2019-09-05 21:39:52 -07:00 |
Eddie Hung
|
174edbcb96
|
Sensitive to CEB CEM CEP polarity
|
2019-09-05 21:38:35 -07:00 |
Eddie Hung
|
53ca536d67
|
ffAmuxAB -> ffAenpol
|
2019-09-05 21:28:28 -07:00 |
Eddie Hung
|
5a2fc6fcb5
|
Refactor ice40_dsp
|
2019-09-05 18:06:59 -07:00 |
Eddie Hung
|
888ae1d05e
|
Fix broken ice40_dsp
|
2019-09-05 17:58:19 -07:00 |
Eddie Hung
|
38e73a3788
|
Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
|
2019-09-05 13:01:34 -07:00 |
Eddie Hung
|
a32b14a55f
|
Do not check signedness of post-adder (assume taken care of by DSP)
|
2019-09-05 12:38:47 -07:00 |
Eddie Hung
|
7bd55f379c
|
Use filter instead of index; support wide enable muxes
|
2019-09-05 11:55:14 -07:00 |
Eddie Hung
|
fe5a1324c9
|
Do not make ff[MP]mux semioptional, use sigmap
|
2019-09-05 11:46:38 -07:00 |
Eddie Hung
|
447a31e75d
|
Add support for CEP
|
2019-09-05 11:00:27 -07:00 |
Eddie Hung
|
05282afc25
|
Add support for CEB, remove check on nusers
|
2019-09-05 10:46:33 -07:00 |
Eddie Hung
|
0166e02e78
|
Cleanup
|
2019-09-05 10:07:56 -07:00 |
Eddie Hung
|
aa462da395
|
Support CEA
|
2019-09-05 10:07:26 -07:00 |
Eddie Hung
|
09c26c55bb
|
Get rid of sigBset too
|
2019-09-04 17:22:02 -07:00 |
Eddie Hung
|
91ef4457b0
|
Get rid of sigAset
|
2019-09-04 17:18:49 -07:00 |
Eddie Hung
|
42548d9790
|
Get rid of sigPused
|
2019-09-04 17:06:17 -07:00 |
Eddie Hung
|
93d798272d
|
Compute sigP properly
|
2019-09-04 16:59:57 -07:00 |
Eddie Hung
|
433b0c677c
|
Remove log_cell() calls
|
2019-09-04 13:42:44 -07:00 |
Eddie Hung
|
229e54568e
|
Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp
|
2019-09-04 12:37:48 -07:00 |
Eddie Hung
|
2b86055848
|
Add peepopt_dffmuxext
|
2019-09-04 12:35:15 -07:00 |
Eddie Hung
|
e67e4a5ed6
|
Support CEM
|
2019-09-04 10:52:51 -07:00 |
Eddie Hung
|
80aec0f006
|
st.ffP from if to assert
|
2019-09-03 16:37:59 -07:00 |
Eddie Hung
|
16316aa05d
|
Rename muxAB to postAddMux
|
2019-09-03 16:24:59 -07:00 |
Eddie Hung
|
cd002ad3fb
|
Use choices for addAB, now called postAdd
|
2019-09-03 16:10:16 -07:00 |
Eddie Hung
|
2d80866daf
|
Add support for load value into DSP48E1.P
|
2019-09-03 15:53:10 -07:00 |
Eddie Hung
|
682153de4b
|
Process post-adder first since C could be used for load-P
|
2019-09-03 14:57:59 -07:00 |
Eddie Hung
|
97d11708e0
|
Use feedback path for MACC
|
2019-09-03 14:37:32 -07:00 |
Eddie Hung
|
4aa505d1b2
|
Merge pull request #1344 from YosysHQ/eddie/ice40_signed_macc
ice40_dsp to allow signed multipliers
|
2019-09-01 10:11:33 -07:00 |
Eddie Hung
|
a09e69dd56
|
Fine tune xilinx_dsp pattern matcher
|
2019-08-30 16:18:58 -07:00 |
Eddie Hung
|
8f503fe3e6
|
autoremove ffM
|
2019-08-30 15:30:04 -07:00 |