mirror of https://github.com/YosysHQ/yosys.git
Re-enable sign extension for C input
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@ -322,10 +322,10 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
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opmode[5] = State::S1;
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if (opmode[4] != State::S0) {
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//if (st.postAddMuxAB == "\\A")
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// st.sigC.extend_u0(48, st.postAdd->getParam("\\B_SIGNED").as_bool());
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//else
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// st.sigC.extend_u0(48, st.postAdd->getParam("\\A_SIGNED").as_bool());
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if (st.postAddMuxAB == "\\A")
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st.sigC.extend_u0(48, st.postAdd->getParam("\\B_SIGNED").as_bool());
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else
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st.sigC.extend_u0(48, st.postAdd->getParam("\\A_SIGNED").as_bool());
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cell->setPort("\\C", st.sigC);
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}
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