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Revert "Make one check $shift(x)? only; change testcase to be 8b" 

This reverts commit e2c2d784c8.
This commit is contained in:
Eddie Hung 2019-09-13 16:33:18 -07:00
parent 3a49aa6b4a
commit 14d72c39c3
2 changed files with 4 additions and 5 deletions
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5
passes/pmgen/peepopt_shiftmul.pmg
View File

@ -50,9 +50,8 @@ code
if (GetSize(const_factor_cnst) > 20)
reject;
if (shift->type.in($shift, $shiftx))
if (GetSize(port(shift, \Y)) > const_factor)
reject;
if (GetSize(port(shift, \Y)) > const_factor)
reject;
int factor_bits = ceil_log2(const_factor);
SigSpec mul_din = port(mul, const_factor_port == \A ? \B : \A);

4
tests/various/peepopt.ys
View File

@ -16,7 +16,7 @@ select -assert-count 0 t:$shiftx t:* %D
design -reset
read_verilog <<EOT
module peepopt_shiftmul_1 (output [7:0] y, input [2:0] w);
assign y = 1'b1 >> (w * (8'b110));
assign y = 1'b1 >> (w * (3'b110));
endmodule
EOT
@ -25,7 +25,7 @@ equiv_opt -assert peepopt
design -load postopt
clean
select -assert-count 1 t:$shr
select -assert-count 0 t:$mul
select -assert-count 1 t:$mul
select -assert-count 0 t:$shr t:$mul %% t:* %D
####################