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Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp

This commit is contained in:
Eddie Hung 2019-09-11 00:07:33 -07:00
parent feb3fa65a3 97e1520b13
commit 6b23c7c227
2 changed files with 9 additions and 8 deletions
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5
passes/pmgen/peepopt_shiftmul.pmg
View File

@ -50,8 +50,9 @@ code
if (GetSize(const_factor_cnst) > 20)
reject;
if (GetSize(port(shift, \Y)) > const_factor)
reject;
if (shift->type.in($shift, $shiftx))
if (GetSize(port(shift, \Y)) > const_factor)
reject;
int factor_bits = ceil_log2(const_factor);
SigSpec mul_din = port(mul, const_factor_port == \A ? \B : \A);

12
tests/various/peepopt.ys
View File

@ -5,7 +5,7 @@ endmodule
EOT
prep -nokeepdc
equiv_opt peepopt
equiv_opt -assert peepopt
design -load postopt
clean
select -assert-count 1 t:$shiftx
@ -16,16 +16,16 @@ select -assert-count 0 t:$shiftx t:* %D
design -reset
read_verilog <<EOT
module peepopt_shiftmul_1 (output [7:0] y, input [2:0] w);
assign y = 1'b1 >> (w * (3'b110));
assign y = 1'b1 >> (w * (8'b110));
endmodule
EOT
prep -nokeepdc
equiv_opt peepopt
equiv_opt -assert peepopt
design -load postopt
clean
select -assert-count 1 t:$shr
select -assert-count 1 t:$mul
select -assert-count 0 t:$mul
select -assert-count 0 t:$shr t:$mul %% t:* %D
####################
@ -40,7 +40,7 @@ endmodule
EOT
prep -nokeepdc
equiv_opt peepopt
equiv_opt -assert peepopt
design -load postopt
clean
select -assert-count 0 t:*
@ -55,7 +55,7 @@ endmodule
EOT
prep -nokeepdc
equiv_opt peepopt
equiv_opt -assert peepopt
design -load postopt
clean
select -assert-count 1 t:$dff r:WIDTH=2 %i