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Do not make ff[MP]mux semioptional, use sigmap

This commit is contained in:
Eddie Hung 2019-09-05 11:46:38 -07:00
parent 447a31e75d
commit fe5a1324c9
2 changed files with 11 additions and 5 deletions
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7
passes/pmgen/xilinx_dsp.cc
View File

@ -121,7 +121,7 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
cell->setPort("\\CEM", State::S1);
SigSpec D = st.ffM->getPort("\\D");
SigSpec Q = st.ffM->getPort("\\Q");
P.replace(/*pm.sigmap*/(D), Q);
P.replace(pm.sigmap(D), Q);
cell->setParam("\\MREG", State::S1);
pm.autoremove(st.ffM);
@ -135,7 +135,7 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
cell->setPort("\\CEP", State::S1);
SigSpec D = st.ffP->getPort("\\D");
SigSpec Q = st.ffP->getPort("\\Q");
P.replace(/*pm.sigmap*/(D), Q);
P.replace(pm.sigmap(D), Q);
st.ffP->connections_.at("\\Q").replace(P, pm.module->addWire(NEW_ID, GetSize(P)));
cell->setParam("\\PREG", State::S1);
@ -149,6 +149,9 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
if (st.ffB)
log(" ffB:%s", log_id(st.ffB));
if (st.ffM)
log(" ffM:%s", log_id(st.ffM));
if (st.ffP)
log(" ffP:%s", log_id(st.ffP));

9
passes/pmgen/xilinx_dsp.pmg
View File

@ -120,7 +120,7 @@ match ffMmux
filter port(ffMmux, AB) == sigM.extract(0, GetSize(port(ffMmux, \Y)))
filter nusers(sigM.extract_end(GetSize(port(ffMmux, AB)))) <= 1
set ffMmuxAB AB
semioptional
optional
endmatch
code sigM
@ -207,12 +207,12 @@ match ffPmux
filter port(ffPmux, AB) == sigP.extract(0, GetSize(port(ffPmux, \Y)))
filter nusers(sigP.extract_end(GetSize(port(ffPmux, AB)))) <= 1
set ffPmuxAB AB
semioptional
optional
endmatch
code sigP
if (ffPmux)
sigP = port(ffPmux, \Y);
sigP.replace(port(ffPmux, ffPmuxAB), port(ffPmux, \Y));
endcode
match ffP
@ -243,6 +243,9 @@ code ffP sigP clock
sigP.replace(port(ffP, \D), port(ffP, \Q));
}
// Cannot have ffPmux enable mux without ffP
else if (ffPmux)
reject;
endcode
match postAddMux