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740 Commits

Author SHA1 Message Date
Eddie Hung 5a46a0b385 Fine tune aigerparse 2019-06-07 16:57:32 -07:00
Eddie Hung 30abdaf3b2 Allow muxcover costs to be changed 2019-06-07 08:34:11 -07:00
Eddie Hung fe4394fb9a Allow muxcover costs to be changed 2019-06-07 08:30:39 -07:00
Eddie Hung eaee250a6e Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux 2019-06-06 14:06:59 -07:00
Eddie Hung 83450a9489 Move muxpack from passes/techmap to passes/opt 2019-06-06 12:15:13 -07:00
Eddie Hung 3dd0682f29 Update doc 2019-06-06 12:11:59 -07:00
Eddie Hung 3e76e3a6fa Add tests, fix for != 2019-06-06 11:54:38 -07:00
Eddie Hung 543dd11c7e Missing file 2019-06-06 11:03:45 -07:00
Eddie Hung 7bd1c664a6 Initial adaptation of muxpack from shregmap 2019-06-06 10:51:02 -07:00
Eddie Hung fd8ef128bf Missing doc for -tech xilinx in shregmap 2019-06-05 14:21:44 -07:00
Eddie Hung 935df3569b shregmap -tech xilinx_static to handle INIT 2019-06-05 12:55:59 -07:00
Eddie Hung 72eda94a66 Continue support for ShregmapTechXilinx7Static 2019-06-05 12:33:55 -07:00
Eddie Hung dfe9d95579 Add -tech xilinx_static 2019-06-05 11:14:14 -07:00
Eddie Hung e1e37db860 Refactor to ShregmapTechXilinx7Static 2019-06-05 11:08:08 -07:00
Eddie Hung 45d1bdf83a shregmap -tech xilinx_dynamic to work -params and -enpol 2019-06-05 10:21:57 -07:00
Eddie Hung 94a5f4e609 Rename shregmap -tech xilinx -> xilinx_dynamic 2019-06-04 14:34:36 -07:00
Eddie Hung 295bd8d0bf Remove dupe 2019-06-03 12:32:20 -07:00
Eddie Hung eb08e71bd1 Merge branch 'xaig' into xc7mux 2019-05-31 13:03:03 -07:00
Eddie Hung a379234f56 Throw out unused code inherited from abc 2019-05-31 12:50:11 -07:00
Eddie Hung 4a6b9af227 Fix spelling 2019-05-30 15:50:47 -07:00
Eddie Hung a44fe3a632 Revert "Re-enable &dc2" 
This reverts commit 8c58c728a7.
 2019-05-30 11:41:50 -07:00
Eddie Hung 0800846e73 Do not double count LUT1s 2019-05-30 11:32:14 -07:00
Eddie Hung 8c58c728a7 Re-enable &dc2 2019-05-30 00:42:41 -07:00
Eddie Hung 2560f92f29 Reduce -W to 160 2019-05-29 23:01:46 -07:00
Eddie Hung 854557814e Erase all boxes before stitching 2019-05-29 19:17:36 -07:00
Eddie Hung b955344ecd Call &if with -W 250 2019-05-29 16:34:52 -07:00
Eddie Hung ecaa7856e9 Add some debug to abc9 2019-05-29 15:21:41 -07:00
Eddie Hung 4a76b425cc Misspell 2019-05-28 08:44:59 -07:00
Eddie Hung 89bd6b8504 If driver not found, use LUT2 2019-05-27 23:12:21 -07:00
Eddie Hung 4df37c77fd Disconnect all ABC boxes too 2019-05-27 19:40:27 -07:00
Eddie Hung 75bd41eaeb Parse without wideports 2019-05-27 12:22:05 -07:00
Eddie Hung bf3b8d5e45 Remove mapped_mod when done 2019-05-27 12:19:21 -07:00
Eddie Hung 234156c01a Instantiate cell type (from sym file) otherwise 'clean' warnings 2019-05-27 12:16:10 -07:00
Eddie Hung 03b289a851 Add 'cinput' and 'coutput' to symbols file for boxes 2019-05-27 11:38:52 -07:00
Eddie Hung 3981eba999 ABC9 to call &sweep 2019-05-26 11:31:35 -07:00
Eddie Hung 086b6560b4 Typo 2019-05-26 03:17:20 -07:00
Eddie Hung 823153e418 Combine ABC_COMMAND_LUT 2019-05-26 02:47:06 -07:00
Eddie Hung 32a4c10c0d Fix "a" extension 2019-05-26 02:44:36 -07:00
Eddie Hung 6ad09bfcea Add &fraig and &mfs back 2019-05-24 15:10:18 -07:00
Eddie Hung fb09c6219b Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-21 14:21:00 -07:00
Henner Zeller 5e443a5d0d Fix two instances of integer-assignment to string. 
o In cover.cc, the int-result of mkstemps() was assigned to a string
  and silently interpreted as a single-character filename with a funny
  value. Fix with the intent: assign the filename.
o in libparse.cc, an int was assigned to a string, but depending on
  visible constructors, this is ambiguous. Explicitly cast this to
  a char.
 2019-05-14 22:01:15 -07:00
Makai Mann 2f5cfa014b Zinit option '-singleton' -> '-all' 2019-05-10 10:23:14 -07:00
Clifford Wolf 3870e7cf29
Merge pull request #991 from kristofferkoch/gcc9-warnings 
Fix all warnings that occurred when compiling with gcc9
 2019-05-08 11:25:22 +02:00
Kristoffer Ellersgaard Koch 30c762d3a1 Fix all warnings that occurred when compiling with gcc9 2019-05-08 10:27:14 +02:00
David Shah a84256aa36 abc: Fix handling of postfixed names (e.g. for retiming) 
Signed-off-by: David Shah <dave@ds0.me>
 2019-05-04 17:23:44 +01:00
David Shah 5ce9113eda abc: Improve name recovery 
Signed-off-by: David Shah <dave@ds0.me>
 2019-05-04 16:53:25 +01:00
Eddie Hung e08df0c739 If init is 1'bx, do not add to dict as per @cliffordwolf 2019-05-03 08:06:16 -07:00
Eddie Hung fc349de033 Revert "dffinit -noreinit to silently continue when init value is 1'bx" 
This reverts commit aa081f83c7.
 2019-05-03 08:05:37 -07:00
Eddie Hung aa081f83c7 dffinit -noreinit to silently continue when init value is 1'bx 2019-05-02 17:40:39 -07:00
Eddie Hung 5cd19b52da Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-02 10:44:59 -07:00
Eddie Hung acafcdc94d Copy with 1'bx padding in $shiftx 2019-04-28 13:04:34 -07:00
Eddie Hung d9c915042a Move clean from aigerparse to abc9 2019-04-23 13:42:35 -07:00
Eddie Hung 4df4a97ffa Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig 2019-04-22 18:20:39 -07:00
Eddie Hung 0bd2bfa737 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 18:15:28 -07:00
Eddie Hung 5f30a8795d Tidy up 2019-04-22 17:47:05 -07:00
Eddie Hung d9daf09cf3
Merge pull request #914 from YosysHQ/xc7srl 
synth_xilinx to now infer SRL16E/SRLC32E
 2019-04-22 13:31:30 -07:00
Eddie Hung 4cfef7897f Merge branch 'xaig' into xc7mux 2019-04-22 11:58:59 -07:00
Eddie Hung 4486a98fd5 Merge remote-tracking branch 'origin/xc7srl' into xc7mux 2019-04-22 11:45:49 -07:00
Eddie Hung 4883391b63 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 11:19:52 -07:00
Clifford Wolf 8ed4a53d99
Merge pull request #951 from YosysHQ/clifford/logdebug 
Add log_debug() framework
 2019-04-22 20:09:51 +02:00
Eddie Hung e300b1922c Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-22 10:36:27 -07:00
Clifford Wolf e158ea2097 Add log_debug() framework 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 17:25:52 +02:00
whitequark aeeefc32d8 attrmap: extend -remove to allow removing attributes with any value. 
Currently, `-remove foo` would only remove an attribute `foo = ""`,
which doesn't work on an attribute like `src` that may have any
value. Extend `-remove` to handle both cases. `-remove foo=""` has
the old behavior, and `-remove foo` will remove the attribute with
whatever value it may have, which is still compatible with the old
behavior.
 2019-04-22 14:18:15 +00:00
Eddie Hung d06d4f35c3 Merge remote-tracking branch 'origin/clifford/libwb' into xaig 2019-04-21 18:10:46 -07:00
Clifford Wolf 7b35d57592 Disable blackbox detection in techmap files 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 02:07:36 +02:00
Eddie Hung d99422411f Use new pmux2shiftx from #944, remove my old attempt 2019-04-21 14:16:34 -07:00
Eddie Hung 9dc11cd842 Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-20 17:24:06 -07:00
Eddie Hung caec7f9d2c Merge remote-tracking branch 'origin/master' into xaig 2019-04-20 12:23:49 -07:00
Clifford Wolf f84a84e3f1
Merge pull request #943 from YosysHQ/clifford/whitebox 
[WIP] Add "whitebox" attribute, add "read_verilog -wb"
 2019-04-20 20:51:54 +02:00
Eddie Hung b25254020c Merge remote-tracking branch 'origin/pmux2shiftx' into xc7srl 2019-04-20 10:44:01 -07:00
Eddie Hung 13ad19482f Merge remote-tracking branch 'origin' into xc7srl 2019-04-20 10:41:43 -07:00
Clifford Wolf f3ad8d680a Add "techmap -wb", use in formal flows 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:23:24 +02:00
Clifford Wolf b7445ef387 Check blackbox attribute in techmap/simplemap 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:10:05 +02:00
Eddie Hung 9dec3d9978 Spelling fixes 2019-04-19 14:00:22 +02:00
Eddie Hung 290a798cec Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:32:00 -07:00
Eddie Hung c997a77014 Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:19:45 -07:00
Eddie Hung 070a2d2fd6 Fix abc's remap_name to not ignore [^0-9] when extracting sid 2019-04-18 09:55:03 -07:00
Eddie Hung 8fe0a961b3 Merge remote-tracking branch 'origin/clifford/whitebox' into xaig 2019-04-18 09:00:06 -07:00
Eddie Hung 9aa94370a5 ABC to call retime all the time 2019-04-18 08:46:41 -07:00
Clifford Wolf f4abc21d8a Add "whitebox" attribute, add "read_verilog -wb" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 17:45:47 +02:00
Eddie Hung a20ed260e1 Skip if abc_box_id earlier 2019-04-17 16:36:03 -07:00
Eddie Hung abcd3103ff Do not print slack histogram 2019-04-17 15:11:14 -07:00
Eddie Hung fd89c1056e Working ABC9 script 2019-04-17 12:33:32 -07:00
Eddie Hung ae2653c50f abc9 to output some more info 2019-04-16 16:39:16 -07:00
Eddie Hung 55a3638c71 Port from xc7mux branch 2019-04-16 15:01:45 -07:00
Eddie Hung fc5fda595d Merge branch 'xaig' into xc7mux 2019-04-16 13:15:53 -07:00
Eddie Hung afcb86c3d1 abc9 to call "setundef -zero" behaving as for abc 2019-04-16 13:10:13 -07:00
Eddie Hung 98c297fabf ABC to read_box before reading netlist 2019-04-16 12:44:10 -07:00
Eddie Hung a2b106135b Do not call abc on modules with abc_box_id attr 2019-04-16 11:19:42 -07:00
Eddie Hung 538592067e Merge branch 'xaig' into xc7mux 2019-04-15 22:04:20 -07:00
Eddie Hung 9bfcd80063 Handle __dummy_o__ and __const[01]__ in read_aiger not abc 2019-04-12 18:21:16 -07:00
Eddie Hung 482a60825b abc to ignore __dummy_o__ and __const[01]__ when re-integrating 2019-04-12 18:16:50 -07:00
Eddie Hung 88d43a519b Use -map instead of -symbols for aiger 2019-04-12 16:29:14 -07:00
Eddie Hung 941365b4bb Comment out 2019-04-12 12:29:04 -07:00
Eddie Hung 04e466d5e4 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-12 12:28:37 -07:00
Eddie Hung 3c1f1a6605 Fix ordering of when to insert zero index 2019-04-11 16:25:59 -07:00
Eddie Hung 53513c52df Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux 2019-04-11 16:21:01 -07:00
Eddie Hung f587950bde More unused 2019-04-11 16:20:43 -07:00
Eddie Hung 35181a7866 Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux 2019-04-11 16:18:45 -07:00
Eddie Hung b15b410b41 Remove unused 2019-04-11 16:18:01 -07:00
Eddie Hung b1f1db2fcf Fixes 2019-04-11 16:17:09 -07:00
Eddie Hung e8c26f2839 WIP 2019-04-11 15:52:04 -07:00
Eddie Hung 09e7eb7aed Spelling fixes 2019-04-11 15:09:13 -07:00
Eddie Hung 5f4024ffd2 Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen" 
This reverts commit 19271bd996.
 2019-04-10 08:31:40 -07:00
Eddie Hung 78d35a86c0 Revert ""&nf -D 0" fails => use "-D 1" instead" 
This reverts commit 3c253818ca.
 2019-04-10 08:31:35 -07:00
Eddie Hung d536379c62 Add "-lut <file>" support to abc9 2019-04-09 14:31:31 -07:00
Eddie Hung 7e304c362b Add "-box" option to abc9 2019-04-09 10:58:06 -07:00
Eddie Hung bd523abef5 Add 'setundef -zero' call prior to aigmap in abc9 2019-04-09 10:32:58 -07:00
Eddie Hung 3b6f85b0a6 Comment out 2019-04-09 10:09:43 -07:00
Eddie Hung 3fc474aa73 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-09 10:06:44 -07:00
Eddie Hung 12c34136ba More space fixing 2019-04-08 16:40:17 -07:00
Eddie Hung bca3cf6843 Merge branch 'master' into xaig 2019-04-08 16:31:59 -07:00
Eddie Hung 6797f6b6c4 $_XILINX_SHREG_ to preserve src attribute 2019-04-08 16:24:20 -07:00
Eddie Hung 93b1621911 Cope with undoing #895 2019-04-08 15:57:07 -07:00
Eddie Hung d3930ca79e Revert "Remove handling for $pmux, since #895" 
This reverts commit aa693d5723.
 2019-04-08 12:01:06 -07:00
Eddie Hung 1d526b7f06 Call shregmap twice -- once for variable, another for fixed 2019-04-05 17:35:49 -07:00
Eddie Hung 4afcad70e2 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 16:30:17 -07:00
Eddie Hung d559023007 Fix S0 -> S1 2019-04-05 16:28:14 -07:00
Eddie Hung 0364a5d811 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 15:46:18 -07:00
Eddie Hung 3c253818ca "&nf -D 0" fails => use "-D 1" instead 2019-04-05 15:30:19 -07:00
Eddie Hung 19271bd996 abc -dff now implies "-D 0" otherwise retiming doesn't happen 2019-04-05 14:42:25 -07:00
Eddie Hung aa693d5723 Remove handling for $pmux, since #895 2019-04-03 08:35:32 -07:00
Eddie Hung d8465590ac Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-03 03:36:11 -07:00
Niels Moseley 263ab60b43 Liberty file parser now accepts superfluous ; 2019-03-27 15:17:58 +01:00
Niels Moseley 487cb45b87 Liberty file parser now accepts superfluous ; 2019-03-27 15:15:53 +01:00
Eddie Hung 6b90d3cf6c Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-25 13:17:22 -07:00
Niels Moseley 1f7f54e68e spaces -> tabs 2019-03-25 14:12:04 +01:00
Niels Moseley 9d9cc8a314 EOL is now accepted as ';' replacement on lines that look like: feature_xyz(option) 2019-03-25 12:15:10 +01:00
Niels Moseley 3b3b77291a Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'. 2019-03-24 22:54:18 +01:00
Eddie Hung bf83c074c8 Cope with SHREG not having E port; Revert $pmux fine tune 2019-03-23 16:09:38 -07:00
Eddie Hung 098bd5758f Add support for SHREGMAP+$mux, also fine tune $pmux 2019-03-22 23:22:19 -07:00
Eddie Hung 0895093c7c Leftover printf 2019-03-22 19:14:04 -07:00
Eddie Hung 456295eb66 Fixes for multibit 2019-03-22 18:32:42 -07:00
Eddie Hung 03d108cd1f Working for 1 bit 2019-03-22 17:46:49 -07:00
Eddie Hung 5597270b9e Opt 2019-03-21 10:20:27 -07:00
Eddie Hung 2b911e270b Fix spacing 2019-03-20 12:28:39 -07:00
Eddie Hung 505e4c2d59 Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable length 2019-03-19 21:58:05 -07:00
Eddie Hung 5445cd4d00 Add support for variable length Xilinx SRL > 128 2019-03-19 17:44:33 -07:00
Eddie Hung 4cd8f02973 shregmap -tech xilinx to delete $shiftx for var length SRL 2019-03-19 15:05:08 -07:00
Eddie Hung 0ea7eba5f1 Make output port a non chain user 2019-03-19 13:08:43 -07:00
Eddie Hung ed32119d13 Fix shregmap to correctly recognise non chain users; cleanup 2019-03-18 16:12:19 -07:00
Eddie Hung b94db54664 shiftx NULL pointer check 2019-03-18 13:35:54 -07:00
Eddie Hung d6d9ef0fee Cleanup 2019-03-16 12:49:46 -07:00
Eddie Hung fadeadb8c8 Only accept <128 for variable length, only if $shiftx exclusive 2019-03-16 08:51:13 -07:00
Eddie Hung 06f8f2654a Working 2019-03-15 19:13:40 -07:00
Eddie Hung 8af9979aab Revert "Add shregmap -init_msb_first and use in synth_xilinx" 
This reverts commit 26ecbc1aee.
 2019-03-14 09:01:48 -07:00
Eddie Hung f1a8e8a480 Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-14 08:59:19 -07:00
Eddie Hung 26ecbc1aee Add shregmap -init_msb_first and use in synth_xilinx 2019-03-14 08:10:02 -07:00
Eddie Hung f7c7003a19 Merge remote-tracking branch 'origin/master' into xaig 2019-02-26 13:16:03 -08:00
Eddie Hung 7cac3b1c8b abc9 -- multiple connections for inouts 2019-02-26 12:18:28 -08:00
Larry Doolittle 61fc411c5d Clean up some whitepsace outliers 2019-02-26 09:39:46 -08:00
Eddie Hung 967297cd57 abc9 cleanup 2019-02-25 18:40:53 -08:00
Eddie Hung 721f6a14fb read_aiger to accept empty string for clk_name, passable only if no latches 2019-02-25 15:34:02 -08:00
Eddie Hung 0ca3fd6a1c abc9 not to clean after aigmap 2019-02-25 15:31:52 -08:00
Eddie Hung 51f28a6747 abc9 to call "clean" once at the end of all abc9_module() calls 2019-02-25 12:55:47 -08:00
Eddie Hung d56f02d1fc abc9 to use AIGER symbol table, as opposed to map file 2019-02-21 17:03:40 -08:00
Eddie Hung 2811d66dea Revert "abc9 to write_xaiger -symbols, not -map" 
This reverts commit 04429f8152.
 2019-02-21 14:58:40 -08:00
Eddie Hung 7ad9628f07 Remove irrelevant citations 2019-02-21 14:41:11 -08:00
Eddie Hung 085ed9f487 Add attribution 2019-02-21 14:40:13 -08:00
Eddie Hung 875a02a6f2 abc9 to not select anything extra, and pop selection after final clean 2019-02-21 14:38:52 -08:00
Eddie Hung 04429f8152 abc9 to write_xaiger -symbols, not -map 2019-02-21 14:28:36 -08:00
Eddie Hung 3307295488 Merge branch 'read_aiger' into xaig 2019-02-21 14:27:32 -08:00
Eddie Hung 7f8f36273a abc9 to use &mfs 2019-02-21 13:16:24 -08:00
Eddie Hung 6b96df41bc abc9 to only disconnect output ports of AND and NOT gates 2019-02-21 11:15:47 -08:00
Eddie Hung 7f26043caf ABC -> ABC9 2019-02-20 17:36:57 -08:00
Eddie Hung e5b8bb9faa abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_ 2019-02-20 17:33:35 -08:00
Eddie Hung 32853b1f8d lut/not/and suffix to be ${lut,not,and} 2019-02-20 16:30:30 -08:00
Eddie Hung 2ca83005fb abc9 to cope with multiple modules 2019-02-20 12:56:15 -08:00
Eddie Hung d6b317b349 abc9 to use & syntax for -fast, and name fixes 2019-02-20 12:40:17 -08:00
Eddie Hung 62e5ff9ba8 abc9 to cope with indexed wires when creating $lut from $_NOT_ 2019-02-19 16:06:03 -08:00
Eddie Hung 8158bc3f99 abc9 to replace $_NOT_ with $lut 2019-02-19 12:30:20 -08:00
Eddie Hung 45d49d5d14 Get rid of debugging stuff in abc9 2019-02-16 22:25:22 -08:00
Eddie Hung f853b2f3c1 abc9 to write_aiger with -O option, and ignore dummy outputs 2019-02-16 20:09:40 -08:00
Eddie Hung d8c4d4e6c7 abc9 to handle comb loops, cope with constant outputs, disconnect using new wire 2019-02-16 13:47:38 -08:00
Eddie Hung d4545d415b abc9 to cope with non-wideports, count cells properly 2019-02-16 08:53:06 -08:00
Eddie Hung f8d0134598 Move lookup inside if 2019-02-15 15:23:26 -08:00
Eddie Hung a786ac4d53 Refactor 2019-02-15 13:00:13 -08:00
Eddie Hung 914546efd9 Cope with width != 1 when re-mapping cells 2019-02-15 12:55:52 -08:00
Eddie Hung 956ee545c5 abc9 to stitch results with CI/CO properly 2019-02-15 11:52:34 -08:00
Eddie Hung 206f11dca3 Fix stitching 2019-02-13 17:04:23 -08:00
Eddie Hung f0f5d8a5cc Merge remote-tracking branch 'origin/read_aiger' into xaig 2019-02-13 14:09:36 -08:00
Eddie Hung 87f059adf7 Rip out some more stuff 2019-02-13 10:44:52 -08:00
Eddie Hung 045f7763ae Rip out unused functions in abc9 2019-02-12 16:25:22 -08:00
Eddie Hung b3341b4abb WIP for ABC with aiger 2019-02-12 09:31:22 -08:00
Eddie Hung c23e3f0751 Missing headers for Xcode? 2019-02-12 09:24:13 -08:00
Eddie Hung 5a0a5aae4f Compile abc9 2019-02-08 13:58:47 -08:00
Eddie Hung e25a22015f Copy abc.cc to abc9.cc 2019-02-08 13:23:54 -08:00
David Shah 58c22dae31 abc: Improved recovered netnames, also preserve src on nets with dress 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-06 22:23:13 +01:00
David Shah 8524a479b1 abc: Preserve naming through ABC using 'dress' command 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-06 22:23:13 +01:00
whitequark e792bd56b7 flowmap: clean up terminology. 
* "map": group gates into LUTs;
  * "pack": replace gates with LUTs.

This is important because we have FlowMap and DF-Map, and currently
our messages are ambiguous.

Also clean up some other log messages while we're at it.
 2019-01-08 02:05:06 +00:00
whitequark 211c26a4c9 flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00
whitequark 8b44198e23 flowmap: construct a max-volume max-flow min-cut, not just any one. 2019-01-06 19:51:37 +00:00
whitequark 2fcc1ee72e flowmap: add -minlut option, to allow postprocessing with opt_lut. 2019-01-04 21:18:03 +00:00
whitequark 9bc5cf0844 flowmap: cleanup for clarity. NFCI. 2019-01-04 13:04:20 +00:00
whitequark fd21564deb flowmap: improve debug graph output. NFC. 2019-01-04 03:30:04 +00:00
whitequark 7850a0c28a flowmap: add link to longer version of paper. NFC. 2019-01-04 02:33:10 +00:00
whitequark 07af772a72 flowmap: new techmap pass. 2019-01-03 14:28:19 +00:00
Icenowy Zheng 256fb8c95c Add "dffinit -noreinit" parameter 
Sometimes the FF cell might be initialized during the map process, e.g.
some FPGA platforms (Anlogic Eagle and Lattice ECP5 for example) has
only a "SR" pin for a FF for async reset, that resets the FF to the
initial value, which means the async reset value should be set as the
initial value. In this case the DFFINIT pass shouldn't reinitialize it
to a different value, which will lead to error.

Add a "-noreinit" parameter for the safeguard. If a FF is not
technically initialized before DFFINIT pass, the default value should be
set to x.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2018-12-18 23:10:40 +08:00
Icenowy Zheng fec8b3c81f Add "dffinit -strinit high low" 
On some platforms the string to initialize DFF might not be "high" and
"low", e.g. with Anlogic TD it's "SET" and "RESET".

Add a "-strinit" parameter for dffinit to allow specify the strings used
for high and low.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2018-12-18 15:37:43 +08:00
Clifford Wolf 2641a3089b
Revert "Proof-of-concept: preserve naming through ABC using dress" 2018-12-16 21:27:31 +01:00
Clifford Wolf 0d9c850a07
Merge pull request #735 from daveshah1/trifixes 
deminout fixes
 2018-12-16 16:02:21 +01:00
Clifford Wolf a1fb5b1e4b
Merge pull request #714 from daveshah1/abc_preserve_naming 
Proof-of-concept: preserve naming through ABC using dress
 2018-12-16 15:41:30 +01:00
David Shah 4c59447168 deminout: Consider $tribuf cells 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-12 17:17:40 +00:00
David Shah d3fe9465f3 deminout: Don't demote constant-driven inouts to inputs 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-12 16:50:46 +00:00
David Shah 1dfb2fecab abc: Preserve naming through ABC using 'dress' command 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 15:05:07 +00:00
whitequark d1f2cb01dc lut2mux: handle 1-bit INIT constant in $lut cells. 
This pass already handles INIT constants shorter than 2^width, but
that was not done for the recursion base case.
 2018-12-05 19:27:48 +00:00
Clifford Wolf c800e3bb16 Fix typo 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-12-04 23:30:23 +01:00
Sylvain Munaut 8d3ab626ea dff2dffe: Add option for unmap to only remove DFFE with low CE signal use 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-27 21:50:42 +01:00
Niels Moseley cfc9b9147c DFFLIBMAP: changed 'missing pin' error into a warning with additional reason/info. 2018-11-06 12:11:52 +01:00
Clifford Wolf 719e29404a Allow square brackets in liberty identifiers 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-11-05 12:33:33 +01:00
Niels Moseley 04cd179696 Liberty file newline handling is more relaxed. More descriptive error message 2018-11-03 18:38:49 +01:00
Niels Moseley d1e8249f9a Report an error when a liberty file contains pin references that reference non-existing pins 2018-11-03 18:07:51 +01:00
Clifford Wolf 67b1026297
Merge pull request #591 from hzeller/virtual-override 
Consistent use of 'override' for virtual methods in derived classes.
 2018-08-15 14:05:38 +02:00
Clifford Wolf 0eaab6cd1d Add missing <deque> include (MSVC build fix) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-22 15:21:59 +02:00
Henner Zeller 3aa4484a3c Consistent use of 'override' for virtual methods in derived classes. 
o Not all derived methods were marked 'override', but it is a great
  feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
  provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
  use the plain keyword going forward now that C++11 is established)
 2018-07-20 23:51:06 -07:00
David Shah 459d367913 ecp5: Adding synchronous set/reset support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-14 16:18:01 +02:00
Clifford Wolf 675a44b41a Be slightly less aggressive in "deminout" pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-19 14:29:38 +02:00
Robert Ou 9763e4d830 Fix infinite loop in abc command under emscripten 2018-05-18 22:42:39 -07:00
Robert Ou bfce3a7479 Add an option to statically link abc into yosys 
This is currently incomplete because the output filter no longer works.
 2018-05-18 22:35:28 -07:00
Clifford Wolf fe80b39f56 Fix iopadmap for loops between tristate IO buffers 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-15 14:02:27 +02:00
Clifford Wolf edd297fb1c Fix iopadmap for cases where IO pins already have buffers on them 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-15 13:13:43 +02:00
Clifford Wolf 145c685de0 Add ABC FAQ to "help abc" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-04 21:59:31 +02:00
Clifford Wolf a572b49538 Replace -ignore_redef with -[no]overwrite 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-03 15:25:59 +02:00
Clifford Wolf 705c366a91 Added missing dont_use handling for SR FFs to dfflibmap 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-05 11:01:45 +02:00
Clifford Wolf a74f805ba0 Fix handling of src attributes in flatten 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-03-10 13:55:30 +01:00
Clifford Wolf 9ac560f5d3 Add "dffinit -highlow" and fix synth_intel 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-01-09 18:42:19 +01:00
Clifford Wolf a96c775a73 Add support for "yosys -E" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-01-07 16:36:13 +01:00
Staf Verhaegen 92eb841f0a Value of properties can be expression. 
Example found in the 2007.03 Liberty Reference Manual that was also found
in the wild:

    input_voltage(CMOS) {
        vil : 0.3 * VDD ;
        vih : 0.7 * VDD ;
        vimin : -0.5 ;
        vimax : VDD + 0.5 ;
    }

Current implementation just parses the expression but no interpretation is done.
 2018-01-03 21:37:17 +00:00
Clifford Wolf 7c57d8fbb4 Rewrite ABC output to include proper net names in timing report 2017-10-10 13:32:58 +02:00
Andrew Zonenberg 2b65b65d70 Added missing "break" 2017-09-15 17:54:52 -07:00
Andrew Zonenberg 7b3966714c Implemented off-chain support for extract_reduce 2017-09-15 13:59:18 -07:00
Andrew Zonenberg 3404934c9c extract_reduce now only removes the head of the chain, relying on "clean" to delete upstream cells. Added "-allow-off-chain" flag, but it's currently ignored. 2017-09-15 13:59:05 -07:00
Clifford Wolf ce78717e36 Merge pull request #412 from azonenberg/reduce-fixes 
extract_reduce: Fix segfault on "undriven" inputs
 2017-09-14 22:36:25 +02:00
Robert Ou ab1bf8d661 extract_reduce: Fix segfault on "undriven" inputs 
This is easily triggered when un-techmapping if the technology-specific
cell library isn't loaded. Outputs of technology-specific cells will be
seen as inputs, and nets using those outputs will be seen as undriven.
Just ignore these cells because they can't be part of a reduce chain
anyways.
 2017-09-14 12:54:44 -07:00
Andrew Zonenberg 367d6b2194 Fixed bug where counter extraction on non-GreenPAK devices incorrectly handled parallel counter output 2017-09-14 10:27:10 -07:00
Andrew Zonenberg c8f2f082c6 Added support for inferring counters with reset to full scale instead of zero 2017-09-14 10:26:43 -07:00
Andrew Zonenberg 122532b7e1 Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot yet be extracted. 2017-09-14 10:26:32 -07:00
Andrew Zonenberg 0484ad666d Added support for inferring counters with active-low reset 2017-09-14 10:26:21 -07:00
Andrew Zonenberg a84172b23b Initial support for extraction of counters with clock enable 2017-09-14 10:26:10 -07:00
Andrew Zonenberg c4a70a8cc3 Fixed typo in comment. Fixed bug where extract_counter would create up counters when it meant to create down counters. 2017-09-14 10:25:51 -07:00
Clifford Wolf 7d41c5e177 Further improve extract_fa (but still buggy) 2017-09-02 16:39:17 +02:00
Clifford Wolf 18609f3df8 Merge branch 'master' of github.com:cliffordwolf/yosys 2017-09-01 12:35:09 +02:00
Clifford Wolf 8a66bd30c6 Update more stuff to use get_src_attribute() and set_src_attribute() 2017-09-01 12:26:55 +02:00
Jason Lowdermilk 8dc6083de7 updated to use get_src_attribute() and set_src_attribute(). 2017-08-31 14:51:56 -06:00
Andrew Zonenberg ed1e3ed39b extract_counter: Added optimizations to remove unused high-order bits 2017-08-30 18:15:12 -07:00
Andrew Zonenberg 634f18be96 extract_counter: Minor changes requested to comply with upstream policy, fixed a few typos 2017-08-30 16:28:25 -07:00
Jason Lowdermilk 32c0f1193e Add support for source line tracking through synthesis phase 2017-08-29 14:46:35 -06:00
Andrew Zonenberg 3fc1b9f3fd Finished refactoring counter extraction to be nice and generic. Implemented techmapping from $__COUNT_ to GP_COUNTx cells. 2017-08-28 22:18:57 -07:00
Andrew Zonenberg 46b01f05bb Refactored extract_counter to be generic vs GreenPAK specific 2017-08-28 22:18:47 -07:00
Andrew Zonenberg b5c15636c5 Refactoring: Renamed greenpak4_counters pass to extract_counter, moved it to techmap/ since it's going to become a generic pass 2017-08-28 22:18:34 -07:00