Rename shregmap -tech xilinx -> xilinx_dynamic

This commit is contained in:
Eddie Hung 2019-06-04 14:34:36 -07:00
parent 7b186740d3
commit 94a5f4e609
2 changed files with 6 additions and 6 deletions

View File

@ -93,12 +93,12 @@ struct ShregmapTechGreenpak4 : ShregmapTech
}
};
struct ShregmapTechXilinx7 : ShregmapTech
struct ShregmapTechXilinx7Dynamic : ShregmapTech
{
dict<SigBit, std::tuple<Cell*,int,int>> sigbit_to_shiftx_offset;
const ShregmapOptions &opts;
ShregmapTechXilinx7(const ShregmapOptions &opts) : opts(opts) {}
ShregmapTechXilinx7Dynamic(const ShregmapOptions &opts) : opts(opts) {}
virtual void init(const Module* module, const SigMap &sigmap) override
{
@ -660,11 +660,11 @@ struct ShregmapPass : public Pass {
opts.zinit = true;
opts.tech = new ShregmapTechGreenpak4;
}
else if (tech == "xilinx") {
else if (tech == "xilinx_dynamic") {
opts.init = true;
opts.params = true;
enpol = "any_or_none";
opts.tech = new ShregmapTechXilinx7(opts);
opts.tech = new ShregmapTechXilinx7Dynamic(opts);
} else {
argidx--;
break;

View File

@ -263,8 +263,8 @@ struct SynthXilinxPass : public ScriptPass
// shregmap operates on bit-level flops, not word-level,
// so break those down here
run("simplemap t:$dff t:$dffe", "(skip if '-nosrl')");
// shregmap with '-tech xilinx' infers variable length shift regs
run("shregmap -tech xilinx -minlen 3", "(skip if '-nosrl')");
// shregmap to infer variable length shift regs
run("shregmap -tech xilinx_dynamic -minlen 3", "(skip if '-nosrl')");
}
std::string techmap_files = " -map +/techmap.v";