mirror of https://github.com/YosysHQ/yosys.git
Add "techmap -wb", use in formal flows
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -134,7 +134,7 @@ struct EquivOptPass:public ScriptPass
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opts = " -map <filename> ...";
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else
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opts = techmap_opts;
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run("techmap -D EQUIV -autoproc" + opts);
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run("techmap -wb -D EQUIV -autoproc" + opts);
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}
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if (check_label("prove")) {
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@ -254,7 +254,7 @@ void create_miter_equiv(struct Pass *that, std::vector<std::string> args, RTLIL:
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if (flag_flatten) {
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log_push();
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Pass::call_on_module(design, miter_module, "flatten; opt_expr -keepdc -undriven;;");
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Pass::call_on_module(design, miter_module, "flatten -wb; opt_expr -keepdc -undriven;;");
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log_pop();
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}
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}
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@ -308,7 +308,7 @@ void create_miter_assert(struct Pass *that, std::vector<std::string> args, RTLIL
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if (flag_flatten) {
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log_push();
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Pass::call_on_module(design, module, "flatten;;");
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Pass::call_on_module(design, module, "flatten -wb;;");
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log_pop();
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}
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@ -385,7 +385,7 @@ struct MiterPass : public Pass {
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log(" also create an 'assert' cell that checks if trigger is always low.\n");
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log("\n");
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log(" -flatten\n");
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log(" call 'flatten; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
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log(" call 'flatten -wb; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
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log("\n");
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log("\n");
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log(" miter -assert [options] module [miter_name]\n");
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@ -399,7 +399,7 @@ struct MiterPass : public Pass {
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log(" keep module output ports.\n");
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log("\n");
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log(" -flatten\n");
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log(" call 'flatten; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
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log(" call 'flatten -wb; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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@ -385,7 +385,7 @@ struct TechmapWorker
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{
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std::string mapmsg_prefix = in_recursion ? "Recursively mapping" : "Mapping";
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if (!design->selected(module) || module->get_blackbox_attribute())
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if (!design->selected(module) || module->get_blackbox_attribute(ignore_wb))
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return false;
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bool log_continue = false;
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@ -927,6 +927,9 @@ struct TechmapPass : public Pass {
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log(" -autoproc\n");
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log(" Automatically call \"proc\" on implementations that contain processes.\n");
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log("\n");
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log(" -wb\n");
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log(" Ignore the 'whitebox' attribute on cell implementations.\n");
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log("\n");
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log(" -assert\n");
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log(" this option will cause techmap to exit with an error if it can't map\n");
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log(" a selected cell. only cell types that end on an underscore are accepted\n");
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@ -1070,6 +1073,10 @@ struct TechmapPass : public Pass {
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worker.autoproc_mode = true;
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continue;
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}
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if (args[argidx] == "-wb") {
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worker.ignore_wb = true;
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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