mirror of https://github.com/YosysHQ/yosys.git
Rip out some more stuff
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045f7763ae
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@ -67,38 +67,6 @@ extern "C" int Abc_RealMain(int argc, char *argv[]);
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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enum class gate_type_t {
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G_NONE,
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G_FF,
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G_BUF,
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G_NOT,
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G_AND,
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G_NAND,
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G_OR,
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G_NOR,
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G_XOR,
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G_XNOR,
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G_ANDNOT,
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G_ORNOT,
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G_MUX,
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G_AOI3,
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G_OAI3,
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G_AOI4,
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G_OAI4
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};
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#define G(_name) gate_type_t::G_ ## _name
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struct gate_t
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{
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int id;
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gate_type_t type;
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int in1, in2, in3, in4;
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bool is_port;
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RTLIL::SigBit bit;
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RTLIL::State init;
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};
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bool map_mux4;
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bool map_mux8;
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bool map_mux16;
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@ -107,7 +75,6 @@ bool markgroups;
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int map_autoidx;
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SigMap assign_map;
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RTLIL::Module *module;
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std::vector<gate_t> signal_list;
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std::map<RTLIL::SigBit, int> signal_map;
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std::map<RTLIL::SigBit, RTLIL::State> signal_init;
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pool<std::string> enabled_gates;
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@ -258,7 +225,6 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
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map_autoidx = autoidx++;
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signal_map.clear();
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signal_list.clear();
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pi_map.clear();
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po_map.clear();
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recover_init = false;
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@ -959,7 +925,6 @@ struct Abc9Pass : public Pass {
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log_push();
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assign_map.clear();
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signal_list.clear();
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signal_map.clear();
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signal_init.clear();
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pi_map.clear();
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@ -1389,7 +1354,6 @@ struct Abc9Pass : public Pass {
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}
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assign_map.clear();
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signal_list.clear();
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signal_map.clear();
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signal_init.clear();
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pi_map.clear();
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