mirror of https://github.com/YosysHQ/yosys.git
Merge branch 'read_aiger' into xaig
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commit
3307295488
1
Makefile
1
Makefile
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@ -581,6 +581,7 @@ test: $(TARGETS) $(EXTRA_TARGETS)
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+cd tests/sat && bash run-test.sh
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+cd tests/svinterfaces && bash run-test.sh $(SEEDOPT)
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+cd tests/opt && bash run-test.sh
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+cd tests/aiger && bash run-test.sh
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@echo ""
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@echo " Passed \"make test\"."
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@echo ""
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@ -23,8 +23,11 @@
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// http://fmv.jku.at/papers/Biere-FMV-TR-07-1.pdf
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#ifdef _WIN32
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#include <libgen.h>
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#include <stdlib.h>
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#endif
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#include <array>
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#include "kernel/yosys.h"
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#include "kernel/sigtools.h"
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#include "kernel/consteval.h"
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@ -583,7 +586,7 @@ void AigerReader::parse_aiger_ascii()
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RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3);
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module->addAndGate(o_wire->name.str() + "$and", i1_wire, i2_wire, o_wire);
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}
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std::getline(f, line);
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std::getline(f, line); // Ignore up to start of next line
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}
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static unsigned parse_next_delta_literal(std::istream &f, unsigned ref)
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@ -779,7 +782,9 @@ struct AigerFrontend : public Frontend {
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_splitpath(filename.c_str(), NULL /* drive */, NULL /* dir */, fname, NULL /* ext */)
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module_name = fname;
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#else
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module_name = RTLIL::escape_id(basename(filename.c_str()));
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char* bn = strdup(filename.c_str());
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module_name = RTLIL::escape_id(bn);
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free(bn);
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#endif
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}
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@ -52,8 +52,6 @@
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#include <cerrno>
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#include <sstream>
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#include <climits>
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#include <array>
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#include <functional>
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#ifndef _WIN32
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# include <unistd.h>
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