mirror of https://github.com/YosysHQ/yosys.git
More space fixing
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@ -407,7 +407,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
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handle_loops(design);
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Pass::call(design, stringf("write_xaiger -O -symbols %s/input.aig; ", tempdir_name.c_str()));
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Pass::call(design, stringf("write_xaiger -O -symbols %s/input.aig; ", tempdir_name.c_str()));
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design->selection_stack.pop_back();
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@ -1536,7 +1536,7 @@ struct Abc9Pass : public Pass {
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}
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}
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Pass::call(design, "clean");
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Pass::call(design, "clean");
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assign_map.clear();
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signal_map.clear();
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