mirror of https://github.com/YosysHQ/yosys.git
Fix shregmap to correctly recognise non chain users; cleanup
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b94db54664
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@ -120,7 +120,7 @@ struct ShregmapTechXilinx7 : ShregmapTech
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return;
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if (cell->type == "$shiftx" && port == "\\A")
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return;
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it->second = std::make_pair(nullptr, 0);
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sigbit_to_shiftx_offset.erase(it);
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}
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virtual bool analyze(vector<int> &taps, const vector<SigBit> &qbits) override
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@ -140,11 +140,11 @@ struct ShregmapTechXilinx7 : ShregmapTech
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// or sequential to the same shift register
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auto it = sigbit_to_shiftx_offset.find(qbits[i]);
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if (i == 0) {
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if (it != sigbit_to_shiftx_offset.end()) {
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if (it == sigbit_to_shiftx_offset.end()) {
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return false;
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}
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else {
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shiftx = it->second.first;
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// NULL indicates there are non-shiftx users
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if (shiftx == nullptr)
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return false;
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int offset = it->second.second;
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if (offset != i)
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return false;
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@ -152,8 +152,7 @@ struct ShregmapTechXilinx7 : ShregmapTech
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}
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else {
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if (it == sigbit_to_shiftx_offset.end()) {
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if (shiftx != nullptr)
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return false;
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return false;
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}
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else {
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if (shiftx != it->second.first)
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@ -164,18 +163,17 @@ struct ShregmapTechXilinx7 : ShregmapTech
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}
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}
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}
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log_assert(shiftx);
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if (shiftx) {
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// Cannot implement variable-length shift registers
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// greater than 128 since Q31 cannot be output onto
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// fabric
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if (GetSize(taps) > 128)
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return false;
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// Cannot implement variable-length shift registers
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// greater than 128 since Q31 cannot be output onto
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// fabric
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if (GetSize(taps) > 128)
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return false;
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// Only map if $shiftx exclusively covers the shift register
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if (GetSize(taps) != shiftx->getParam("\\A_WIDTH").as_int())
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return false;
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}
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// Only map if $shiftx exclusively covers the shift register
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if (GetSize(taps) != shiftx->getParam("\\A_WIDTH").as_int())
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return false;
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return true;
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}
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