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2170 Commits

Author SHA1 Message Date
Eddie Hung b3faf0246d Be more precise when connecting during ABC9 re-integration 2019-06-12 16:04:33 -07:00
Eddie Hung 2e7e73f483 Remove hacky wideports_split from abc9 2019-06-12 15:52:49 -07:00
Eddie Hung d9974b85e7 Fix compile errors when #if 1 for debug 2019-06-12 15:47:39 -07:00
Bogdan Vukobratovic d69989b8d2 Rename satgen_algo.h -> algo.h, code cleanup and refactoring 2019-06-12 19:35:05 +02:00
Eddie Hung 8bb67fa67c Do not call abc9 if no outputs 2019-06-12 10:18:44 -07:00
Eddie Hung 14e870d4c4 More write_xaiger cleanup 2019-06-12 10:00:57 -07:00
Eddie Hung b21d29598a Consistency 2019-06-12 09:40:51 -07:00
Eddie Hung b2c72f74f0 Merge branch 'xc7mux' into xaig 2019-06-12 09:14:27 -07:00
Eddie Hung afd620fd5f Typo: wire delay is -W argument 2019-06-12 09:13:53 -07:00
Eddie Hung 2cbcd6224c Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux" 
This reverts commit a138381ac3, reversing
changes made to b77c5da769.
 2019-06-12 09:05:02 -07:00
Eddie Hung 882a83c383 Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" 
This reverts commit eaee250a6e, reversing
changes made to 935df3569b.
 2019-06-12 09:04:31 -07:00
Eddie Hung 86efe9a616 Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" 
This reverts commit 2223ca91b0, reversing
changes made to eaee250a6e.
 2019-06-12 09:01:15 -07:00
Eddie Hung 1e838a8913 Retry "Add "-W' wire delay arg to abc9, use from synth_xilinx" 2019-06-12 08:49:15 -07:00
Eddie Hung 4c9fde87d1 Revert "Add "-W' wire delay arg to abc9, use from synth_xilinx" 
This reverts commit 2dffa4685b.
 2019-06-12 08:48:45 -07:00
Eddie Hung 2dffa4685b Add "-W' wire delay arg to abc9, use from synth_xilinx 2019-06-11 17:10:47 -07:00
Eddie Hung 6cdea93724 Revert "Try way that doesn't involve creating a new wire" 
This reverts commit 2f427acc9e.
 2019-06-11 16:05:42 -07:00
Eddie Hung d26646051c Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux" 
This reverts commit 5174082208, reversing
changes made to 54379f9872.
 2019-06-11 16:05:27 -07:00
Eddie Hung 5174082208 Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux 2019-06-11 15:48:41 -07:00
Eddie Hung 2f427acc9e Try way that doesn't involve creating a new wire 2019-06-11 15:48:20 -07:00
Bogdan Vukobratovic 9892df17ef Generate satgen instance instead of calling sat pass 2019-06-11 11:47:13 +02:00
Eddie Hung a138381ac3 Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux 2019-06-10 16:21:43 -07:00
Eddie Hung f19aa8d989 If d_bit already in sigbit_chain_next, create extra wire 2019-06-10 16:16:40 -07:00
Eddie Hung a1d4ae78a0 Revert "Rename shregmap -tech xilinx -> xilinx_dynamic" 
This reverts commit 94a5f4e609.
 2019-06-10 14:34:43 -07:00
Eddie Hung 7d27e1e431 Revert "shregmap -tech xilinx_dynamic to work -params and -enpol" 
This reverts commit 45d1bdf83a.
 2019-06-10 14:34:16 -07:00
Eddie Hung 3579d68193 Revert "Refactor to ShregmapTechXilinx7Static" 
This reverts commit e1e37db860.
 2019-06-10 14:34:15 -07:00
Eddie Hung b6a39351f4 Revert "Add -tech xilinx_static" 
This reverts commit dfe9d95579.
 2019-06-10 14:34:14 -07:00
Eddie Hung e1dbeb3004 Revert "Continue support for ShregmapTechXilinx7Static" 
This reverts commit 72eda94a66.
 2019-06-10 14:34:14 -07:00
Eddie Hung 9d8563178e Revert "shregmap -tech xilinx_static to handle INIT" 
This reverts commit 935df3569b.
 2019-06-10 14:34:12 -07:00
Eddie Hung 5b999ae68d Elaborate muxpack doc 2019-06-10 10:32:19 -07:00
Eddie Hung 1dd7e23a20 Merge remote-tracking branch 'origin/master' into eddie/muxpack 2019-06-10 10:28:40 -07:00
Eddie Hung 5a46a0b385 Fine tune aigerparse 2019-06-07 16:57:32 -07:00
Eddie Hung f705f6a0b5 Comment O(N) -> O(N^2) 2019-06-07 15:39:12 -07:00
Eddie Hung ba52d9b471 Extend ExclusiveDatabase to query SigSpec-s (for $pmux) 2019-06-07 15:34:16 -07:00
Eddie Hung 9b408838f1 Add ExclusiveDatabase to check exclusive $eq/$logic_not cell results 2019-06-07 14:18:17 -07:00
Eddie Hung 887df8914c Resolve @cliffordwolf comment on redundant check 2019-06-07 11:37:52 -07:00
Eddie Hung 5ab59cd59e Resolve @cliffordwolf comment on sigmap 2019-06-07 11:36:19 -07:00
Eddie Hung 30abdaf3b2 Allow muxcover costs to be changed 2019-06-07 08:34:11 -07:00
Eddie Hung fe4394fb9a Allow muxcover costs to be changed 2019-06-07 08:30:39 -07:00
Eddie Hung 2223ca91b0 Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux 2019-06-06 14:22:10 -07:00
Eddie Hung 5c277c6325 Fix and test for balanced case 2019-06-06 14:21:34 -07:00
Eddie Hung eaee250a6e Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux 2019-06-06 14:06:59 -07:00
Eddie Hung ccdf989025 Support cascading $pmux.A with $mux.A and $mux.B 2019-06-06 13:51:22 -07:00
Eddie Hung dc7b8c4b94 More cleanup 2019-06-06 12:56:34 -07:00
Eddie Hung 978fda94f6 Fix spacing 2019-06-06 12:46:42 -07:00
Eddie Hung d2172c6846 Non chain user check using next_sig 2019-06-06 12:44:50 -07:00
Eddie Hung 83450a9489 Move muxpack from passes/techmap to passes/opt 2019-06-06 12:15:13 -07:00
Eddie Hung 3dd0682f29 Update doc 2019-06-06 12:11:59 -07:00
Eddie Hung 3e76e3a6fa Add tests, fix for != 2019-06-06 11:54:38 -07:00
Eddie Hung 543dd11c7e Missing file 2019-06-06 11:03:45 -07:00
Eddie Hung 7bd1c664a6 Initial adaptation of muxpack from shregmap 2019-06-06 10:51:02 -07:00
Clifford Wolf e4e1cd6930
Merge pull request #1071 from YosysHQ/eddie/fix_1070 
Fix typo in opt_rmdff causing register to be incorrectly removed
 2019-06-06 06:50:12 +02:00
Clifford Wolf 50e2dce5e7
Merge pull request #1072 from YosysHQ/eddie/fix_1069 
Error out if no top module given before 'sim'
 2019-06-06 06:49:07 +02:00
Eddie Hung fd8ef128bf Missing doc for -tech xilinx in shregmap 2019-06-05 14:21:44 -07:00
Eddie Hung dd134914cc Error out if no top module given before 'sim' 2019-06-05 14:16:24 -07:00
Eddie Hung feb2ddb52b Fix typo in opt_rmdff 2019-06-05 14:08:14 -07:00
Eddie Hung 935df3569b shregmap -tech xilinx_static to handle INIT 2019-06-05 12:55:59 -07:00
Eddie Hung 72eda94a66 Continue support for ShregmapTechXilinx7Static 2019-06-05 12:33:55 -07:00
Eddie Hung dfe9d95579 Add -tech xilinx_static 2019-06-05 11:14:14 -07:00
Eddie Hung e1e37db860 Refactor to ShregmapTechXilinx7Static 2019-06-05 11:08:08 -07:00
Eddie Hung 45d1bdf83a shregmap -tech xilinx_dynamic to work -params and -enpol 2019-06-05 10:21:57 -07:00
Eddie Hung a3a80b755c
Merge pull request #1067 from YosysHQ/clifford/fix1065 
Suppress driver-driver conflict warning for unknown cell types
 2019-06-05 09:59:05 -07:00
Eddie Hung bcc0a5d136 Merge remote-tracking branch 'origin/master' into xc7mux 2019-06-05 09:56:57 -07:00
Eddie Hung b5aff1de04 Merge remote-tracking branch 'origin/clifford/fix1065' into xc7mux 2019-06-05 09:56:51 -07:00
Clifford Wolf b33176dafb Major rewrite of wire selection in setundef -init 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-05 10:26:48 +02:00
Clifford Wolf 6cc60ffd67 Indent fix 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-05 09:53:06 +02:00
Clifford Wolf 00d32eb73d
Merge pull request #999 from jakobwenzel/setundefInitFix 
initialize more registers in setundef -init
 2019-06-05 09:50:15 +02:00
Clifford Wolf 4190d7c094 Fix typo in fmcombine log message, fixes #1063 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-05 09:26:44 +02:00
Clifford Wolf 8a6f9977f6 Suppress driver-driver conflict warning for unknown cell types, fixes #1065 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-05 09:14:12 +02:00
Eddie Hung 94a5f4e609 Rename shregmap -tech xilinx -> xilinx_dynamic 2019-06-04 14:34:36 -07:00
Eddie Hung f81a0ed92e Merge remote-tracking branch 'origin/master' into xc7mux 2019-06-03 23:07:08 -07:00
Eddie Hung 295bd8d0bf Remove dupe 2019-06-03 12:32:20 -07:00
Eddie Hung eb08e71bd1 Merge branch 'xaig' into xc7mux 2019-05-31 13:03:03 -07:00
Eddie Hung a379234f56 Throw out unused code inherited from abc 2019-05-31 12:50:11 -07:00
Clifford Wolf 90ec2cda42 Fix "tee" handling of log_streams 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-31 09:28:51 +02:00
Eddie Hung 4a6b9af227 Fix spelling 2019-05-30 15:50:47 -07:00
Eddie Hung a44fe3a632 Revert "Re-enable &dc2" 
This reverts commit 8c58c728a7.
 2019-05-30 11:41:50 -07:00
Eddie Hung 0800846e73 Do not double count LUT1s 2019-05-30 11:32:14 -07:00
Eddie Hung 8c58c728a7 Re-enable &dc2 2019-05-30 00:42:41 -07:00
Eddie Hung 2560f92f29 Reduce -W to 160 2019-05-29 23:01:46 -07:00
Eddie Hung 854557814e Erase all boxes before stitching 2019-05-29 19:17:36 -07:00
Eddie Hung b955344ecd Call &if with -W 250 2019-05-29 16:34:52 -07:00
Eddie Hung ecaa7856e9 Add some debug to abc9 2019-05-29 15:21:41 -07:00
Clifford Wolf 349c47250a
Merge pull request #1049 from YosysHQ/clifford/fix1047 
Do not use shiftmul peepopt pattern when mul result is truncated
 2019-05-28 19:02:26 +02:00
Eddie Hung cdedf51c32 From master 2019-05-28 09:37:50 -07:00
Eddie Hung 914074a07c Update from master 2019-05-28 09:35:45 -07:00
Eddie Hung ba9513b325 Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-28 09:30:53 -07:00
Eddie Hung 4a76b425cc Misspell 2019-05-28 08:44:59 -07:00
Clifford Wolf cb285e4b87 Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-28 17:17:56 +02:00
Clifford Wolf ba2185ead8 Refactor hierarchy wand/wor handling 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-28 16:43:25 +02:00
Bogdan Vukobratovic 29a78267d7 Fix the regression 2019-05-28 15:45:04 +02:00
Bogdan Vukobratovic 9a468f81c4 Optimizing DFFs whose initial value prevents their value from changing 
This is a proof of concept implementation that invokes SAT solver via Pass::call
method.
 2019-05-28 08:48:21 +02:00
Eddie Hung 89bd6b8504 If driver not found, use LUT2 2019-05-27 23:12:21 -07:00
Eddie Hung 4df37c77fd Disconnect all ABC boxes too 2019-05-27 19:40:27 -07:00
Eddie Hung 75bd41eaeb Parse without wideports 2019-05-27 12:22:05 -07:00
Eddie Hung bf3b8d5e45 Remove mapped_mod when done 2019-05-27 12:19:21 -07:00
Eddie Hung 234156c01a Instantiate cell type (from sym file) otherwise 'clean' warnings 2019-05-27 12:16:10 -07:00
Eddie Hung 03b289a851 Add 'cinput' and 'coutput' to symbols file for boxes 2019-05-27 11:38:52 -07:00
Stefan Biereigel 816082d5a1
Merge branch 'master' into wandwor 2019-05-27 19:07:46 +02:00
Stefan Biereigel ed625a3102 move wand/wor resolution into hierarchy pass 2019-05-27 18:00:22 +02:00
Clifford Wolf 2a9c68e2d6
Merge pull request #1026 from YosysHQ/clifford/fix1023 
Keep zero-width wires in opt_clean if and only if they are ports
 2019-05-27 13:24:19 +02:00
Eddie Hung 3981eba999 ABC9 to call &sweep 2019-05-26 11:31:35 -07:00
Eddie Hung 086b6560b4 Typo 2019-05-26 03:17:20 -07:00
Eddie Hung 823153e418 Combine ABC_COMMAND_LUT 2019-05-26 02:47:06 -07:00
Eddie Hung 32a4c10c0d Fix "a" extension 2019-05-26 02:44:36 -07:00
Eddie Hung d4fb6cac7c Revert enable check 2019-05-25 12:55:57 -07:00
Eddie Hung 822d0b7789 opt_rmdff to optimise even in presence of enable signal, even removing 2019-05-24 18:30:51 -07:00
Eddie Hung 0d66103cbb Add comments 2019-05-24 16:33:10 -07:00
Eddie Hung 357b1de6bc Resolve @cliffordwolf review, set even if !has_init 2019-05-24 16:15:22 -07:00
Eddie Hung 6ad09bfcea Add &fraig and &mfs back 2019-05-24 15:10:18 -07:00
Eddie Hung 68359bcd6f Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux 2019-05-23 13:37:53 -07:00
Eddie Hung 5ac7e38d0a Fix spacing 2019-05-23 12:58:30 -07:00
Eddie Hung 50ed34a6d0 opt_rmdff to work on $dffe and $_DFFE_* 2019-05-23 11:26:18 -07:00
Clifford Wolf e3f9ccf56d Keep zero-width wires in opt_clean if and only if they are ports, fixes #1023 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-22 13:57:36 +02:00
Eddie Hung fb09c6219b Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-21 14:21:00 -07:00
Clifford Wolf c4b8575f43 Add "wreduce -keepdc", fixes #1016 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-20 15:36:13 +02:00
Clifford Wolf a21a84b3b4 Improvements in opt_clean 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-15 16:01:28 +02:00
Clifford Wolf f67ec1b235 Do not leak file descriptors in cover.cc 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-15 13:51:02 +02:00
Henner Zeller 5e443a5d0d Fix two instances of integer-assignment to string. 
o In cover.cc, the int-result of mkstemps() was assigned to a string
  and silently interpreted as a single-character filename with a funny
  value. Fix with the intent: assign the filename.
o in libparse.cc, an int was assigned to a string, but depending on
  visible constructors, this is ambiguous. Explicitly cast this to
  a char.
 2019-05-14 22:01:15 -07:00
whitequark c8c1df23a0 bugpoint: check for -script option. 
Fixes #925.
 2019-05-14 10:48:06 +00:00
Clifford Wolf 8166a142dd Fix handling of glob_abort_cnt in opt_muxtree, fixes #1002 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-12 13:51:12 +02:00
Clifford Wolf faf00586d8
Merge pull request #1003 from makaimann/zinit-all 
Zinit option '-singleton' -> '-all'
 2019-05-11 13:56:51 +02:00
Clifford Wolf b66b657b6b Add "fmcombine -initeq -anyeq" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-11 09:28:55 +02:00
Clifford Wolf 04ef222cfb Add "stat -tech xilinx" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-11 09:24:52 +02:00
Makai Mann 2f5cfa014b Zinit option '-singleton' -> '-all' 2019-05-10 10:23:14 -07:00
Jakob Wenzel f06cb75b93 initialize more registers in setundef -init 2019-05-09 12:47:16 +02:00
Clifford Wolf 3870e7cf29
Merge pull request #991 from kristofferkoch/gcc9-warnings 
Fix all warnings that occurred when compiling with gcc9
 2019-05-08 11:25:22 +02:00
Kristoffer Ellersgaard Koch 30c762d3a1 Fix all warnings that occurred when compiling with gcc9 2019-05-08 10:27:14 +02:00
Clifford Wolf a76189e7ad More opt_clean cleanups 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-07 14:41:58 +02:00
Clifford Wolf 752553d8e9
Merge pull request #946 from YosysHQ/clifford/specify 
Add specify parser
 2019-05-06 20:57:15 +02:00
Clifford Wolf 1706798f4e
Merge pull request #975 from YosysHQ/clifford/fix968 
Re-enable "final loop assignment" feature and fix opt_clean warnings
 2019-05-06 20:53:38 +02:00
Clifford Wolf 7bab7b3d49
Merge pull request #871 from YosysHQ/verific_import 
Improve verific -chparam and add hierarchy -chparam
 2019-05-06 20:51:59 +02:00
Clifford Wolf d187be39d6 Merge branch 'master' of github.com:YosysHQ/yosys into clifford/fix968 2019-05-06 15:41:13 +02:00
Clifford Wolf b37c31e2cb Bugfix in peepopt_shiftmul.pmg 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-06 15:34:19 +02:00
Clifford Wolf c0782d8390
Merge pull request #989 from YosysHQ/dave/abc_name_improve 
ABC name recovery fixes
 2019-05-06 13:57:35 +02:00
Clifford Wolf f02e22a35a Fix bug in "expose -input" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-06 13:30:55 +02:00
Clifford Wolf ba6ce21a74 Cleanups in opt_clean 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-06 12:45:22 +02:00
Clifford Wolf c7f2e93024 Merge branch 'master' of github.com:YosysHQ/yosys into clifford/specify 2019-05-06 11:46:10 +02:00
David Shah a84256aa36 abc: Fix handling of postfixed names (e.g. for retiming) 
Signed-off-by: David Shah <dave@ds0.me>
 2019-05-04 17:23:44 +01:00
David Shah 5ce9113eda abc: Improve name recovery 
Signed-off-by: David Shah <dave@ds0.me>
 2019-05-04 16:53:25 +01:00
Clifford Wolf a01386c0e4 Improve opt_clean handling of unused wires 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-04 09:47:16 +02:00
Eddie Hung d9c4644e88 Merge remote-tracking branch 'origin/master' into clifford/specify 2019-05-03 15:05:57 -07:00
Clifford Wolf ec39cfd0ad Add "hierarchy -chparam" support for non-verific top modules 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-03 22:03:43 +02:00
Eddie Hung eb21bf3651 log_warning_noprefix -> log_warning as per review 2019-05-03 20:53:25 +02:00
Eddie Hung a27b42e975 WIP -chparam support for hierarchy when verific 2019-05-03 20:53:25 +02:00
Clifford Wolf 373b236108
Merge pull request #969 from YosysHQ/clifford/pmgenstuff 
Improve pmgen, Add "peepopt" pass with shift-mul pattern
 2019-05-03 20:39:50 +02:00
Clifford Wolf f170fb6383
Merge pull request #984 from YosysHQ/eddie/fix_982 
dffinit to do nothing when (* init *) value is 1'bx
 2019-05-03 20:34:32 +02:00
Eddie Hung e08df0c739 If init is 1'bx, do not add to dict as per @cliffordwolf 2019-05-03 08:06:16 -07:00
Eddie Hung fc349de033 Revert "dffinit -noreinit to silently continue when init value is 1'bx" 
This reverts commit aa081f83c7.
 2019-05-03 08:05:37 -07:00
Clifford Wolf 42190207b4 Improve opt_expr and opt_clean handling of (partially) undriven and/or unused wires, fixes #981 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-03 14:25:01 +02:00
Clifford Wolf 5c2c0b4bb2 Further improve unused-detection for opt_clean driver-driver conflict warning 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-03 09:22:26 +02:00
Clifford Wolf f12e1155f1 Improve unused-detection for opt_clean driver-driver conflict warning 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-03 09:12:10 +02:00
Clifford Wolf 2b29aa5c86 Update pmgen documentation 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-03 08:35:45 +02:00
Clifford Wolf e8c5afcb84 Fix typo 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-03 08:25:30 +02:00
Eddie Hung aa081f83c7 dffinit -noreinit to silently continue when init value is 1'bx 2019-05-02 17:40:39 -07:00
Eddie Hung 8829cba901 Merge remote-tracking branch 'origin/clifford/pmgenstuff' into xc7mux 2019-05-02 11:25:34 -07:00
Eddie Hung 5cd19b52da Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-02 10:44:59 -07:00
Eddie Hung f86d153cef Merge branch 'master' of github.com:YosysHQ/yosys 2019-05-01 16:26:43 -07:00
Clifford Wolf 521663f09e Add missing enable_undef to "sat -tempinduct-def", fixes #883 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-02 00:03:31 +02:00
Clifford Wolf 93b7fd7744 Fix floating point exception in qwp, fixes #923 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 15:06:46 +02:00
Clifford Wolf a30b99e66e Silently resolve completely unused cell-vs-const driver-driver conflicts 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 09:29:34 +02:00
Clifford Wolf 32ff37bb5a Fix segfault in wreduce 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 22:20:45 +02:00
Clifford Wolf a27eeff573
Merge pull request #966 from YosysHQ/clifford/fix956 
Drive dangling wires with init attr with their init value
 2019-04-30 18:08:41 +02:00
Clifford Wolf 9d117eba9d Add handling of init attributes in "opt_expr -undriven" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 14:46:12 +02:00
Clifford Wolf b515fd2d25 Add peepopt_muldiv, fixes #930 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 11:25:15 +02:00
Clifford Wolf 4306bebe58 pmgen progress 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 10:51:51 +02:00
Clifford Wolf bb4f3642de Some pmgen reorg, rename peepopt.pmg to peepopt_shiftmul.pmg 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 08:04:22 +02:00
Clifford Wolf 58238da133 Progress in shiftmul peepopt pattern 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 07:59:39 +02:00
Clifford Wolf ea547bcaa3 Add "peepopt" skeleton 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-29 13:38:56 +02:00
Clifford Wolf 9f792c599d Add pmgen support for multiple patterns in one matcher 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-29 13:02:05 +02:00
Clifford Wolf 32881a989c Support multiple pmg files (right now just concatenated together) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-29 12:09:02 +02:00
Clifford Wolf 754b1ee4b3 Drive dangling wires with init attr with their init value, fixes #956 2019-04-29 08:44:53 +02:00
Eddie Hung acafcdc94d Copy with 1'bx padding in $shiftx 2019-04-28 13:04:34 -07:00
Eddie Hung dcc8a13e48 Revert "Merge branch 'eddie/split_shiftx' into xc7mux" 
This reverts commit 3042d58330, reversing
changes made to feff976454.
 2019-04-26 15:32:02 -07:00
Eddie Hung 159e7cc298 Add -undef option to equiv_opt, passed to equiv_induct 2019-04-26 11:16:48 -07:00
Eddie Hung 4473fd1502 Add -undef option to equiv_opt, passed to equiv_induct 2019-04-26 11:14:33 -07:00
Eddie Hung 976d8030dc Actually use pm.st.shiftxB 2019-04-25 19:59:33 -07:00
Eddie Hung fb4348f840 Fix for when B_WIDTH has trailing zeroes 2019-04-25 19:38:19 -07:00
Eddie Hung 880652283c Merge remote-tracking branch 'origin/eddie/split_shiftx' into xc7mux 2019-04-25 18:52:20 -07:00
Eddie Hung ece2c49e92 In order to indicate a failed pattern, blacklist? 2019-04-25 18:39:13 -07:00
Eddie Hung af3c374a35 Elaborate on help message 2019-04-25 17:35:39 -07:00
Eddie Hung 3042d58330 Merge branch 'eddie/split_shiftx' into xc7mux 2019-04-25 17:31:27 -07:00
Eddie Hung ccd0729456 Add split_shiftx command 2019-04-25 17:23:59 -07:00
Eddie Hung 8d00b9ef7e Make pmgen support files more generic 2019-04-25 17:23:46 -07:00
Eddie Hung 408161ea3a
Misspelling 2019-04-25 16:46:13 -07:00
Eddie Hung d9c915042a Move clean from aigerparse to abc9 2019-04-23 13:42:35 -07:00
Clifford Wolf 71c38d9de5 Add $specrule cells for $setup/$hold/$skew specify rules 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
Clifford Wolf 634482380c Preserve $specify[23] cells 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 21:36:59 +02:00
Clifford Wolf c84cdc711c Remove some left-over log_dump() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-23 17:55:41 +02:00
Eddie Hung 4df4a97ffa Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig 2019-04-22 18:20:39 -07:00
Eddie Hung 0bd2bfa737 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 18:15:28 -07:00
Eddie Hung 5f30a8795d Tidy up 2019-04-22 17:47:05 -07:00
Eddie Hung d9daf09cf3
Merge pull request #914 from YosysHQ/xc7srl 
synth_xilinx to now infer SRL16E/SRLC32E
 2019-04-22 13:31:30 -07:00
Eddie Hung 4cfef7897f Merge branch 'xaig' into xc7mux 2019-04-22 11:58:59 -07:00
Eddie Hung 4486a98fd5 Merge remote-tracking branch 'origin/xc7srl' into xc7mux 2019-04-22 11:45:49 -07:00
Eddie Hung 4883391b63 Merge remote-tracking branch 'origin/master' into xaig 2019-04-22 11:19:52 -07:00
Clifford Wolf 8ed4a53d99
Merge pull request #951 from YosysHQ/clifford/logdebug 
Add log_debug() framework
 2019-04-22 20:09:51 +02:00
Clifford Wolf 1d538ff1ec
Merge pull request #949 from YosysHQ/clifford/pmux2shimprove 
Add full_pmux feature to pmux2shiftx
 2019-04-22 20:01:43 +02:00
Eddie Hung e300b1922c Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-22 10:36:27 -07:00
Clifford Wolf e158ea2097 Add log_debug() framework 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 17:25:52 +02:00
whitequark aeeefc32d8 attrmap: extend -remove to allow removing attributes with any value. 
Currently, `-remove foo` would only remove an attribute `foo = ""`,
which doesn't work on an attribute like `src` that may have any
value. Extend `-remove` to handle both cases. `-remove foo=""` has
the old behavior, and `-remove foo` will remove the attribute with
whatever value it may have, which is still compatible with the old
behavior.
 2019-04-22 14:18:15 +00:00
Clifford Wolf 0f0ada13f4 Add full_pmux feature to pmux2shiftx 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 15:26:20 +02:00
Clifford Wolf 99d5435650
Merge pull request #905 from christian-krieg/feature/python_bindings 
Feature/python bindings
 2019-04-22 14:47:52 +02:00
Clifford Wolf a98b171814
Merge pull request #944 from YosysHQ/clifford/pmux2shiftx 
Add pmux2shiftx command
 2019-04-22 08:39:37 +02:00
Eddie Hung d06d4f35c3 Merge remote-tracking branch 'origin/clifford/libwb' into xaig 2019-04-21 18:10:46 -07:00
Clifford Wolf 7b35d57592 Disable blackbox detection in techmap files 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-22 02:07:36 +02:00
Eddie Hung d99422411f Use new pmux2shiftx from #944, remove my old attempt 2019-04-21 14:16:34 -07:00
Eddie Hung 98781acf84 Merge remote-tracking branch 'origin/clifford/pmux2shiftx' into xc7srl 2019-04-20 17:24:33 -07:00
Eddie Hung 9dc11cd842 Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-20 17:24:06 -07:00
Eddie Hung caec7f9d2c Merge remote-tracking branch 'origin/master' into xaig 2019-04-20 12:23:49 -07:00
Clifford Wolf f84a84e3f1
Merge pull request #943 from YosysHQ/clifford/whitebox 
[WIP] Add "whitebox" attribute, add "read_verilog -wb"
 2019-04-20 20:51:54 +02:00
Eddie Hung b25254020c Merge remote-tracking branch 'origin/pmux2shiftx' into xc7srl 2019-04-20 10:44:01 -07:00
Eddie Hung 13ad19482f Merge remote-tracking branch 'origin' into xc7srl 2019-04-20 10:41:43 -07:00
Clifford Wolf fc23af1707 Auto-initialize OnehotDatabase on-demand in pmux2shiftx.cc 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 18:13:37 +02:00
Clifford Wolf 97e9caa4fa Add "onehot" pass, improve "pmux2shiftx" onehot handling 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 17:52:16 +02:00
Clifford Wolf f3ad8d680a Add "techmap -wb", use in formal flows 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:23:24 +02:00
Clifford Wolf b7445ef387 Check blackbox attribute in techmap/simplemap 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:10:05 +02:00
Clifford Wolf 5b915f0153 Add "wbflip" command 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 11:04:46 +02:00
Clifford Wolf e3687f6f4e
Merge pull request #942 from YosysHQ/clifford/fix931 
Improve proc full_case detection and handling
 2019-04-20 10:05:35 +02:00
Clifford Wolf b3a3e08e38 Improve "pmux2shiftx" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 02:03:44 +02:00
Clifford Wolf e06d158e8a Fix some typos 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 01:18:07 +02:00
Clifford Wolf 37728520a6 Improvements in "pmux2shiftx" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 01:15:48 +02:00
Clifford Wolf 0070184ea9 Improvements in pmux2shiftx 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 00:38:25 +02:00
Clifford Wolf 177878cbb0 Improve pmux2shift ctrl permutation finder 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 00:38:25 +02:00
Clifford Wolf 481f0015be Complete rewrite of pmux2shiftx 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 00:38:25 +02:00
Clifford Wolf 1bf8c2b823 Import initial pmux2shiftx from eddieh 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 00:38:25 +02:00
Clifford Wolf eafc4bd49f Improve "show" handling of 0/1/X/Z padding 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-20 00:37:43 +02:00
Eddie Hung 9dec3d9978 Spelling fixes 2019-04-19 14:00:22 +02:00
Eddie Hung 290a798cec Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:32:00 -07:00
Eddie Hung c997a77014 Ignore 'whitebox' attr in flatten with "-wb" option 2019-04-18 10:19:45 -07:00
Eddie Hung 070a2d2fd6 Fix abc's remap_name to not ignore [^0-9] when extracting sid 2019-04-18 09:55:03 -07:00
Eddie Hung 8fe0a961b3 Merge remote-tracking branch 'origin/clifford/whitebox' into xaig 2019-04-18 09:00:06 -07:00
Eddie Hung 9aa94370a5 ABC to call retime all the time 2019-04-18 08:46:41 -07:00
Clifford Wolf f4abc21d8a Add "whitebox" attribute, add "read_verilog -wb" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 17:45:47 +02:00
Eddie Hung 0642baabbc Merge branch 'master' into eddie/fix_retime 2019-04-18 07:57:17 -07:00
Clifford Wolf 88be1cbfa5 Improve proc full_case detection and handling, fixes #931 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-18 15:13:47 +02:00
Eddie Hung a20ed260e1 Skip if abc_box_id earlier 2019-04-17 16:36:03 -07:00
Eddie Hung 709f76c107 Remove use of abc_box_id in stat 2019-04-17 16:35:27 -07:00
Eddie Hung abcd3103ff Do not print slack histogram 2019-04-17 15:11:14 -07:00
Eddie Hung fd89c1056e Working ABC9 script 2019-04-17 12:33:32 -07:00
Eddie Hung ae2653c50f abc9 to output some more info 2019-04-16 16:39:16 -07:00
Eddie Hung b015ed48f7 Merge remote-tracking branch 'origin/master' into xaig 2019-04-16 15:04:20 -07:00
Eddie Hung 55a3638c71 Port from xc7mux branch 2019-04-16 15:01:45 -07:00
Eddie Hung fc5fda595d Merge branch 'xaig' into xc7mux 2019-04-16 13:15:53 -07:00
Eddie Hung afcb86c3d1 abc9 to call "setundef -zero" behaving as for abc 2019-04-16 13:10:13 -07:00
Eddie Hung 98c297fabf ABC to read_box before reading netlist 2019-04-16 12:44:10 -07:00
Eddie Hung b89bb74452 For 'stat' do not count modules with abc_box_id 2019-04-16 11:19:54 -07:00
Eddie Hung a2b106135b Do not call abc on modules with abc_box_id attr 2019-04-16 11:19:42 -07:00
Eddie Hung 4da4a6da2f Revert #895 2019-04-16 11:07:51 -07:00
Eddie Hung 538592067e Merge branch 'xaig' into xc7mux 2019-04-15 22:04:20 -07:00
Eddie Hung 0391499e46 Merge remote-tracking branch 'origin/master' into xaig 2019-04-15 21:56:45 -07:00
Eddie Hung b3378745fd
Revert "Recognise default entry in case even if all cases covered (fix for #931)" 2019-04-15 17:52:45 -07:00
Eddie Hung 9bfcd80063 Handle __dummy_o__ and __const[01]__ in read_aiger not abc 2019-04-12 18:21:16 -07:00
Eddie Hung 482a60825b abc to ignore __dummy_o__ and __const[01]__ when re-integrating 2019-04-12 18:16:50 -07:00
Eddie Hung 88d43a519b Use -map instead of -symbols for aiger 2019-04-12 16:29:14 -07:00
Eddie Hung 941365b4bb Comment out 2019-04-12 12:29:04 -07:00
Eddie Hung 04e466d5e4 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-12 12:28:37 -07:00
Eddie Hung f77da46a87 Merge remote-tracking branch 'origin/master' into xaig 2019-04-12 12:21:48 -07:00
Eddie Hung 3c1f1a6605 Fix ordering of when to insert zero index 2019-04-11 16:25:59 -07:00
Eddie Hung 53513c52df Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux 2019-04-11 16:21:01 -07:00
Eddie Hung f587950bde More unused 2019-04-11 16:20:43 -07:00
Eddie Hung 35181a7866 Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux 2019-04-11 16:18:45 -07:00
Eddie Hung b15b410b41 Remove unused 2019-04-11 16:18:01 -07:00
Eddie Hung b1f1db2fcf Fixes 2019-04-11 16:17:09 -07:00
Eddie Hung e8c26f2839 WIP 2019-04-11 15:52:04 -07:00
Eddie Hung 09e7eb7aed Spelling fixes 2019-04-11 15:09:13 -07:00
Eddie Hung adc6efb584 Recognise default entry in case even if all cases covered (#931) 2019-04-11 12:34:51 -07:00
Eddie Hung 5f4024ffd2 Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen" 
This reverts commit 19271bd996.
 2019-04-10 08:31:40 -07:00
Eddie Hung 78d35a86c0 Revert ""&nf -D 0" fails => use "-D 1" instead" 
This reverts commit 3c253818ca.
 2019-04-10 08:31:35 -07:00
Eddie Hung c89cd48f58 Merge remote-tracking branch 'origin/master' into eddie/fix_retime 2019-04-10 08:23:00 -07:00
Eddie Hung d536379c62 Add "-lut <file>" support to abc9 2019-04-09 14:31:31 -07:00
Eddie Hung 7e304c362b Add "-box" option to abc9 2019-04-09 10:58:06 -07:00
Eddie Hung bd523abef5 Add 'setundef -zero' call prior to aigmap in abc9 2019-04-09 10:32:58 -07:00
Eddie Hung 3b6f85b0a6 Comment out 2019-04-09 10:09:43 -07:00
Eddie Hung 3fc474aa73 Add support for synth_xilinx -abc9 and ignore abc9 -dress opt 2019-04-09 10:06:44 -07:00
Eddie Hung 0deaccbaae
Fix a few typos 2019-04-08 16:46:33 -07:00
Eddie Hung 12c34136ba More space fixing 2019-04-08 16:40:17 -07:00
Eddie Hung bca3cf6843 Merge branch 'master' into xaig 2019-04-08 16:31:59 -07:00
Eddie Hung 6797f6b6c4 $_XILINX_SHREG_ to preserve src attribute 2019-04-08 16:24:20 -07:00
Eddie Hung 7e773741ab Merge branch 'undo_pr895' into xc7srl 2019-04-08 16:07:52 -07:00
Eddie Hung 13fc70d7a4 Undo #895 by instead setting an attribute 2019-04-08 16:05:24 -07:00
Eddie Hung 93b1621911 Cope with undoing #895 2019-04-08 15:57:07 -07:00
Eddie Hung d3930ca79e Revert "Remove handling for $pmux, since #895" 
This reverts commit aa693d5723.
 2019-04-08 12:01:06 -07:00
David Shah 2bf3ca6443 memory_bram: Fix multiport make_transp 
Signed-off-by: David Shah <dave@ds0.me>
 2019-04-07 16:56:31 +01:00
Eddie Hung 1d526b7f06 Call shregmap twice -- once for variable, another for fixed 2019-04-05 17:35:49 -07:00
Eddie Hung 4afcad70e2 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 16:30:17 -07:00
Eddie Hung d559023007 Fix S0 -> S1 2019-04-05 16:28:14 -07:00
Eddie Hung 0364a5d811 Merge branch 'eddie/fix_retime' into xc7srl 2019-04-05 15:46:18 -07:00
Eddie Hung 3c253818ca "&nf -D 0" fails => use "-D 1" instead 2019-04-05 15:30:19 -07:00
Eddie Hung 19271bd996 abc -dff now implies "-D 0" otherwise retiming doesn't happen 2019-04-05 14:42:25 -07:00
Clifford Wolf 75ca06526a Added missing argument checking to "mutate" command 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-04 18:10:10 +02:00
Eddie Hung 572603409c Merge branch 'map_cells_before_map_luts' into xc7srl 2019-04-04 07:54:42 -07:00
Benedikt Tutzer cae657cebd Used PyImport_ImportModule instead of PyImport_Import to avoid the explicit conversion to a python string 2019-04-04 10:35:01 +02:00
Benedikt Tutzer e64b3f1074 Changed filesystem dependency to boost instead of experimental std library 2019-04-04 09:24:50 +02:00
Eddie Hung aa693d5723 Remove handling for $pmux, since #895 2019-04-03 08:35:32 -07:00
Sylvain Munaut 39380c45ba proc_mux: Fix crash when trying to optimize non-existant mux to shiftx 
last_mux_cell can be NULL ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2019-04-03 14:50:12 +02:00
Benedikt Tutzer fd7fb1377d Added cross-platform support for plugin-paths 2019-04-03 13:21:40 +02:00
Eddie Hung d8465590ac Merge remote-tracking branch 'origin/master' into xc7srl 2019-04-03 03:36:11 -07:00
Benedikt Tutzer bbfb43006d Improved Error reporting when Python passes are loaded 2019-04-03 12:21:56 +02:00
David Shah 6acbc016f4 memory_bram: Consider read enable for address expansion register 
Signed-off-by: David Shah <dave@ds0.me>
 2019-04-02 19:47:50 +01:00
Eddie Hung aaa2690a56
Merge pull request #895 from YosysHQ/pmux2shiftx 
RFC: Add a pmux-to-shiftx optimisation to proc_mux
 2019-04-02 00:16:14 -07:00
Benedikt Tutzer 03d1606b42 Merge remote-tracking branch 'origin/master' into feature/python_bindings 2019-03-28 12:16:39 +01:00
Clifford Wolf 32bd0f22ec
Merge pull request #901 from trcwm/libertyfixes 
Libertyfixes: accept superfluous ; at end of group.
 2019-03-28 09:32:05 +01:00
Clifford Wolf 662429cc49
Merge pull request #903 from YosysHQ/bram_reset_transp 
memory_bram: Reset make_transp when growing read ports
 2019-03-28 09:30:48 +01:00
David Shah 60594ad40c memory_bram: Reset make_transp when growing read ports 
Signed-off-by: David Shah <dave@ds0.me>
 2019-03-27 17:19:14 +00:00
Niels Moseley 263ab60b43 Liberty file parser now accepts superfluous ; 2019-03-27 15:17:58 +01:00
Niels Moseley 487cb45b87 Liberty file parser now accepts superfluous ; 2019-03-27 15:15:53 +01:00
Clifford Wolf 2c7fe42ad1 Add "rename -output" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-27 13:47:42 +01:00
Clifford Wolf d351b7cb99 Improve "rename" help message 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-27 13:33:26 +01:00
Clifford Wolf 38b3fbd3f0 Add "cutpoint -undef" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-26 16:01:14 +01:00
Clifford Wolf d0b9b1bece Add "hdlname" attribute 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-26 14:52:48 +01:00
Eddie Hung 6b90d3cf6c Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-25 13:17:22 -07:00
Clifford Wolf ddc1a4488e Add "cutpoint" pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-25 19:49:00 +01:00
Eddie Hung b7a3d35c6b Create one $shiftx per bit in width 2019-03-25 11:16:56 -07:00
Clifford Wolf 9ec50ca7b9
Merge pull request #896 from YosysHQ/transp_fixes 
memory_bram: Fix multiclock make_transp
 2019-03-25 14:55:16 +01:00
Niels Moseley 1f7f54e68e spaces -> tabs 2019-03-25 14:12:04 +01:00
Niels Moseley 9d9cc8a314 EOL is now accepted as ';' replacement on lines that look like: feature_xyz(option) 2019-03-25 12:15:10 +01:00
Niels Moseley 3b3b77291a Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'. 2019-03-24 22:54:18 +01:00
David Shah ac6cc88db3 memory_bram: Fix multiclock make_transp 
Signed-off-by: David Shah <dave@ds0.me>
 2019-03-24 16:21:36 +00:00
Eddie Hung 2507d01b03 Add a pmux-to-shiftx optimisation to proc_mux 2019-03-23 16:45:36 -07:00
Eddie Hung bf83c074c8 Cope with SHREG not having E port; Revert $pmux fine tune 2019-03-23 16:09:38 -07:00
Clifford Wolf ccfa2fe01c Add "mutate -none -mode", "mutate -mode none" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-23 20:20:32 +01:00
Clifford Wolf 59c44bb61a Add "mutate -s <filename>" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-23 17:53:09 +01:00
Eddie Hung 098bd5758f Add support for SHREGMAP+$mux, also fine tune $pmux 2019-03-22 23:22:19 -07:00
Eddie Hung 0895093c7c Leftover printf 2019-03-22 19:14:04 -07:00
Eddie Hung 456295eb66 Fixes for multibit 2019-03-22 18:32:42 -07:00
Eddie Hung 03d108cd1f Working for 1 bit 2019-03-22 17:46:49 -07:00
Eddie Hung 46753cf89f Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-22 13:10:42 -07:00
Clifford Wolf 7cfd83c341 Trim init attributes when resizing FFs in "wreduce", fixes #887 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-22 11:42:19 +01:00
Eddie Hung 5597270b9e Opt 2019-03-21 10:20:27 -07:00
Eddie Hung 2b911e270b Fix spacing 2019-03-20 12:28:39 -07:00
Eddie Hung 505e4c2d59 Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable length 2019-03-19 21:58:05 -07:00
Eddie Hung 5445cd4d00 Add support for variable length Xilinx SRL > 128 2019-03-19 17:44:33 -07:00
Eddie Hung 4cd8f02973 shregmap -tech xilinx to delete $shiftx for var length SRL 2019-03-19 15:05:08 -07:00
Eddie Hung 24553326dd Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-19 13:11:30 -07:00
Eddie Hung 0ea7eba5f1 Make output port a non chain user 2019-03-19 13:08:43 -07:00
Eddie Hung ed32119d13 Fix shregmap to correctly recognise non chain users; cleanup 2019-03-18 16:12:19 -07:00
Eddie Hung b94db54664 shiftx NULL pointer check 2019-03-18 13:35:54 -07:00
Eddie Hung d6d9ef0fee Cleanup 2019-03-16 12:49:46 -07:00
Eddie Hung fadeadb8c8 Only accept <128 for variable length, only if $shiftx exclusive 2019-03-16 08:51:13 -07:00
Eddie Hung 06f8f2654a Working 2019-03-15 19:13:40 -07:00
Clifford Wolf aa65d3fe65 Improve mix of src/wire/wirebit coverage in "mutate -list" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-16 00:55:46 +01:00
Clifford Wolf dacaebae35 Add "fmcombine -fwd -bwd -nop" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 21:45:37 +01:00
Clifford Wolf 370db33a4c Add fmcombine pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 20:46:17 +01:00
Clifford Wolf d1985f6a22 Improvements in "mutate" list-reduce algorithm 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 00:18:31 +01:00
Clifford Wolf 27a5d9c91e Add "mutate -cfg", improve pick_cover behavior 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 23:20:41 +01:00
Clifford Wolf 4d304e3da7 Add a strictly coverage-driven mutation selection strategy 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 23:01:55 +01:00
Clifford Wolf 2a4263a75d Improve "mutate" wire coverage metric 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 23:01:01 +01:00
Clifford Wolf 1b4fdbb0d8 Add more mutation types, improve mutation src cover 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf 6ad5d036c5 Add "mutate" command DB reduce functionality 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf 8e6b69d7bb Add "mutate -mode inv", various other mutate improvements 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf ea8ee24140 Add basic "mutate -list N" framework 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf f806b95ed6 Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 20:52:00 +01:00
Eddie Hung 8af9979aab Revert "Add shregmap -init_msb_first and use in synth_xilinx" 
This reverts commit 26ecbc1aee.
 2019-03-14 09:01:48 -07:00
Eddie Hung f1a8e8a480 Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-14 08:59:19 -07:00
Eddie Hung 26ecbc1aee Add shregmap -init_msb_first and use in synth_xilinx 2019-03-14 08:10:02 -07:00
Clifford Wolf 399ab16315 Add $dffsr support to async2sync 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-09 11:52:00 -08:00
Eddie Hung d03780c3f4
Fix spelling in pmgen/README.md 2019-03-05 17:55:29 -08:00
Clifford Wolf ae9286386d Only run derive on blackbox modules when ports have dynamic size 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-02 12:36:46 -08:00
Larry Doolittle 57f8bb471f Try again for passes/pmgen/ice40_dsp_pm.h rule 
Tested on both in-tree and out-of-tree builds
 2019-03-01 20:20:53 -08:00
Clifford Wolf e847690bda Fix multiple issues in wreduce FF handling, fixes #835 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 17:24:46 -08:00
Larry Doolittle e2fc18f27b Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
Clifford Wolf 68a6937173 Fix pmgen for in-tree builds 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 14:56:05 -08:00
Clifford Wolf 64d91219b4 Fix pmgen for out-of-tree build 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 14:00:58 -08:00
Clifford Wolf 63be3f3bab Improvements in "supercover" pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-27 11:45:13 -08:00
Clifford Wolf a58dbcf2ba Add "supercover" skeleton 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-27 11:37:08 -08:00
Eddie Hung f7c7003a19 Merge remote-tracking branch 'origin/master' into xaig 2019-02-26 13:16:03 -08:00
Eddie Hung 7cac3b1c8b abc9 -- multiple connections for inouts 2019-02-26 12:18:28 -08:00
Larry Doolittle 61fc411c5d Clean up some whitepsace outliers 2019-02-26 09:39:46 -08:00
Eddie Hung 967297cd57 abc9 cleanup 2019-02-25 18:40:53 -08:00
Eddie Hung 721f6a14fb read_aiger to accept empty string for clk_name, passable only if no latches 2019-02-25 15:34:02 -08:00
Eddie Hung 0ca3fd6a1c abc9 not to clean after aigmap 2019-02-25 15:31:52 -08:00
Eddie Hung 51f28a6747 abc9 to call "clean" once at the end of all abc9_module() calls 2019-02-25 12:55:47 -08:00
Clifford Wolf c258b99040 Minor changes ontop of 71bcc4c: Remove hierarchy warning that is redundant to -check 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-24 20:41:36 +01:00
Clifford Wolf c118f9a377
Merge pull request #812 from ucb-bar/arrayhierarchyfixes 
Define basic_cell_type() function and use it to derive the cell type …
 2019-02-24 11:39:13 -08:00
Clifford Wolf cd722f26a5 Cleanups in ARST handling in wreduce 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-24 20:34:23 +01:00
Clifford Wolf da14bc8524
Merge pull request #824 from litghost/fix_reduce_on_ff 
Fix WREDUCE on FF not fixing ARST_VALUE parameter.
 2019-02-24 11:29:14 -08:00
Jim Lawson 71bcc4c644 Address requested changes - don't require non-$ name. 
Suppress warning if name does begin with a `$`.
Fix hierachy tests so they have something to grep.
Announce hierarchy test types.
 2019-02-22 16:06:10 -08:00
Keith Rothman 25680f6a07 Fix WREDUCE on FF not fixing ARST_VALUE parameter. 
Adds test case that fails without code change.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-22 10:30:42 -08:00
Eddie Hung d56f02d1fc abc9 to use AIGER symbol table, as opposed to map file 2019-02-21 17:03:40 -08:00
Clifford Wolf 344afdcd5f
Merge pull request #740 from daveshah1/improve_dress 
Improve ABC netname preservation
 2019-02-22 01:16:34 +01:00
Eddie Hung 2811d66dea Revert "abc9 to write_xaiger -symbols, not -map" 
This reverts commit 04429f8152.
 2019-02-21 14:58:40 -08:00
Eddie Hung 7ad9628f07 Remove irrelevant citations 2019-02-21 14:41:11 -08:00
Eddie Hung 085ed9f487 Add attribution 2019-02-21 14:40:13 -08:00
Eddie Hung 875a02a6f2 abc9 to not select anything extra, and pop selection after final clean 2019-02-21 14:38:52 -08:00
Eddie Hung 04429f8152 abc9 to write_xaiger -symbols, not -map 2019-02-21 14:28:36 -08:00
Eddie Hung 3307295488 Merge branch 'read_aiger' into xaig 2019-02-21 14:27:32 -08:00
Eddie Hung 7f8f36273a abc9 to use &mfs 2019-02-21 13:16:24 -08:00
Eddie Hung a8803a1519 Merge remote-tracking branch 'origin/master' into xaig 2019-02-21 11:23:00 -08:00
Eddie Hung 6b96df41bc abc9 to only disconnect output ports of AND and NOT gates 2019-02-21 11:15:47 -08:00
Clifford Wolf d55790909c Hotfix for 4c82ddf 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-21 19:27:23 +01:00
Keith Rothman 4c82ddf394 Add -params mode to force undef parameters in selected cells. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-21 10:16:38 -08:00
Clifford Wolf 0e371109b0
Merge pull request #818 from YosysHQ/clifford/dffsrfix 
Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816
 2019-02-21 18:58:44 +01:00
Clifford Wolf 893194689d Fix typo in passes/pmgen/README.md 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-21 18:50:02 +01:00
Eddie Hung be061810d7 Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig 2019-02-21 09:31:17 -08:00
Clifford Wolf 2da4c9c8f0 Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-21 13:49:45 +01:00
Clifford Wolf 2fe1c830eb Bugfix in ice40_dsp 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-21 13:28:46 +01:00
Eddie Hung 7f26043caf ABC -> ABC9 2019-02-20 17:36:57 -08:00
Eddie Hung e5b8bb9faa abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_ 2019-02-20 17:33:35 -08:00
Eddie Hung 32853b1f8d lut/not/and suffix to be ${lut,not,and} 2019-02-20 16:30:30 -08:00
Eddie Hung 2ca83005fb abc9 to cope with multiple modules 2019-02-20 12:56:15 -08:00