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Revert enable check
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@ -385,9 +385,7 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
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// (ii) reset value is same as constant D
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// and (a) has no initial value
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// (b) initial value same as constant D
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// and (1) has no enable signal
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// (2) enable is always active
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if (sig_d.is_fully_const() && (!sig_r.size() || val_rv == sig_d.as_const()) && (!has_init || val_init == sig_d.as_const()) && (!sig_e.size() || (sig_d.is_fully_undef() && !has_init))) {
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if (sig_d.is_fully_const() && (!sig_r.size() || val_rv == sig_d.as_const()) && (!has_init || val_init == sig_d.as_const())) {
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// Q is permanently D
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mod->connect(sig_q, sig_d);
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goto delete_dff;
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