mirror of https://github.com/YosysHQ/yosys.git
More cleanup
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978fda94f6
commit
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@ -37,6 +37,7 @@ struct MuxpackWorker
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dict<SigSpec, Cell*> sig_chain_prev;
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pool<SigBit> sigbit_with_non_chain_users;
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pool<Cell*> chain_start_cells;
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pool<Cell*> candidate_cells;
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void make_sig_chain_next_prev()
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{
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@ -59,14 +60,18 @@ struct MuxpackWorker
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if (sig_chain_next.count(a_sig))
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for (auto a_bit : a_sig.bits())
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sigbit_with_non_chain_users.insert(a_bit);
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else
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else {
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sig_chain_next[a_sig] = cell;
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candidate_cells.insert(cell);
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}
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if (sig_chain_next.count(b_sig))
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for (auto b_bit : b_sig.bits())
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sigbit_with_non_chain_users.insert(b_bit);
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else
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else {
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sig_chain_next[b_sig] = cell;
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candidate_cells.insert(cell);
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}
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sig_chain_prev[y_sig] = cell;
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continue;
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@ -81,35 +86,34 @@ struct MuxpackWorker
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void find_chain_start_cells()
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{
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for (auto it : sig_chain_next)
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for (auto cell : candidate_cells)
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{
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SigSpec next_sig = it.second->getPort("\\A");
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SigSpec next_sig = cell->getPort("\\A");
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if (sig_chain_prev.count(next_sig) == 0) {
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next_sig = it.second->getPort("\\B");
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next_sig = cell->getPort("\\B");
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if (sig_chain_prev.count(next_sig) == 0)
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next_sig = SigSpec();
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goto start_cell;
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}
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for (auto bit : next_sig.bits())
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if (sigbit_with_non_chain_users.count(bit))
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goto start_cell;
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if (!next_sig.empty())
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{
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for (auto bit : next_sig.bits())
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if (sigbit_with_non_chain_users.count(bit))
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goto start_cell;
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Cell *c1 = sig_chain_prev.at(next_sig);
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Cell *c2 = it.second;
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Cell *c2 = cell;
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if (c1->type != c2->type)
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goto start_cell;
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if (c1->parameters != c2->parameters)
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goto start_cell;
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continue;
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}
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continue;
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start_cell:
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chain_start_cells.insert(it.second);
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chain_start_cells.insert(cell);
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}
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}
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@ -197,6 +201,7 @@ struct MuxpackWorker
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sig_chain_next.clear();
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sig_chain_prev.clear();
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chain_start_cells.clear();
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candidate_cells.clear();
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}
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MuxpackWorker(Module *module) :
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