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243 Commits

Author SHA1 Message Date
Passant 11914390a0 [wip] add caravel signoff documentation 2022-10-30 14:20:50 -07:00
Passant 138faaa34d update caravel signoff summary report with the STA results 2022-10-30 14:10:17 -07:00
Passant fb9463b834 update caravel generated `.sdf` with the latest signoff run 2022-10-30 14:09:01 -07:00
Passant 99be9e1bc1 update caravel generated `.lib` with the latest signoff run 2022-10-30 14:07:37 -07:00
Passant bdad132c3f update caravel STA signoff reports to include SI analysis and modified constraints 2022-10-30 14:01:45 -07:00
Passant 2b27894190 update caravel/caravan signoff sdc with: 
- add input transition range from `1ns` to `4ns` using `-min` and `-max`
- add cap load range from `5pF` to `10pF` using `-min` and `-max`
- add clock uncertainity `0.1`
- remove power pads transition constraints
- add maximum transition `1.5ns` constraint on HD cells at the ss corner
 2022-10-30 08:16:52 -07:00
Passant 7facc3a6d7 update `mgmt_protect` signoff sdc with `25ns` virtual clock period 2022-10-30 08:15:36 -07:00
Passant a347663bef update `mgmt_protect` generated sdf 2022-10-29 15:50:48 -07:00
Passant 1377267a32 update caravan generated sdf with the updated `mgmt_protect` 2022-10-29 15:49:29 -07:00
Passant 6f2b5c0bc1 update caravel sdf files with the updated `mgmt_protect` 2022-10-29 15:46:55 -07:00
Jeff DiCorpo 1ddcdf1894
Merge pull request #356 from efabless/caravel_redesign-2 
Caravel redesign 2
 2022-10-29 08:08:15 -07:00
Jeff DiCorpo e09df4e60e
Merge pull request #355 from efabless/cleanup 
Cleanup & documentation
 2022-10-29 07:59:27 -07:00
D. Mitch Bailey 2aea2e8ec3 LVS logs for caravel-redesign-2 8c15b85 2022-10-29 07:04:23 -07:00
marwaneltoukhy c824608e25 Merge branch 'main' into caravel_redesign-2 2022-10-28 13:33:35 -07:00
marwaneltoukhy 5c9a2a1e0a added views and signoff reports for eco 2022-10-28 13:13:37 -07:00
mo-hosni 97accbb6fa Update signoff reports 2022-10-27 09:54:43 -07:00
mo-hosni b5010be8a7 Update Openlane views 2022-10-27 09:53:45 -07:00
mo-hosni 2d61e593aa Decreased distances from pins to and gates in mgmt_protect 2022-10-27 08:20:57 -07:00
Marwan Abbas 1f17e7a03f removed old csv and log files 2022-10-26 14:40:30 +02:00
Passant 640a2beb21 add signoff results for caravan: 
- STA reports
- generated .lib
 2022-10-25 07:48:38 -07:00
Passant a3afd58b68 add signoff sdc for caravan 2022-10-25 07:45:30 -07:00
Passant f4ca4045a6 add caravan generated sdf files across all corners using PT 2022-10-25 07:37:15 -07:00
kareem 9a61aa13c4 add caravan spefs and sdfs extracted using timing-scripts repo 2022-10-25 04:58:16 -07:00
Mitch Bailey dee5e3b127
Added signoff extract and lvs reports (#344) 
* added modified gds version for LVS

* extract and lvs logs
 2022-10-22 12:18:07 -07:00
passant5 e067e558a3
update `digital_pll` and `caravel_clocking` sdc pll clocks constraints (#293) 
* update pll clocks period constraint to `11.76ns (85MHz)` instead of `6.6667ns (150 MHz)`

* update sdcs Rev and date
 2022-10-21 07:45:56 -07:00
Passant 59cdcf471d remove `./spef` and `./sdf` directories at the top-level 
add them to `./signoff/openlane-signoff/` as they are generated from openlane
 2022-10-19 14:59:36 -07:00
Kareem Farid 6cf92648c5
+ add script for getting net length from a def file (#306) 
* + add script for getting net length in a def file
+ add net length report for caravel

* regenerate reports due to bad lef path in the previous one
 2022-10-19 12:31:38 -07:00
Passant b6288a75d7 add signoff results for `caravel`: 
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
 2022-10-19 09:26:15 -07:00
Passant e601891d06 add signoff results for `housekeeping`: 
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
 2022-10-19 07:07:48 -07:00
Passant 19ce4a5906 add signoff results for `digital_pll`: 
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
 2022-10-19 07:05:38 -07:00
Passant 8297906630 add signoff results for `caravel_clocking`: 
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
 2022-10-19 07:03:39 -07:00
Passant ac471a1a2f add signoff results for `mgmt_protect`: 
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
 2022-10-19 07:00:05 -07:00
Passant 6ebf42f962 add signoff results for `gpio_control_block`: 
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
 2022-10-19 05:10:24 -07:00
Marwan Abbas bbb6bf775c
Caravel redesign new top (#300) 
* reharden: caravel

~ shift caravel_clocking due to change in size
~ change the pr boundary of caravel_power_routing mag file
~ regenarate lef of caravel_power_routing

* update pdn for `caravel_clocking` & `digital_pll`

* added script to update and generate the power routing views

* ~ run update_power_routing_views from the caravel root with prboundary

* fix output message

* added power routing lef, mag and gds

* fix update_power_routing_views saving wrong cell name

* reharden: caravel

~ incorperate pdn changes
~ re-extract spefs

* fix caravel_power_routing views

* fix abs path in maglef views

* fix abs path in mag views
add substcut layers in gpio_control_block and mgmt_protect

* generate a new chip_io gds

* regenerate gpio_control_block due to mag and gds not in sync

* reharden: caravel

~ change config to pass clean routing
~ use updated views of macros

* lvs clean views

* add caravel top-level generated sdf for all corners

* fix absolute path for mgmt_core_wrapper

Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: Bassant Hassan <bassant.hassan@efabless.com>
 2022-10-18 17:24:07 -07:00
Marwan Abbas 38902bde45
Merge pull request #292 from efabless/caravel-redesign-digital_pll-decaps 
reharden: digital_pll
 2022-10-18 16:35:49 +02:00
Marwan Abbas 4cbf8ca4f6
Merge pull request #291 from efabless/caravel-redesign-clocking-decaps 
reharden: caravel_clocking
 2022-10-18 16:35:26 +02:00
kareem 68063ddadc reharden: digital_pll 
~ increase width for more spread decaps
+ add or cells to cell exclude
~ change placement density in accordance to area
~ change padding to allow for space for decaps
 2022-10-18 07:07:32 -07:00
kareem fdeb6003f3 Merge branch 'caravel_redesign-digital_pll-no-or' into caravel_redesign 2022-10-18 06:31:00 -07:00
kareem 3bd586b50c reharden: caravel_clocking 
~ increase height for more spread decap insertion
+ add or cells to cell exclude
~ adjust pdn to have an offset half to pitch
~ change placement density in accordance to area
~ change padding to allow for space for decap insertion
 2022-10-18 06:18:30 -07:00
mo-hosni cbc3d602ee update housekeeping sdf and spef files 2022-10-18 04:12:09 -07:00
mo-hosni 1918e18c95 update housekeeping openlane signoff logs 2022-10-18 04:10:28 -07:00
mo-hosni 1110ae2fe8 update housekeeping views and openlane configuration 2022-10-18 04:07:27 -07:00
kareem 712b784e16 reharden!: digital_pll 
~ disable or gate
+ add nosynth list file
 2022-10-17 12:33:25 -07:00
Mohamed Shalan 3fbc52ecbf
Merge pull request #276 from efabless/caravel_redesign-digital_pll-fanout 
reharden!: digital_pll
 2022-10-17 20:50:01 +02:00
mo-hosni ad26e2a6ae Update housekeeping openlane signoff logs, spef, and sdf files 2022-10-17 11:40:24 -07:00
mo-hosni 2d147966b9 Update housekeeping views and openlane configuration 2022-10-17 11:37:24 -07:00
kareem e5d9788a43 reharden!: digital_pll 
~ enable synth buffering to fix fanout
~ add *buf_1* to no synth list
~ add attribute (* keep *) to the oscillator as dont
touch for yosys

!need to verify that the oscillator remains untouched
 2022-10-17 10:56:01 -07:00
Passant e756b57cdc Merge branch 'caravel_redesign' of github.com:efabless/caravel into caravel_redesign 2022-10-17 07:44:57 -07:00
Passant b94be3842c add generated sdf files for top-level caravel across all corners 2022-10-17 07:44:09 -07:00
mo-hosni c10b04501f add review.rpt for mgmt_protect and housekeeping 2022-10-17 06:40:07 -07:00
kareem a8794dff4b reharden: caravel 
~ reharden with updated pdn
~ add stubs for non functional blocks
 2022-10-17 03:59:28 -07:00
kareem 704f19b6c7 reharden: caravel 
~ correct placement for spare_logic_block
~ add changes from buffering macro
 2022-10-16 12:56:41 -07:00
kareem fc0701003c reharden: caravel 
- based on second iteration of the buffer macro
- change config with updated placement of spare logic macros
and power routing cell
 2022-10-16 06:58:46 -07:00
Marwan Abbas cb051054af
Merge pull request #254 from mo-hosni/hk_without_lables 
housekeeping without labels
 2022-10-16 13:38:02 +02:00
mo-hosni cf8937d2c4 update openlane signoff logs 2022-10-16 03:48:23 -07:00
mo-hosni 8838acbcaa update sdf views 2022-10-16 03:47:43 -07:00
mo-hosni 3f0bddbcc6 update openlane views 2022-10-16 03:45:30 -07:00
mo-hosni 963306ca02 add signoff logs 2022-10-16 03:20:17 -07:00
mo-hosni 6281d86c43 add sdf and spef files 2022-10-16 03:17:57 -07:00
mo-hosni 22dde425ac add mgmt_protect views and openlane files 2022-10-16 03:14:55 -07:00
passant5 df2cd63152
Re-implemented Macros generated libs (#251) 
* move `gpio_control_block` libs to `./signoff/<design_name>/standalone_pvr/primetime-signoff/lib/`

* add generated libs for `housekeeping`

* add generated lib for `caravel_clocking`

* add generated libs for `digital_pll`

* add generated libs for `mgmt_protect`
 2022-10-15 18:30:46 -07:00
Marwan Abbas 8b5f57f3f1
Merge pull request #250 from efabless/update_signoff_scripts 
update signoff scripts
 2022-10-15 23:05:31 +02:00
Passant dfdfea3778 update caravel signoff sdc with: 
-case analysis for the 38 IO pads
-false path from some pads inputs to the housekeeping
 2022-10-15 13:38:10 -07:00
kareem 5d5d019ea1 Revert "add buff_flash_clkrst" 
This reverts commit 2675487322.
 2022-10-15 08:47:02 -07:00
mo-hosni 2675487322 add buff_flash_clkrst 2022-10-15 06:38:42 -07:00
mo-hosni b76becefef add sdf and spef files 2022-10-15 01:56:09 -07:00
mo-hosni edcbcb959d add openlane signoff files for mgmt_protect 2022-10-15 01:52:24 -07:00
passant5 9e1b6610d1
Merge pull request #234 from efabless/openlane-runs-config 
+ add caravel_clocking & digital_pl & gpio_control_block openlane runs config.tcl file
 2022-10-14 23:47:44 +02:00
kareem ea6badcd67 + add caravel_clocking & digital_pl & gpio_control_block openlane run config.tcl file 2022-10-14 14:28:47 -07:00
Passant f69a522f19 update script to get the signoff sdc from directory `./signoff/<design name>/<design name>.sdc` 2022-10-14 13:57:16 -07:00
mo-hosni d596b9dae6 add full configuration files for housekeeping and mgmt_protect 2022-10-14 12:12:39 -07:00
mo-hosni 9b2f20d428 add openlane signoff for housekeeping 2022-10-14 09:35:57 -07:00
mo-hosni 0e01725608 add housekeeping views 2022-10-14 09:26:34 -07:00
kareem aadfb57609 reharden: caravel_clocking 
~ align pdn with top level
~ move spefs and sdfs output corners to signoff/*/openlane-signoff
 2022-10-14 05:24:49 -07:00
kareem 6c45f418dd ~ move caravel spefs 2022-10-13 13:49:22 -07:00
Marwan Abbas f4f26398f0
Merge pull request #209 from efabless/add_pt_dir 
Add PT signoff directories for each block
 2022-10-13 21:08:51 +02:00
Marwan Abbas f7299933ee
Merge pull request #217 from mo-hosni/buff_flash_clkrst 
Buff flash clkrst
 2022-10-13 20:53:18 +02:00
mo-hosni 687723fb14 add buff_flash_clkrst signoff reports, sdf, and spef files 2022-10-13 11:47:35 -07:00
Marwan Abbas 14856fea6d
Merge pull request #216 from mo-hosni/housekeeping_final_views 
Housekeeping final views
 2022-10-13 20:47:09 +02:00
marwaneltoukhy a6c7225aee changed sdf paths 2022-10-13 11:43:10 -07:00
Marwan Abbas e72f819020
Merge pull request #210 from mo-hosni/final_views 
mgmt_protect final views
 2022-10-13 20:33:57 +02:00
mo-hosni 9d371f74ae add mgmt_protect views 2022-10-13 11:27:09 -07:00
mo-hosni 2ed7c9fdff add housekeeping signoff report 2022-10-13 11:21:16 -07:00
Marwan Abbas 08ac55bed8
Merge pull request #214 from efabless/caravel_clocking-buffering 
Caravel clocking reharden
 2022-10-13 20:13:45 +02:00
kareem c922241c3f reharden: caravel_clocking 
+ add custom interactive script to insert a buffer on user_clk output
and have a large buffer on core_clk
~ change pdn config to match top level
~ change sdc
~ change openlane configuration
 2022-10-13 10:54:04 -07:00
marwaneltoukhy bd011f7b2d added sdc file output from OL 2022-10-13 10:48:27 -07:00
marwaneltoukhy 08a8e6d87f added sdc file output from OL 2022-10-13 10:47:07 -07:00
mo-hosni 889aa7e308 add buff_flash_clkrst 2022-10-13 10:35:51 -07:00
marwaneltoukhy 60584f56ce changed spef and sdf files locations 2022-10-13 10:34:43 -07:00
marwaneltoukhy 934cf4e709 changed spef and sdf files locations 2022-10-13 10:32:09 -07:00
marwaneltoukhy ffb760d994 changed spef and sdf files locations 2022-10-13 10:22:57 -07:00
mo-hosni 0389423ea6 add housekeeping 2022-10-13 10:15:05 -07:00
mo-hosni 1aaebf5cbb add mgmt_protect 2022-10-13 10:11:45 -07:00
Passant 5afa7739b9 add primetime signoff for `gpio_control_block` 2022-10-13 09:38:48 -07:00
marwaneltoukhy c83d7b6a52 changed paths of openlane signoff spef and sdfs 2022-10-13 09:11:54 -07:00
kareem 59743f4832 change buf16 to clkbuf16 and reimplement 2022-10-13 06:54:55 -07:00
kareem 0eed96f33f reharden: digital_pll 
~ reimplement digital_pll using updated RTL
~ changes in config to generate same PDN
~ change deprecated variables
 2022-10-13 06:21:08 -07:00
Passant 78cec109cc add signoff sdc dir 
move sdc generated from openlane to signoff/<design name>/openlane-signoff
rearrange spef directory with RC corners spefs
 2022-10-12 07:28:32 -07:00
mo-hosni 76f8d37496 Rehardened housekeeping to fix Antenna violations. 2022-10-11 16:41:50 -07:00
kareem 70b4c07598 copy openlane run's signoff directory 2022-10-10 06:11:06 -07:00
kareem f4218ddde9 reharden!: gpio_control_block 
- reimplement using a sparecell
- reimplement using newest open_pdks

!important using openlane pre odb with some local patches which
most if not all are merged in the current head of openlane however
still takes effort to update the interactive script to be latest
openlane compatible

!important override abstract lef generated by openlane. openlane
 generates lef and mag that contain def BLOCKAGE layers that cause
congestions during top level routing
 2022-10-10 05:42:29 -07:00
kareem 285ef6b642 reharden!: caravel 
~ update the following views:
def
mag
verilog
spef(all corners)
+ add the ability to override the interactive script filename
+ add the ability to run openlane regression using regression.config
file
~ change GRT ADJUSTMENT values
~ change pointers to some files for workarounds

!important the interactive script still needs updates
!important this was done using old openlane v0.22 and its matching
pdk
!important known workarounds:
- a custom techlef is used where large metal spacing rules are the
only ones present to avoid violations by the router
- some odd behaviour happening when a macro has a lef view
with a non zero origin. so the power routing cell is (temporarily)
modified to have a zero origin and its placement has been shifted
which doesn't match the power routing mag.
- the old openlane doesn't generate multi spef corners. they
are generated using timing-scripts repo
 2022-10-10 04:51:05 -07:00
mo-hosni d6ca7f9091 rehardened housekeeping after rtl update, and fixed all hold and transition violations. 2022-10-07 16:59:01 -07:00
mo-hosni 9c850bf94b rehardened housekeeping 2022-10-05 12:35:03 -07:00
mo-hosni fcc009e65a rehardeneded mgmt_protect 2022-10-05 12:26:24 -07:00
kareem c1e0d5ba06 openlane!: reharden gpio_control_block 
update gpio_control_block config for new openlane versions:
- disable `SYNTH_BUFFERING` and `SYNTH_SIZING` to limit the design size
and fit the floorplan
- change `SYNTH_STRATEGY` to `AREA 0` to minimize design cells
- disable `PL_RESIZER_TIMING_OPTIMIZATIONS` and
enable `GLB_RESIZER_TIMING_OPTIMIZATIONS`
- remove `FP_IO_*` and replace them with `FP_DEF_TEMPLATE` for io placement
- set `DECAP_CELL` to not use ef decaps.. i think that was for simulations?
- enable some turned off `QUIT_*` variables
- replace deprecated variables such as `GLB_RT_*`
- customize `pdn.tcl` to force pdn straps to follow the old pattern
- replace `$script_dir` with `$::env(DESIGN_DIR)`

!IMPORTANT - still need to run dynamic simulations
 2022-09-14 11:06:23 -07:00
kareem ac1928a45b harden: gpio_control_block with updated rtl 
TODO: run full verification
 2022-08-15 02:29:01 -07:00
Kareem Farid 9ddb806293
gpio_control_block constrains fix (#69) 
Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
 2022-04-15 11:50:54 -07:00
Kareem Farid dcebeed7e7
Mgmt protect update (#58) 
* - add openlane patch file to for input buffering workaround
- update configuration of mgmt protect

* mgmt_protect updated

* mgmt_protect updated

* remove some via3 to fix power shorts

Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
 2022-04-08 09:29:49 -07:00
Kareem Farid e3b9a99154
- update gpio_control_block config (#57) 
- update gpio_control_block views
- gitignore gds/*gds
 2022-04-08 09:27:51 -07:00
manarabdelaty 7880a52d13 Update timing targets to run at the three corners 2021-12-29 19:11:13 +02:00
manarabdelaty 981043cb7b [DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells 2021-12-24 21:06:58 +02:00
manarabdelaty bd88221d17 [DATA] Update caravel_clocking 2021-12-07 13:36:56 +02:00
manarabdelaty 966b1f22bb [DATA] Update digital_pll 2021-12-07 13:19:02 +02:00
manarabdelaty aa766f9144 [DATA] Update caravel_clocking module 2021-12-05 19:44:28 +02:00
manarabdelaty ef1019b62a [DATA] Update caravel_clocking 2021-12-02 22:50:20 +02:00
manarabdelaty 0067bd5b7c [DATA] Update caravel_clocking/digital_pll/housekeeping 2021-12-02 21:09:43 +02:00
manarabdelaty 83863fe16e Add timing log for caravel 2021-12-01 19:28:33 +02:00
manarabdelaty c4efcec989 [DATA] Update housekeeping views 2021-11-30 13:00:33 +02:00
manarabdelaty 8b1c5df909 [DATA] Update caravel_clocking module (timing clean) 2021-11-25 15:23:01 +02:00
manarabdelaty 05278ec738 [DATA] Update HK views (timing clean) 2021-11-25 12:54:22 +02:00
manarabdelaty 83e150bf25 [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00
manarabdelaty 1c18c1dae9 [DATA] Update caravel 2021-11-20 17:28:59 +02:00
manarabdelaty 331fdee2bb [DATA] Update HK module (li1 routing: 249um) 2021-11-20 15:13:16 +02:00
manarabdelaty 5cd3843f00 [DATA] Update gpio_control_block (li1 used 2um) 2021-11-20 14:43:20 +02:00
manarabdelaty 37fb2d6766 [DATA] update caravel_clocking module (removed long li1 routes, in total it used 8um from li1) 2021-11-20 13:07:23 +02:00
manarabdelaty bf6ad67934 [DATA] Update gpio_control_block pin order to fix shorts at the top level 2021-11-19 13:13:24 +02:00
manarabdelaty 581a22de6a [DATA] Update mgmt_protect (removed all li1 routing ) 2021-11-19 13:11:18 +02:00
manarabdelaty 61bf3c651e [DATA] Update mgmt_protect pin placement 2021-11-19 01:33:11 +02:00
manarabdelaty 53b3a9013e [DATA] Update HK pin placement 2021-11-19 01:30:14 +02:00
manarabdelaty 37a07e291b [DATA] Update digital_pll pin placement to have it align with the HK 2021-11-19 01:28:40 +02:00
manarabdelaty 64bdd6230d [DATA] Update caravel_clocking module floorplan 2021-11-19 01:26:29 +02:00
manarabdelaty 1b300d7b59 [DATA] Add digital user project wrapper 2021-11-17 13:13:11 +02:00
manarabdelaty 72b2c724c9 [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
manarabdelaty 56f672bbd8 [DATA] Add HK views 2021-11-15 13:23:54 +02:00
manarabdelaty 85a1ffc5aa [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
manarabdelaty bee7b4ed78 Add initial config for the digital_pll 2021-11-08 13:34:59 +02:00
manarabdelaty 59076d499a Update gpio_defaults_block to align the pins with the gpio_control_block 2021-11-05 23:27:32 +02:00
manarabdelaty 49c506f052 Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency 2021-11-05 18:36:43 +02:00
manarabdelaty e68664101c Update gpio_control_block 2021-11-05 16:54:55 +02:00
manarabdelaty 53b09f43d1 Add gpio_defaults_block views 2021-11-05 12:33:36 +02:00
manarabdelaty 78ce7265c1 Update gpio_control block 2021-11-04 17:58:58 +02:00
manarabdelaty cb9990f97e harden gpio_control_block 2021-11-04 16:19:12 +02:00