Update housekeeping views and openlane configuration

This commit is contained in:
mo-hosni 2022-10-17 11:37:24 -07:00
parent 825e3252e4
commit 2d147966b9
11 changed files with 738216 additions and 770284 deletions

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@ -2887,9 +2887,9 @@ MACRO housekeeping
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@ -3017,9 +3017,9 @@ MACRO housekeeping
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END
END housekeeping
END LIBRARY

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@ -1,11 +1,11 @@
magic
tech sky130A
magscale 1 2
timestamp 1665915522
timestamp 1666031400
<< obsli1 >>
rect 1104 2159 72864 107729
<< obsm1 >>
rect 106 1164 73678 108520
rect 566 1028 73862 107976
<< metal2 >>
rect 1950 109390 2006 110190
rect 2502 109390 2558 110190
@ -229,7 +229,7 @@ rect 69386 0 69442 800
rect 70122 0 70178 800
rect 70858 0 70914 800
<< obsm2 >>
rect 112 109334 1894 109426
rect 570 109334 1894 109426
rect 2062 109334 2446 109426
rect 2614 109334 2998 109426
rect 3166 109334 3550 109426
@ -357,9 +357,9 @@ rect 69958 109334 70342 109426
rect 70510 109334 70894 109426
rect 71062 109334 71446 109426
rect 71614 109334 71998 109426
rect 72166 109334 73672 109426
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rect 112 734 3090 856
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rect 570 856 73856 109334
rect 570 734 3090 856
rect 3258 734 3826 856
rect 3994 734 4562 856
rect 4730 734 5298 856
@ -452,7 +452,7 @@ rect 68026 734 68594 856
rect 68762 734 69330 856
rect 69498 734 70066 856
rect 70234 734 70802 856
rect 70970 734 73672 856
rect 70970 734 73856 856
<< metal3 >>
rect 0 107992 800 108112
rect 73246 107176 74046 107296
@ -587,265 +587,265 @@ rect 73246 2728 74046 2848
rect 0 1912 800 2032
<< obsm3 >>
rect 880 107912 73246 108085
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<< metal4 >>
rect 4208 2128 4528 107760
@ -855,13 +855,13 @@ rect 35588 2128 35908 107760
rect 65648 2128 65968 107760
rect 66308 2128 66628 107760
<< obsm4 >>
rect 1163 2347 4128 107269
rect 4608 2347 4788 107269
rect 5268 2347 34848 107269
rect 35328 2347 35508 107269
rect 35988 2347 65568 107269
rect 66048 2347 66228 107269
rect 66708 2347 71149 107269
rect 1899 2483 4128 106317
rect 4608 2483 4788 106317
rect 5268 2483 34848 106317
rect 35328 2483 35508 106317
rect 35988 2483 65568 106317
rect 66048 2483 66228 106317
rect 66708 2483 71701 106317
<< metal5 >>
rect 1056 97206 72912 97526
rect 1056 81888 72912 82208
@ -870,8 +870,6 @@ rect 1056 51252 72912 51572
rect 1056 35934 72912 36254
rect 1056 20616 72912 20936
rect 1056 5298 72912 5618
<< obsm5 >>
rect 10420 9020 18468 9340
<< labels >>
rlabel metal4 s 4868 2128 5188 107760 6 VGND
port 1 nsew ground bidirectional
@ -1607,8 +1605,8 @@ port 354 nsew signal input
string FIXED_BBOX 0 0 74046 110190
string LEFclass BLOCK
string LEFview TRUE
string GDS_END 24153662
string GDS_FILE /home/hosni/caravel/openlane/housekeeping/runs/22_10_16_03_09/results/signoff/housekeeping.magic.gds
string GDS_START 1166508
string GDS_END 23070036
string GDS_FILE /home/hosni/power/caravel/openlane/housekeeping/runs/22_10_17_11_22/results/signoff/housekeeping.magic.gds
string GDS_START 1028052
<< end >>

View File

@ -40,6 +40,7 @@ set ::env(SYNTH_STRATEGY) "AREA 0"
set ::env(SYNTH_MAX_FANOUT) 20
set ::env(SYNTH_BUFFERING) 0
set ::env(SYNTH_READ_BLACKBOX_LIB) 1
## Floorplan
set ::env(FP_SIZING) absolute
@ -94,4 +95,5 @@ set ::env(GRT_MAX_DIODE_INS_ITERS) 10
# set ::env(CTS_CLK_MAX_WIRE_LENGTH) 120
set ::env(CTS_MAX_CAP) 0.25
set ::env(MAGIC_DEF_LABELS) 0
set ::env(MAGIC_DEF_LABELS) 0
set ::env(RSZ_DONT_TOUCH_RX) {mgmt_gpio_out_9_prebuff|mgmt_gpio_out\[9\]|mgmt_gpio_out_14_prebuff|mgmt_gpio_out\[14\]|mgmt_gpio_out_15_prebuff|mgmt_gpio_out\[15\]|pad_flash_clk\y|pad_flash_clk_prebuff}

View File

@ -1,4 +1,5 @@
sky130_fd_sc_hd__clkbuf_1
sky130_fd_sc_hd__buf_1
sky130_fd_sc_hd__clkdlybuf4s15_1
sky130_fd_sc_hd__clkdlybuf4s15_2
sky130_fd_sc_hd__clkdlybuf4s18_1
@ -193,3 +194,12 @@ sky130_fd_sc_hd__or4bb_1
sky130_fd_sc_hd__xnor2_1
sky130_fd_sc_hd__xor2_1
sky130_fd_sc_hd__ebufn_2
sky130_fd_sc_hd__or4_1
sky130_fd_sc_hd__or4_2
sky130_fd_sc_hd__or4_4
sky130_fd_sc_hd__or4_8
sky130_fd_sc_hd__or4_12
sky130_fd_sc_hd__or3_2
sky130_fd_sc_hd__or3_4
sky130_fd_sc_hd__or3_8
sky130_fd_sc_hd__or3_12

View File

@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
/home/hosni/caravel/openlane/housekeeping,housekeeping,22_10_16_03_09,flow completed,0h10m59s0ms,0h7m14s0ms,-2.0,0.20397821850000003,-1,27.46,1741.04,-1,0,0,0,0,0,0,0,-1,0,-1,-1,557360,64424,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,340531607.0,0.0,58.02,76.87,26.49,60.61,2.55,8363,9422,189,1195,0,0,0,9086,156,1,144,323,4521,44,5,170,942,889,20,388,2646,0,3034,189331.584,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10.0,AREA 0,20,50,1,153.6,153.18,0.31,0.3,sky130_fd_sc_hd,3
/home/hosni/power/caravel/openlane/housekeeping,housekeeping,22_10_17_11_22,flow completed,0h9m45s0ms,0h5m58s0ms,-2.0,0.20397821850000003,-1,27.72,1638.61,-1,0,0,0,0,0,0,0,-1,0,-1,-1,529052,61685,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,327868030.0,0.0,55.92,74.15,19.96,60.34,0.07,8367,9426,193,1199,0,0,0,9090,154,1,145,321,4522,44,5,170,942,889,21,388,2646,0,3034,189331.584,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,10.0,100.0,10.0,AREA 0,20,50,1,153.6,153.18,0.31,0.3,sky130_fd_sc_hd,3

1 design design_name config flow_status total_runtime routed_runtime (Cell/mm^2)/Core_Util DIEAREA_mm^2 CellPer_mm^2 OpenDP_Util Peak_Memory_Usage_MB cell_count tritonRoute_violations Short_violations MetSpc_violations OffGrid_violations MinHole_violations Other_violations Magic_violations antenna_violations lvs_total_errors cvc_total_errors klayout_violations wire_length vias wns pl_wns optimized_wns fastroute_wns spef_wns tns pl_tns optimized_tns fastroute_tns spef_tns HPWL routing_layer1_pct routing_layer2_pct routing_layer3_pct routing_layer4_pct routing_layer5_pct routing_layer6_pct wires_count wire_bits public_wires_count public_wire_bits memories_count memory_bits processes_count cells_pre_abc AND DFF NAND NOR OR XOR XNOR MUX inputs outputs level EndCaps TapCells Diodes Total_Physical_Cells CoreArea_um^2 power_slowest_internal_uW power_slowest_switching_uW power_slowest_leakage_uW power_typical_internal_uW power_typical_switching_uW power_typical_leakage_uW power_fastest_internal_uW power_fastest_switching_uW power_fastest_leakage_uW critical_path_ns suggested_clock_period suggested_clock_frequency CLOCK_PERIOD SYNTH_STRATEGY SYNTH_MAX_FANOUT FP_CORE_UTIL FP_ASPECT_RATIO FP_PDN_VPITCH FP_PDN_HPITCH PL_TARGET_DENSITY GRT_ADJUSTMENT STD_CELL_LIBRARY DIODE_INSERTION_STRATEGY
2 /home/hosni/caravel/openlane/housekeeping /home/hosni/power/caravel/openlane/housekeeping housekeeping 22_10_16_03_09 22_10_17_11_22 flow completed 0h10m59s0ms 0h9m45s0ms 0h7m14s0ms 0h5m58s0ms -2.0 0.20397821850000003 -1 27.46 27.72 1741.04 1638.61 -1 0 0 0 0 0 0 0 -1 0 -1 -1 557360 529052 64424 61685 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 340531607.0 327868030.0 0.0 58.02 55.92 76.87 74.15 26.49 19.96 60.61 60.34 2.55 0.07 8363 8367 9422 9426 189 193 1195 1199 0 0 0 9086 9090 156 154 1 144 145 323 321 4521 4522 44 5 170 942 889 20 21 388 2646 0 3034 189331.584 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10.0 100.0 10.0 AREA 0 20 50 1 153.6 153.18 0.31 0.3 sky130_fd_sc_hd 3

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@ -254,6 +254,10 @@ module housekeeping #(
wire cwstb; // Combination of SPI write strobe and back door write strobe
wire csclk; // Combination of SPI SCK and back door access trigger
// Output clock signals buffer wires
wire mgmt_gpio_out_9_prebuff, mgmt_gpio_out_14_prebuff, mgmt_gpio_out_15_prebuff, pad_flash_clk_prebuff;
`ifdef USE_SRAM_RO_INTERFACE
wire [31:0] sram_ro_data;
`endif
@ -275,7 +279,7 @@ module housekeeping #(
assign pad_flash_csb = (pass_thru_mgmt_delay) ? mgmt_gpio_in[3] : spimemio_flash_csb;
assign pad_flash_csb_oeb = (pass_thru_mgmt_delay) ? 1'b0 : (~porb ? 1'b1 : 1'b0);
assign pad_flash_clk = (pass_thru_mgmt) ? mgmt_gpio_in[4] : spimemio_flash_clk;
assign pad_flash_clk_prebuff = (pass_thru_mgmt) ? mgmt_gpio_in[4] : spimemio_flash_clk;
assign pad_flash_clk_oeb = (pass_thru_mgmt) ? 1'b0 : (~porb ? 1'b1 : 1'b0);
assign pad_flash_io0_oeb = (pass_thru_mgmt_delay) ? 1'b0 : spimemio_flash_io0_oeb;
assign pad_flash_io1_oeb = (pass_thru_mgmt) ? 1'b1 : spimemio_flash_io1_oeb;
@ -286,6 +290,15 @@ module housekeeping #(
assign spimemio_flash_io0_di = (pass_thru_mgmt_delay) ? 1'b0 : pad_flash_io0_di;
assign spimemio_flash_io1_di = (pass_thru_mgmt) ? 1'b0 : pad_flash_io1_di;
(* keep *) sky130_fd_sc_hd__clkbuf_8 pad_flashh_clk_buff_inst (
`ifdef USE_POWER_PINS
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPWR),
.VNB(VGND),
`endif
.A(pad_flash_clk_prebuff),
.X(pad_flash_clk));
wire [11:0] mfgr_id;
wire [7:0] prod_id;
@ -800,8 +813,19 @@ module housekeeping #(
assign mgmt_gpio_out[10] = (pass_thru_user_delay) ? mgmt_gpio_in[2]
: mgmt_gpio_data[10];
assign mgmt_gpio_out[9] = (pass_thru_user) ? mgmt_gpio_in[4]
assign mgmt_gpio_out_9_prebuff = (pass_thru_user) ? mgmt_gpio_in[4]
: mgmt_gpio_data[9];
(* keep *) sky130_fd_sc_hd__clkbuf_8 mgmt_gpio_9_buff_inst (
`ifdef USE_POWER_PINS
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPWR),
.VNB(VGND),
`endif
.A(mgmt_gpio_out_9_prebuff),
.X(mgmt_gpio_out[9]));
assign mgmt_gpio_out[8] = (pass_thru_user_delay) ? mgmt_gpio_in[3]
: mgmt_gpio_data[8];
@ -840,10 +864,32 @@ module housekeeping #(
// so the pad being under control of the user area takes precedence
// over the system monitoring function.
assign mgmt_gpio_out[15] = (clk2_output_dest == 1'b1) ? user_clock
assign mgmt_gpio_out_15_prebuff = (clk2_output_dest == 1'b1) ? user_clock
: mgmt_gpio_data[15];
assign mgmt_gpio_out[14] = (clk1_output_dest == 1'b1) ? wb_clk_i
(* keep *) sky130_fd_sc_hd__clkbuf_8 mgmt_gpio_15_buff_inst (
`ifdef USE_POWER_PINS
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPWR),
.VNB(VGND),
`endif
.A(mgmt_gpio_out_15_prebuff),
.X(mgmt_gpio_out[15]));
assign mgmt_gpio_out_14_prebuff = (clk1_output_dest == 1'b1) ? wb_clk_i
: mgmt_gpio_data[14];
(* keep *) sky130_fd_sc_hd__clkbuf_8 mgmt_gpio_14_buff_inst (
`ifdef USE_POWER_PINS
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPWR),
.VNB(VGND),
`endif
.A(mgmt_gpio_out_14_prebuff),
.X(mgmt_gpio_out[14]));
assign mgmt_gpio_out[13] = (trap_output_dest == 1'b1) ? trap
: mgmt_gpio_data[13];