LVS logs for caravel-redesign-2 8c15b85

signoff/caravan/lvs-signoff/abstract

@@ -1,12 +1,12 @@
-sky130_fd_sc_hvl__fill_1
-sky130_fd_sc_hvl__fill_2
-sky130_fd_sc_hd__fill_2
-sky130_fd_sc_hd__fill_1
-sky130_fd_sc_hd__tapvpwrvgnd_1
-E6_sky130_fd_sc_hd__tapvpwrvgnd_1
-E6_sky130_fd_sc_hd__fill_2
-sky130_fd_sc_hd__fill_4
 sky130_fd_sc_hd__fill_8
-RX_sky130_fd_sc_hvl__fill_4
-E6_sky130_fd_sc_hd__fill_1
+sky130_fd_sc_hd__fill_4
+BV_sky130_fd_sc_hd__fill_2
+BV_sky130_fd_sc_hd__tapvpwrvgnd_1
+sky130_fd_sc_hd__fill_2
+sky130_fd_sc_hd__tapvpwrvgnd_1
+sky130_fd_sc_hd__fill_1
+sky130_fd_sc_hvl__fill_2
+sky130_fd_sc_hvl__fill_1
+BV_sky130_fd_sc_hd__fill_1
+HI_sky130_fd_sc_hvl__fill_4
 user_analog_project_wrapper

signoff/caravan/lvs-signoff/verilog_files

@@ -1,26 +1,26 @@
-/home/kanobailey/mpw-7/caravan_lvs/mcw_core_wrapper/verilog/gl/RAM128.v
-/home/kanobailey/mpw-7/caravan_lvs/mcw_core_wrapper/verilog/gl/RAM256.v
-/home/kanobailey/mpw-7/caravan_lvs/mcw_core_wrapper/verilog/gl/mgmt_core_wrapper.v
-/home/kanobailey/mpw-7/extra_be_checks/verilog/user_analog_project_wrapper.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/buff_flash_clkrst.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/caravel_clocking.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/constant_block.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/chip_io.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/chip_io_alt.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/digital_pll.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_logic_high.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_control_block.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_defaults_block_0403.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_defaults_block_0801.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_defaults_block_1803.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_signal_buffering.v
-#/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/gpio_signal_buffering_alt.v
-/home/kanobailey/mpw-7/caravan_lvs/work/gpio_signal_buffering_alt.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/housekeeping.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/mgmt_protect_hv.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/mprj2_logic_high.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/mprj_logic_high.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/mgmt_protect.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/spare_logic_block.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/user_id_programming.v
-/home/kanobailey/mpw-7/caravan_lvs/caravan/verilog/gl/xres_buf.v
+$::env(MCW_ROOT)/verilog/gl/RAM128.v
+$::env(MCW_ROOT)/verilog/gl/RAM256.v
+$::env(MCW_ROOT)/verilog/gl/mgmt_core_wrapper.v
+$::env(LVS_ROOT)/verilog/user_analog_project_wrapper.v
+$::env(LVS_ROOT)/verilog/user_project_wrapper.v
+$::env(CARAVEL_ROOT)/verilog/gl/buff_flash_clkrst.v
+$::env(CARAVEL_ROOT)/verilog/gl/caravel_clocking.v
+$::env(CARAVEL_ROOT)/verilog/gl/constant_block.v
+$::env(CARAVEL_ROOT)/verilog/gl/chip_io.v
+$::env(CARAVEL_ROOT)/verilog/gl/chip_io_alt.v
+$::env(CARAVEL_ROOT)/verilog/gl/digital_pll.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_logic_high.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_control_block.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_defaults_block_0403.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_defaults_block_0801.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_defaults_block_1803.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_signal_buffering.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_signal_buffering_alt.v
+$::env(CARAVEL_ROOT)/verilog/gl/housekeeping.v
+$::env(CARAVEL_ROOT)/verilog/gl/mgmt_protect_hv.v
+$::env(CARAVEL_ROOT)/verilog/gl/mprj2_logic_high.v
+$::env(CARAVEL_ROOT)/verilog/gl/mprj_logic_high.v
+$::env(CARAVEL_ROOT)/verilog/gl/mgmt_protect.v
+$::env(CARAVEL_ROOT)/verilog/gl/spare_logic_block.v
+$::env(CARAVEL_ROOT)/verilog/gl/user_id_programming.v
+$::env(CARAVEL_ROOT)/verilog/gl/xres_buf.v

signoff/caravel/lvs-signoff/abstract

@@ -1,5 +1,12 @@
-__fakediode_
-__fill_
-__tapvpwrvgnd_
+sky130_fd_sc_hd__fill_8
+sky130_fd_sc_hd__fill_4
+IZ_sky130_fd_sc_hd__fill_2
+IZ_sky130_fd_sc_hd__tapvpwrvgnd_1
+sky130_fd_sc_hd__tapvpwrvgnd_1
+sky130_fd_sc_hd__fill_1
+sky130_fd_sc_hd__fill_2
+sky130_fd_sc_hvl__fill_2
+sky130_fd_sc_hvl__fill_1
+IZ_sky130_fd_sc_hd__fill_1
+L0_sky130_fd_sc_hvl__fill_4
 user_project_wrapper
-user_analog_project_wrapper

signoff/caravel/lvs-signoff/noflatten

@@ -1,2 +0,0 @@
-sky130_fd_sc_hd__macro_sparecell
-mgmt_protect

signoff/caravel/lvs-signoff/spice_files

@@ -1,13 +1,12 @@
 #$::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice
 $::env(LVS_ROOT)/spice/sky130_fd_sc_hd.spice
-#$::env(WORK_ROOT)/spice/sky130_fd_sc_hd.spice
 $::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice
 #$::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
 $::env(LVS_ROOT)/spice/sky130_fd_sc_hvl.spice
 #$::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice
 #$::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice
 $::env(LVS_ROOT)/spice/sky130_fd_io.spice
-#$::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_io/spice/sky130_ef_io__analog_pad.spice
+$::env(PDK_ROOT)/sky130A/libs.ref/sky130_fd_io/spice/sky130_ef_io__analog_pad.spice
 $::env(LVS_ROOT)/spice/sky130_ef_io.spice
 #$::env(PDK_ROOT)/sky130A/libs.ref/sky130_sram_macros/spice/sky130_sram_1kbyte_1rw1r_32x256_8.spice
 #$::env(PDK_ROOT)/sky130A/libs.ref/sky130_sram_macros/spice/sky130_sram_2kbyte_1rw1r_32x512_8.spice

signoff/caravel/lvs-signoff/verilog_files

@@ -1,24 +1,26 @@
-/home/kanobailey/mpw-7/caravel_lvs/mcw_core_wrapper/verilog/gl/RAM128.v
-/home/kanobailey/mpw-7/caravel_lvs/mcw_core_wrapper/verilog/gl/RAM256.v
-/home/kanobailey/mpw-7/caravel_lvs/mcw_core_wrapper/verilog/gl/mgmt_core_wrapper.v
-/home/kanobailey/mpw-7/extra_be_checks/verilog/user_project_wrapper.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/buff_flash_clkrst.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/caravel_clocking.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/constant_block.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/chip_io.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/chip_io_alt.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/digital_pll.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/gpio_logic_high.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/gpio_control_block.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/gpio_defaults_block_0403.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/gpio_defaults_block_0801.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/gpio_defaults_block_1803.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/gpio_signal_buffering.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/housekeeping.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/mgmt_protect_hv.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/mprj2_logic_high.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/mprj_logic_high.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/mgmt_protect.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/spare_logic_block.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/user_id_programming.v
-/home/kanobailey/mpw-7/caravel_lvs/caravel/verilog/gl/xres_buf.v
+$::env(MCW_ROOT)/verilog/gl/RAM128.v
+$::env(MCW_ROOT)/verilog/gl/RAM256.v
+$::env(MCW_ROOT)/verilog/gl/mgmt_core_wrapper.v
+$::env(LVS_ROOT)/verilog/user_analog_project_wrapper.v
+$::env(LVS_ROOT)/verilog/user_project_wrapper.v
+$::env(CARAVEL_ROOT)/verilog/gl/buff_flash_clkrst.v
+$::env(CARAVEL_ROOT)/verilog/gl/caravel_clocking.v
+$::env(CARAVEL_ROOT)/verilog/gl/constant_block.v
+$::env(CARAVEL_ROOT)/verilog/gl/chip_io.v
+$::env(CARAVEL_ROOT)/verilog/gl/chip_io_alt.v
+$::env(CARAVEL_ROOT)/verilog/gl/digital_pll.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_logic_high.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_control_block.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_defaults_block_0403.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_defaults_block_0801.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_defaults_block_1803.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_signal_buffering.v
+$::env(CARAVEL_ROOT)/verilog/gl/gpio_signal_buffering_alt.v
+$::env(CARAVEL_ROOT)/verilog/gl/housekeeping.v
+$::env(CARAVEL_ROOT)/verilog/gl/mgmt_protect_hv.v
+$::env(CARAVEL_ROOT)/verilog/gl/mprj2_logic_high.v
+$::env(CARAVEL_ROOT)/verilog/gl/mprj_logic_high.v
+$::env(CARAVEL_ROOT)/verilog/gl/mgmt_protect.v
+$::env(CARAVEL_ROOT)/verilog/gl/spare_logic_block.v
+$::env(CARAVEL_ROOT)/verilog/gl/user_id_programming.v
+$::env(CARAVEL_ROOT)/verilog/gl/xres_buf.v