mirror of https://github.com/efabless/caravel.git
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
This commit is contained in:
manarabdelaty
parent
4c9f7630ff
commit
72b2c724c9
File diff suppressed because it is too large
Load Diff
11052
def/digital_pll.def
11052
def/digital_pll.def
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,195 @@
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VERSION 5.7 ;
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NOWIREEXTENSIONATPIN ON ;
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DIVIDERCHAR "/" ;
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BUSBITCHARS "[]" ;
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MACRO caravel_clocking
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CLASS BLOCK ;
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FOREIGN caravel_clocking ;
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ORIGIN 0.000 0.000 ;
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SIZE 80.000 BY 80.000 ;
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PIN VGND
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DIRECTION INPUT ;
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USE GROUND ;
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PORT
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LAYER met4 ;
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RECT 27.705 10.640 29.305 68.240 ;
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END
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PORT
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LAYER met4 ;
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RECT 50.690 10.640 52.290 68.240 ;
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END
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END VGND
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PIN VPWR
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DIRECTION INPUT ;
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USE POWER ;
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PORT
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LAYER met4 ;
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RECT 16.215 10.640 17.815 68.240 ;
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END
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PORT
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LAYER met4 ;
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RECT 39.200 10.640 40.800 68.240 ;
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END
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PORT
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LAYER met4 ;
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RECT 62.185 10.640 63.785 68.240 ;
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END
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END VPWR
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PIN core_clk
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DIRECTION OUTPUT TRISTATE ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 13.430 76.000 13.710 80.000 ;
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END
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END core_clk
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PIN ext_clk
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 59.890 0.000 60.170 4.000 ;
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END
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END ext_clk
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PIN ext_clk_sel
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 4.800 80.000 5.400 ;
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END
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END ext_clk_sel
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PIN ext_reset
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 74.840 80.000 75.440 ;
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END
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END ext_reset
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PIN pll_clk
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 0.000 19.760 4.000 20.360 ;
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END
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END pll_clk
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PIN pll_clk90
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 0.000 59.880 4.000 60.480 ;
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END
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END pll_clk90
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PIN resetb
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 19.870 0.000 20.150 4.000 ;
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END
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END resetb
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PIN resetb_sync
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DIRECTION OUTPUT TRISTATE ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 66.790 76.000 67.070 80.000 ;
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END
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END resetb_sync
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PIN sel2[0]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 44.920 80.000 45.520 ;
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END
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END sel2[0]
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PIN sel2[1]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 54.440 80.000 55.040 ;
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END
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END sel2[1]
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PIN sel2[2]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 64.640 80.000 65.240 ;
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END
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END sel2[2]
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PIN sel[0]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 14.320 80.000 14.920 ;
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END
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END sel[0]
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PIN sel[1]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 24.520 80.000 25.120 ;
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END
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END sel[1]
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PIN sel[2]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 76.000 34.720 80.000 35.320 ;
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END
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END sel[2]
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PIN user_clk
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DIRECTION OUTPUT TRISTATE ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 40.110 76.000 40.390 80.000 ;
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END
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END user_clk
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OBS
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LAYER li1 ;
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RECT 5.520 5.185 77.135 75.055 ;
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LAYER met1 ;
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RECT 5.520 5.140 77.195 75.100 ;
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LAYER met2 ;
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RECT 7.000 75.720 13.150 76.000 ;
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RECT 13.990 75.720 39.830 76.000 ;
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RECT 40.670 75.720 66.510 76.000 ;
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RECT 67.350 75.720 75.350 76.000 ;
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RECT 7.000 4.280 75.350 75.720 ;
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RECT 7.000 4.000 19.590 4.280 ;
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RECT 20.430 4.000 59.610 4.280 ;
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RECT 60.450 4.000 75.350 4.280 ;
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LAYER met3 ;
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RECT 4.000 74.440 75.600 75.305 ;
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RECT 4.000 65.640 76.000 74.440 ;
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RECT 4.000 64.240 75.600 65.640 ;
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RECT 4.000 60.880 76.000 64.240 ;
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RECT 4.400 59.480 76.000 60.880 ;
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RECT 4.000 55.440 76.000 59.480 ;
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RECT 4.000 54.040 75.600 55.440 ;
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RECT 4.000 45.920 76.000 54.040 ;
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RECT 4.000 44.520 75.600 45.920 ;
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RECT 4.000 35.720 76.000 44.520 ;
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RECT 4.000 34.320 75.600 35.720 ;
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RECT 4.000 25.520 76.000 34.320 ;
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RECT 4.000 24.120 75.600 25.520 ;
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RECT 4.000 20.760 76.000 24.120 ;
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RECT 4.400 19.360 76.000 20.760 ;
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RECT 4.000 15.320 76.000 19.360 ;
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RECT 4.000 13.920 75.600 15.320 ;
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RECT 4.000 5.800 76.000 13.920 ;
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RECT 4.000 4.935 75.600 5.800 ;
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END
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END caravel_clocking
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END LIBRARY
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@ -339,7 +339,7 @@ MACRO digital_pll
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LAYER li1 ;
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RECT 5.520 2.465 70.695 68.085 ;
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LAYER met1 ;
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RECT 4.670 2.420 71.230 68.240 ;
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RECT 3.750 2.420 71.230 68.240 ;
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LAYER met2 ;
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RECT 4.330 70.720 10.850 72.605 ;
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RECT 11.690 70.720 18.210 72.605 ;
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@ -350,8 +350,8 @@ MACRO digital_pll
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RECT 48.950 70.720 55.930 72.605 ;
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RECT 56.770 70.720 63.290 72.605 ;
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RECT 64.130 70.720 70.650 72.605 ;
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RECT 3.770 4.280 71.200 70.720 ;
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RECT 3.770 2.195 4.410 4.280 ;
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RECT 3.780 4.280 71.200 70.720 ;
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RECT 3.780 2.195 4.410 4.280 ;
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RECT 5.250 2.195 13.610 4.280 ;
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RECT 14.450 2.195 22.810 4.280 ;
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RECT 23.650 2.195 32.470 4.280 ;
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@ -361,45 +361,45 @@ MACRO digital_pll
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RECT 61.370 2.195 69.730 4.280 ;
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RECT 70.570 2.195 71.200 4.280 ;
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LAYER met3 ;
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RECT 3.745 71.720 70.600 72.585 ;
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RECT 3.745 69.040 71.000 71.720 ;
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RECT 3.745 67.640 70.600 69.040 ;
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RECT 3.745 64.280 71.000 67.640 ;
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RECT 3.745 62.880 70.600 64.280 ;
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RECT 3.745 60.200 71.000 62.880 ;
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RECT 3.745 58.800 70.600 60.200 ;
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RECT 3.745 56.800 71.000 58.800 ;
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RECT 4.000 71.720 70.600 72.585 ;
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RECT 4.000 69.040 71.000 71.720 ;
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RECT 4.000 67.640 70.600 69.040 ;
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RECT 4.000 64.280 71.000 67.640 ;
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RECT 4.000 62.880 70.600 64.280 ;
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RECT 4.000 60.200 71.000 62.880 ;
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RECT 4.000 58.800 70.600 60.200 ;
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RECT 4.000 56.800 71.000 58.800 ;
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RECT 4.400 55.440 71.000 56.800 ;
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RECT 4.400 55.400 70.600 55.440 ;
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RECT 3.745 54.040 70.600 55.400 ;
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RECT 3.745 51.360 71.000 54.040 ;
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RECT 3.745 49.960 70.600 51.360 ;
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RECT 3.745 46.600 71.000 49.960 ;
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RECT 3.745 45.200 70.600 46.600 ;
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RECT 3.745 42.520 71.000 45.200 ;
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RECT 3.745 41.120 70.600 42.520 ;
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RECT 3.745 37.760 71.000 41.120 ;
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RECT 3.745 36.360 70.600 37.760 ;
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RECT 3.745 33.680 71.000 36.360 ;
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RECT 3.745 32.280 70.600 33.680 ;
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RECT 3.745 28.920 71.000 32.280 ;
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RECT 3.745 27.520 70.600 28.920 ;
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RECT 3.745 24.840 71.000 27.520 ;
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RECT 3.745 23.440 70.600 24.840 ;
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RECT 3.745 20.080 71.000 23.440 ;
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RECT 3.745 19.400 70.600 20.080 ;
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RECT 4.000 54.040 70.600 55.400 ;
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RECT 4.000 51.360 71.000 54.040 ;
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RECT 4.000 49.960 70.600 51.360 ;
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RECT 4.000 46.600 71.000 49.960 ;
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RECT 4.000 45.200 70.600 46.600 ;
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RECT 4.000 42.520 71.000 45.200 ;
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RECT 4.000 41.120 70.600 42.520 ;
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RECT 4.000 37.760 71.000 41.120 ;
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RECT 4.000 36.360 70.600 37.760 ;
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RECT 4.000 33.680 71.000 36.360 ;
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RECT 4.000 32.280 70.600 33.680 ;
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RECT 4.000 28.920 71.000 32.280 ;
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RECT 4.000 27.520 70.600 28.920 ;
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RECT 4.000 24.840 71.000 27.520 ;
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RECT 4.000 23.440 70.600 24.840 ;
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RECT 4.000 20.080 71.000 23.440 ;
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RECT 4.000 19.400 70.600 20.080 ;
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RECT 4.400 18.680 70.600 19.400 ;
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RECT 4.400 18.000 71.000 18.680 ;
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RECT 3.745 16.000 71.000 18.000 ;
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RECT 3.745 14.600 70.600 16.000 ;
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RECT 3.745 11.240 71.000 14.600 ;
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RECT 3.745 9.840 70.600 11.240 ;
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RECT 3.745 7.160 71.000 9.840 ;
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RECT 3.745 5.760 70.600 7.160 ;
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RECT 3.745 3.080 71.000 5.760 ;
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RECT 3.745 2.215 70.600 3.080 ;
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RECT 4.000 16.000 71.000 18.000 ;
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RECT 4.000 14.600 70.600 16.000 ;
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RECT 4.000 11.240 71.000 14.600 ;
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RECT 4.000 9.840 70.600 11.240 ;
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RECT 4.000 7.160 71.000 9.840 ;
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RECT 4.000 5.760 70.600 7.160 ;
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RECT 4.000 3.080 71.000 5.760 ;
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RECT 4.000 2.215 70.600 3.080 ;
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LAYER met4 ;
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RECT 45.375 21.255 49.385 30.425 ;
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RECT 46.295 15.815 46.625 29.745 ;
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END
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END digital_pll
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END LIBRARY
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File diff suppressed because it is too large
Load Diff
34269
mag/digital_pll.mag
34269
mag/digital_pll.mag
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,110 @@
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magic
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tech sky130A
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magscale 1 2
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timestamp 1636983108
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<< obsli1 >>
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rect 1104 1037 15427 15011
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<< obsm1 >>
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rect 1104 1028 15439 15020
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<< metal2 >>
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rect 2686 15200 2742 16000
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rect 8022 15200 8078 16000
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rect 13358 15200 13414 16000
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rect 3974 0 4030 800
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rect 11978 0 12034 800
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<< obsm2 >>
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rect 1400 15144 2630 15200
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rect 2798 15144 7966 15200
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rect 8134 15144 13302 15200
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rect 13470 15144 15070 15200
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rect 1400 856 15070 15144
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rect 1400 800 3918 856
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rect 4086 800 11922 856
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rect 12090 800 15070 856
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<< metal3 >>
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rect 15200 14968 16000 15088
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rect 15200 12928 16000 13048
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rect 0 11976 800 12096
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rect 15200 10888 16000 11008
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rect 15200 8984 16000 9104
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rect 15200 6944 16000 7064
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rect 15200 4904 16000 5024
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rect 0 3952 800 4072
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rect 15200 2864 16000 2984
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rect 15200 960 16000 1080
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<< obsm3 >>
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rect 800 14888 15120 15061
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rect 800 13128 15200 14888
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rect 800 12848 15120 13128
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rect 800 12176 15200 12848
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rect 880 11896 15200 12176
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rect 800 11088 15200 11896
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rect 800 10808 15120 11088
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rect 800 9184 15200 10808
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rect 800 8904 15120 9184
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rect 800 7144 15200 8904
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rect 800 6864 15120 7144
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rect 800 5104 15200 6864
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rect 800 4824 15120 5104
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rect 800 4152 15200 4824
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rect 880 3872 15200 4152
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rect 800 3064 15200 3872
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rect 800 2784 15120 3064
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rect 800 1160 15200 2784
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rect 800 987 15120 1160
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<< metal4 >>
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rect 3243 2128 3563 13648
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rect 5541 2128 5861 13648
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rect 7840 2128 8160 13648
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rect 10138 2128 10458 13648
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rect 12437 2128 12757 13648
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<< labels >>
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rlabel metal4 s 5541 2128 5861 13648 6 VGND
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port 1 nsew ground input
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rlabel metal4 s 10138 2128 10458 13648 6 VGND
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port 1 nsew ground input
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rlabel metal4 s 3243 2128 3563 13648 6 VPWR
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port 2 nsew power input
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rlabel metal4 s 7840 2128 8160 13648 6 VPWR
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port 2 nsew power input
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rlabel metal4 s 12437 2128 12757 13648 6 VPWR
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port 2 nsew power input
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rlabel metal2 s 2686 15200 2742 16000 6 core_clk
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port 3 nsew signal output
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rlabel metal2 s 11978 0 12034 800 6 ext_clk
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port 4 nsew signal input
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rlabel metal3 s 15200 960 16000 1080 6 ext_clk_sel
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port 5 nsew signal input
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rlabel metal3 s 15200 14968 16000 15088 6 ext_reset
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port 6 nsew signal input
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rlabel metal3 s 0 3952 800 4072 6 pll_clk
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port 7 nsew signal input
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rlabel metal3 s 0 11976 800 12096 6 pll_clk90
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port 8 nsew signal input
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rlabel metal2 s 3974 0 4030 800 6 resetb
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port 9 nsew signal input
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rlabel metal2 s 13358 15200 13414 16000 6 resetb_sync
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port 10 nsew signal output
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rlabel metal3 s 15200 8984 16000 9104 6 sel2[0]
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port 11 nsew signal input
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rlabel metal3 s 15200 10888 16000 11008 6 sel2[1]
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port 12 nsew signal input
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rlabel metal3 s 15200 12928 16000 13048 6 sel2[2]
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port 13 nsew signal input
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||||
rlabel metal3 s 15200 2864 16000 2984 6 sel[0]
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port 14 nsew signal input
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||||
rlabel metal3 s 15200 4904 16000 5024 6 sel[1]
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||||
port 15 nsew signal input
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||||
rlabel metal3 s 15200 6944 16000 7064 6 sel[2]
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port 16 nsew signal input
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||||
rlabel metal2 s 8022 15200 8078 16000 6 user_clk
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port 17 nsew signal output
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<< properties >>
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string LEFclass BLOCK
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string FIXED_BBOX 0 0 16000 16000
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string LEFview TRUE
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string GDS_FILE /project/openlane/caravel_clocking/runs/caravel_clocking/results/magic/caravel_clocking.gds
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string GDS_END 1061116
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string GDS_START 351586
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<< end >>
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@ -1,11 +1,11 @@
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magic
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tech sky130A
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magscale 1 2
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timestamp 1636370565
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timestamp 1636983913
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||||
<< obsli1 >>
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||||
rect 1104 493 14139 13617
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<< obsm1 >>
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||||
rect 934 484 14246 13648
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||||
rect 750 484 14246 13648
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<< metal2 >>
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rect 754 14200 810 15000
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rect 2226 14200 2282 15000
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@ -35,8 +35,8 @@ rect 8318 14144 9622 14521
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rect 9790 14144 11186 14521
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rect 11354 14144 12658 14521
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rect 12826 14144 14130 14521
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rect 754 856 14240 14144
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||||
rect 754 439 882 856
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rect 756 856 14240 14144
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rect 756 439 882 856
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||||
rect 1050 439 2722 856
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||||
rect 2890 439 4562 856
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rect 4730 439 6494 856
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||||
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@ -66,49 +66,49 @@ rect 14200 2048 15000 2168
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|||
rect 14200 1232 15000 1352
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rect 14200 416 15000 536
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||||
<< obsm3 >>
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||||
rect 749 14344 14120 14517
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||||
rect 749 13808 14200 14344
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||||
rect 749 13528 14120 13808
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||||
rect 749 12856 14200 13528
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||||
rect 749 12576 14120 12856
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rect 749 12040 14200 12576
|
||||
rect 749 11760 14120 12040
|
||||
rect 749 11360 14200 11760
|
||||
rect 800 14344 14120 14517
|
||||
rect 800 13808 14200 14344
|
||||
rect 800 13528 14120 13808
|
||||
rect 800 12856 14200 13528
|
||||
rect 800 12576 14120 12856
|
||||
rect 800 12040 14200 12576
|
||||
rect 800 11760 14120 12040
|
||||
rect 800 11360 14200 11760
|
||||
rect 880 11088 14200 11360
|
||||
rect 880 11080 14120 11088
|
||||
rect 749 10808 14120 11080
|
||||
rect 749 10272 14200 10808
|
||||
rect 749 9992 14120 10272
|
||||
rect 749 9320 14200 9992
|
||||
rect 749 9040 14120 9320
|
||||
rect 749 8504 14200 9040
|
||||
rect 749 8224 14120 8504
|
||||
rect 749 7552 14200 8224
|
||||
rect 749 7272 14120 7552
|
||||
rect 749 6736 14200 7272
|
||||
rect 749 6456 14120 6736
|
||||
rect 749 5784 14200 6456
|
||||
rect 749 5504 14120 5784
|
||||
rect 749 4968 14200 5504
|
||||
rect 749 4688 14120 4968
|
||||
rect 749 4016 14200 4688
|
||||
rect 749 3880 14120 4016
|
||||
rect 800 10808 14120 11080
|
||||
rect 800 10272 14200 10808
|
||||
rect 800 9992 14120 10272
|
||||
rect 800 9320 14200 9992
|
||||
rect 800 9040 14120 9320
|
||||
rect 800 8504 14200 9040
|
||||
rect 800 8224 14120 8504
|
||||
rect 800 7552 14200 8224
|
||||
rect 800 7272 14120 7552
|
||||
rect 800 6736 14200 7272
|
||||
rect 800 6456 14120 6736
|
||||
rect 800 5784 14200 6456
|
||||
rect 800 5504 14120 5784
|
||||
rect 800 4968 14200 5504
|
||||
rect 800 4688 14120 4968
|
||||
rect 800 4016 14200 4688
|
||||
rect 800 3880 14120 4016
|
||||
rect 880 3736 14120 3880
|
||||
rect 880 3600 14200 3736
|
||||
rect 749 3200 14200 3600
|
||||
rect 749 2920 14120 3200
|
||||
rect 749 2248 14200 2920
|
||||
rect 749 1968 14120 2248
|
||||
rect 749 1432 14200 1968
|
||||
rect 749 1152 14120 1432
|
||||
rect 749 616 14200 1152
|
||||
rect 749 443 14120 616
|
||||
rect 800 3200 14200 3600
|
||||
rect 800 2920 14120 3200
|
||||
rect 800 2248 14200 2920
|
||||
rect 800 1968 14120 2248
|
||||
rect 800 1432 14200 1968
|
||||
rect 800 1152 14120 1432
|
||||
rect 800 616 14200 1152
|
||||
rect 800 443 14120 616
|
||||
<< metal4 >>
|
||||
rect 4208 1040 4528 13648
|
||||
rect 8208 1040 8528 13648
|
||||
rect 12208 1040 12528 13648
|
||||
<< obsm4 >>
|
||||
rect 9075 4251 9877 6085
|
||||
rect 9259 3163 9325 5949
|
||||
<< metal5 >>
|
||||
rect 1104 12210 13892 12530
|
||||
rect 1104 8210 13892 8530
|
||||
|
|
@ -205,7 +205,7 @@ string LEFclass BLOCK
|
|||
string FIXED_BBOX 0 0 15000 15000
|
||||
string LEFview TRUE
|
||||
string GDS_FILE /project/openlane/digital_pll/runs/digital_pll/results/magic/digital_pll.gds
|
||||
string GDS_END 1101688
|
||||
string GDS_START 333802
|
||||
string GDS_END 1103818
|
||||
string GDS_START 342938
|
||||
<< end >>
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
*/runs
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
# SPDX-FileCopyrightText: 2020 Efabless Corporation
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
BLOCKS = $(shell find * -maxdepth 0 -type d)
|
||||
CONFIG = $(foreach block,$(BLOCKS), ./$(block)/config.tcl)
|
||||
CLEAN = $(foreach block,$(BLOCKS), clean-$(block))
|
||||
|
||||
OPENLANE_TAG ?= v0.20
|
||||
OPENLANE_IMAGE_NAME ?= efabless/openlane:$(OPENLANE_TAG)
|
||||
OPENLANE_BASIC_COMMAND = "cd /project/openlane && flow.tcl -design ./$* -save_path .. -save -tag $* -overwrite"
|
||||
OPENLANE_INTERACTIVE_COMMAND = "cd /project/openlane && flow.tcl -it -file ./$*/interactive.tcl"
|
||||
|
||||
all: $(BLOCKS)
|
||||
|
||||
$(CONFIG) :
|
||||
@echo "Missing $@. Please create a configuration for that design"
|
||||
@exit 1
|
||||
|
||||
$(BLOCKS) : % : ./%/config.tcl FORCE
|
||||
ifeq ($(OPENLANE_ROOT),)
|
||||
@echo "Please export OPENLANE_ROOT"
|
||||
@exit 1
|
||||
endif
|
||||
ifeq ($(PDK_ROOT),)
|
||||
@echo "Please export PDK_ROOT"
|
||||
@exit 1
|
||||
endif
|
||||
@echo "###############################################"
|
||||
@sleep 1
|
||||
|
||||
@if [ -f ./$*/interactive.tcl ]; then\
|
||||
docker run -it -v $(OPENLANE_ROOT):/openLane \
|
||||
-v $(PDK_ROOT):$(PDK_ROOT) \
|
||||
-v $(PWD)/..:/project \
|
||||
-v $(CARAVEL_ROOT):$(CARAVEL_ROOT) \
|
||||
-e PDK_ROOT=$(PDK_ROOT) \
|
||||
-e CARAVEL_ROOT=$(CARAVEL_ROOT) \
|
||||
-u $(shell id -u $(USER)):$(shell id -g $(USER)) \
|
||||
$(OPENLANE_IMAGE_NAME) sh -c $(OPENLANE_INTERACTIVE_COMMAND);\
|
||||
else\
|
||||
docker run -it -v $(OPENLANE_ROOT):/openlane \
|
||||
-v $(PDK_ROOT):$(PDK_ROOT) \
|
||||
-v $(PWD)/..:/project \
|
||||
-v $(CARAVEL_ROOT):$(CARAVEL_ROOT) \
|
||||
-e PDK_ROOT=$(PDK_ROOT) \
|
||||
-e CARAVEL_ROOT=$(CARAVEL_ROOT) \
|
||||
-u $(shell id -u $(USER)):$(shell id -g $(USER)) \
|
||||
$(OPENLANE_IMAGE_NAME) sh -c $(OPENLANE_BASIC_COMMAND);\
|
||||
fi
|
||||
mkdir -p ../signoff/$*/
|
||||
cp $*/runs/$*/OPENLANE_VERSION ../signoff/$*/
|
||||
cp $*/runs/$*/PDK_SOURCES ../signoff/$*/
|
||||
cp $*/runs/$*/reports/final_summary_report.csv ../signoff/$*/
|
||||
|
||||
.PHONY: openlane
|
||||
openlane:
|
||||
ifeq ($(OPENLANE_ROOT),)
|
||||
@echo "Please export OPENLANE_ROOT"
|
||||
@exit 1
|
||||
endif
|
||||
git clone https://github.com/The-OpenROAD-Project/OpenLane --branch=$(OPENLANE_TAG) --depth=1 $(OPENLANE_ROOT) && \
|
||||
cd $(OPENLANE_ROOT) && \
|
||||
export IMAGE_NAME=efabless/openlane:$(OPENLANE_TAG) && \
|
||||
make openlane
|
||||
|
||||
FORCE:
|
||||
|
||||
clean:
|
||||
@echo "Use clean_all to clean everything :)"
|
||||
|
||||
clean_all: $(CLEAN)
|
||||
|
||||
$(CLEAN): clean-% :
|
||||
rm -rf runs/$*
|
||||
rm -rf ../gds/$**
|
||||
rm -rf ../mag/$**
|
||||
rm -rf ../lef/$**
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
# input clock pins
|
||||
create_clock [get_ports {"ext_clk"} ] -name "ext_clk" -period 25
|
||||
create_clock [get_ports {"pll_clk"} ] -name "pll_clk" -period 6.6666666666667
|
||||
create_clock [get_ports {"pll_clk90"} ] -name "pll_clk90" -period 6.6666666666667
|
||||
|
||||
# divided PLL clocks
|
||||
create_generated_clock -name pll_clk_divided -source [get_ports pll_clk] -divide_by 2 [get_pins _351_/Y]
|
||||
create_generated_clock -name pll_clk90_divided -source [get_ports pll_clk90] -divide_by 2 [get_pins _354_/Y]
|
||||
|
||||
# output clock pins, mux selected
|
||||
create_generated_clock -name core_ext_clk -source [get_ports ext_clk] -divide_by 1 [get_pins _412_/X]
|
||||
create_generated_clock -name core_ext_clk_pll -source [get_ports pll_clk] -divide_by 1 [get_pins _412_/X]
|
||||
|
||||
create_generated_clock -name core_clk -source [get_pins _412_/X] -divide_by 1 [get_pins _393_/X]
|
||||
create_generated_clock -name core_clk_pll -source [get_pins _351_/Y] -divide_by 1 [get_pins _393_/X]
|
||||
|
||||
create_generated_clock -name user_clk -source [get_pins _412_/X] -divide_by 1 [get_pins _394_/X]
|
||||
create_generated_clock -name user_clk_pll -source [get_pins _354_/Y] -divide_by 1 [get_pins _394_/X]
|
||||
|
||||
# logically exclusive clocks, the generated pll clocks and the ext core clk
|
||||
set_clock_groups -logically_exclusive -group core_ext_clk -group core_ext_clk_pll
|
||||
set_clock_groups -logically_exclusive -group core_clk -group core_clk_pll
|
||||
set_clock_groups -logically_exclusive -group user_clk -group user_clk_pll
|
||||
|
||||
set ext_clk_input_delay_value [expr 25 * $::env(IO_PCT)]
|
||||
set ext_clk_output_delay_value [expr 25 * $::env(IO_PCT)]
|
||||
set pll_clk_input_delay_value [expr 6.6666666666667 * $::env(IO_PCT)]
|
||||
set pll_clk_output_delay_value [expr 6.6666666666667 * $::env(IO_PCT)]
|
||||
puts "\[INFO\]: Setting output delay to: $ext_clk_output_delay_value"
|
||||
puts "\[INFO\]: Setting input delay to: $ext_clk_input_delay_value"
|
||||
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {ext_clk_sel}]
|
||||
|
||||
#set_input_delay $input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {resetb}]
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {sel2[0]}]
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {sel2[1]}]
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {sel2[2]}]
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {sel[0]}]
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {sel[1]}]
|
||||
set_input_delay $ext_clk_input_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {sel[2]}]
|
||||
#set_output_delay $output_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {core_clk}]
|
||||
set_output_delay $ext_clk_output_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {resetb_sync}]
|
||||
#set_output_delay $output_delay_value -clock [get_clocks {ext_clk}] -add_delay [get_ports {user_clk}]
|
||||
|
||||
set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
|
||||
|
||||
# TODO set this as parameter
|
||||
set_driving_cell -lib_cell $::env(SYNTH_DRIVING_CELL) -pin $::env(SYNTH_DRIVING_CELL_PIN) [all_inputs]
|
||||
set cap_load [expr $::env(SYNTH_CAP_LOAD) / 1000.0]
|
||||
puts "\[INFO\]: Setting load to: $cap_load"
|
||||
set_load $cap_load [all_outputs]
|
||||
|
||||
puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 10}] %"
|
||||
set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}]
|
||||
set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}]
|
||||
|
||||
puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINITY)"
|
||||
set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {ext_clk}]
|
||||
set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {pll_clk}]
|
||||
set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {pll_clk90}]
|
||||
set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {core_clk}]
|
||||
|
||||
puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)"
|
||||
set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {ext_clk}]
|
||||
set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {pll_clk}]
|
||||
set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {pll_clk90}]
|
||||
set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {core_clk}]
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
# SPDX-FileCopyrightText: 2020 Efabless Corporation
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
set script_dir [file dirname [file normalize [info script]]]
|
||||
|
||||
set ::env(DESIGN_NAME) caravel_clocking
|
||||
set ::env(DESIGN_IS_CORE) 0
|
||||
|
||||
set ::env(VERILOG_FILES) "\
|
||||
$script_dir/../../verilog/rtl/defines.v\
|
||||
$script_dir/../../verilog/rtl/clock_div.v\
|
||||
$script_dir/../../verilog/rtl/caravel_clocking.v"
|
||||
|
||||
set ::env(CLOCK_PORT) "ext_clk"
|
||||
set ::env(CLOCK_NET) "ext_clk core_clk pll_clk pll_clk90"
|
||||
|
||||
set ::env(ROUTING_CORES) "6"
|
||||
set ::env(RUN_KLAYOUT) 0
|
||||
|
||||
## Synthesis
|
||||
set ::env(SYNTH_STRATEGY) "DELAY 0"
|
||||
set ::env(CLOCK_TREE_SYNTH) 1
|
||||
|
||||
set ::env(BASE_SDC_FILE) $script_dir/base.sdc
|
||||
|
||||
set ::env(NO_SYNTH_CELL_LIST) $script_dir/no_synth.list
|
||||
|
||||
## Floorplan
|
||||
set ::env(FP_SIZING) absolute
|
||||
set ::env(DIE_AREA) "0 0 80 80"
|
||||
|
||||
set ::env(FP_PIN_ORDER_CFG) $::env(DESIGN_DIR)/pin_order.cfg
|
||||
|
||||
set ::env(CELL_PAD) 0
|
||||
|
||||
## Placement
|
||||
set ::env(PL_TARGET_DENSITY) 0.94
|
||||
|
||||
set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) 1
|
||||
set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) 1
|
||||
|
||||
## Routing
|
||||
set ::env(GLB_RT_ADJUSTMENT) 0
|
||||
set ::env(GLB_RT_MAXLAYER) 5
|
||||
|
||||
set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 1
|
||||
|
||||
## Diode Insertion
|
||||
set ::env(DIODE_INSERTION_STRATEGY) 4
|
||||
|
||||
##
|
||||
set ::env(QUIT_ON_TIMING_VIOLATIONS) 0
|
||||
|
|
@ -0,0 +1,197 @@
|
|||
sky130_fd_sc_hd__clkbuf_1
|
||||
sky130_fd_sc_hd__clkbuf_16
|
||||
sky130_fd_sc_hd__clkbuf_2
|
||||
sky130_fd_sc_hd__clkbuf_4
|
||||
sky130_fd_sc_hd__clkbuf_8
|
||||
sky130_fd_sc_hd__clkdlybuf4s15_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s15_2
|
||||
sky130_fd_sc_hd__clkdlybuf4s18_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s18_2
|
||||
sky130_fd_sc_hd__clkdlybuf4s25_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s25_2
|
||||
sky130_fd_sc_hd__clkdlybuf4s50_1
|
||||
sky130_fd_sc_hd__clkdlybuf4s50_2
|
||||
sky130_fd_sc_hd__clkinv_1
|
||||
sky130_fd_sc_hd__clkinv_16
|
||||
sky130_fd_sc_hd__clkinv_2
|
||||
sky130_fd_sc_hd__clkinv_4
|
||||
sky130_fd_sc_hd__clkinv_8
|
||||
sky130_fd_sc_hd__clkinvlp_2
|
||||
sky130_fd_sc_hd__clkinvlp_4
|
||||
sky130_fd_sc_hd__decap_12
|
||||
sky130_fd_sc_hd__decap_3
|
||||
sky130_fd_sc_hd__decap_4
|
||||
sky130_fd_sc_hd__decap_6
|
||||
sky130_fd_sc_hd__decap_8
|
||||
sky130_fd_sc_hd__diode_2
|
||||
sky130_fd_sc_hd__dlclkp_1
|
||||
sky130_fd_sc_hd__dlclkp_2
|
||||
sky130_fd_sc_hd__dlclkp_4
|
||||
sky130_fd_sc_hd__dlrbn_1
|
||||
sky130_fd_sc_hd__dlrbn_2
|
||||
sky130_fd_sc_hd__dlrbp_1
|
||||
sky130_fd_sc_hd__dlrbp_2
|
||||
sky130_fd_sc_hd__dlrtn_1
|
||||
sky130_fd_sc_hd__dlrtn_2
|
||||
sky130_fd_sc_hd__dlrtn_4
|
||||
sky130_fd_sc_hd__dlrtp_1
|
||||
sky130_fd_sc_hd__dlrtp_2
|
||||
sky130_fd_sc_hd__dlrtp_4
|
||||
sky130_fd_sc_hd__dlxbn_1
|
||||
sky130_fd_sc_hd__dlxbn_2
|
||||
sky130_fd_sc_hd__dlxbp_1
|
||||
sky130_fd_sc_hd__dlygate4sd1_1
|
||||
sky130_fd_sc_hd__dlygate4sd2_1
|
||||
sky130_fd_sc_hd__dlygate4sd3_1
|
||||
sky130_fd_sc_hd__dlymetal6s2s_1
|
||||
sky130_fd_sc_hd__dlymetal6s4s_1
|
||||
sky130_fd_sc_hd__dlymetal6s6s_1
|
||||
sky130_fd_sc_hd__edfxbp_1
|
||||
sky130_fd_sc_hd__edfxtp_1
|
||||
sky130_fd_sc_hd__einvn_0
|
||||
sky130_fd_sc_hd__einvn_1
|
||||
sky130_fd_sc_hd__einvn_2
|
||||
sky130_fd_sc_hd__einvn_4
|
||||
sky130_fd_sc_hd__einvn_8
|
||||
sky130_fd_sc_hd__einvp_1
|
||||
sky130_fd_sc_hd__einvp_2
|
||||
sky130_fd_sc_hd__einvp_4
|
||||
sky130_fd_sc_hd__einvp_8
|
||||
sky130_fd_sc_hd__fah_1
|
||||
sky130_fd_sc_hd__fahcin_1
|
||||
sky130_fd_sc_hd__fahcon_1
|
||||
sky130_fd_sc_hd__ha_1
|
||||
sky130_fd_sc_hd__ha_2
|
||||
sky130_fd_sc_hd__ha_4
|
||||
sky130_fd_sc_hd__macro_sparecell
|
||||
sky130_fd_sc_hd__maj3_1
|
||||
sky130_fd_sc_hd__maj3_2
|
||||
sky130_fd_sc_hd__maj3_4
|
||||
sky130_fd_sc_hd__mux2i_1
|
||||
sky130_fd_sc_hd__mux2i_2
|
||||
sky130_fd_sc_hd__mux2i_4
|
||||
sky130_fd_sc_hd__sdfbbn_1
|
||||
sky130_fd_sc_hd__sdfbbn_2
|
||||
sky130_fd_sc_hd__sdfbbp_1
|
||||
sky130_fd_sc_hd__sdfrbp_1
|
||||
sky130_fd_sc_hd__sdfrbp_2
|
||||
sky130_fd_sc_hd__sdfrtn_1
|
||||
sky130_fd_sc_hd__sdfrtp_1
|
||||
sky130_fd_sc_hd__sdfrtp_2
|
||||
sky130_fd_sc_hd__sdfrtp_4
|
||||
sky130_fd_sc_hd__sdfsbp_1
|
||||
sky130_fd_sc_hd__sdfsbp_2
|
||||
sky130_fd_sc_hd__sdfstp_1
|
||||
sky130_fd_sc_hd__sdfstp_2
|
||||
sky130_fd_sc_hd__sdfstp_4
|
||||
sky130_fd_sc_hd__sdfxbp_1
|
||||
sky130_fd_sc_hd__sdfxbp_2
|
||||
sky130_fd_sc_hd__sdfxtp_1
|
||||
sky130_fd_sc_hd__sdfxtp_2
|
||||
sky130_fd_sc_hd__sdfxtp_4
|
||||
sky130_fd_sc_hd__sdlclkp_1
|
||||
sky130_fd_sc_hd__sdlclkp_2
|
||||
sky130_fd_sc_hd__sdlclkp_4
|
||||
sky130_fd_sc_hd__sedfxbp_1
|
||||
sky130_fd_sc_hd__sedfxbp_2
|
||||
sky130_fd_sc_hd__sedfxtp_1
|
||||
sky130_fd_sc_hd__sedfxtp_2
|
||||
sky130_fd_sc_hd__sedfxtp_4
|
||||
sky130_fd_sc_hd__a2111oi_1
|
||||
sky130_fd_sc_hd__a211o_1
|
||||
sky130_fd_sc_hd__a211oi_1
|
||||
sky130_fd_sc_hd__a2111o_1
|
||||
sky130_fd_sc_hd__a21bo_1
|
||||
sky130_fd_sc_hd__a21boi_1
|
||||
sky130_fd_sc_hd__a21o_1
|
||||
sky130_fd_sc_hd__a21oi_1
|
||||
sky130_fd_sc_hd__a221o_1
|
||||
sky130_fd_sc_hd__a221oi_1
|
||||
sky130_fd_sc_hd__a222oi_1
|
||||
sky130_fd_sc_hd__a22o_1
|
||||
sky130_fd_sc_hd__a22oi_1
|
||||
sky130_fd_sc_hd__a2bb2o_1
|
||||
sky130_fd_sc_hd__a2bb2oi_1
|
||||
sky130_fd_sc_hd__a311o_1
|
||||
sky130_fd_sc_hd__a311oi_1
|
||||
sky130_fd_sc_hd__a2111o_1
|
||||
sky130_fd_sc_hd__a21bo_1
|
||||
sky130_fd_sc_hd__a21boi_1
|
||||
sky130_fd_sc_hd__a21o_1
|
||||
sky130_fd_sc_hd__a21oi_1
|
||||
sky130_fd_sc_hd__a221o_1
|
||||
sky130_fd_sc_hd__a221oi_1
|
||||
sky130_fd_sc_hd__a222oi_1
|
||||
sky130_fd_sc_hd__a22o_1
|
||||
sky130_fd_sc_hd__a22oi_1
|
||||
sky130_fd_sc_hd__a2bb2o_1
|
||||
sky130_fd_sc_hd__a2bb2oi_1
|
||||
sky130_fd_sc_hd__a311o_1
|
||||
sky130_fd_sc_hd__a311oi_1
|
||||
sky130_fd_sc_hd__a31o_1
|
||||
sky130_fd_sc_hd__a31oi_1
|
||||
sky130_fd_sc_hd__a32o_1
|
||||
sky130_fd_sc_hd__a32oi_1
|
||||
sky130_fd_sc_hd__a41o_1
|
||||
sky130_fd_sc_hd__a41oi_1
|
||||
sky130_fd_sc_hd__and2_1
|
||||
sky130_fd_sc_hd__and2b_1
|
||||
sky130_fd_sc_hd__and3_1
|
||||
sky130_fd_sc_hd__and3b_1
|
||||
sky130_fd_sc_hd__and4_1
|
||||
sky130_fd_sc_hd__and4b_1
|
||||
sky130_fd_sc_hd__and4bb_1
|
||||
sky130_fd_sc_hd__dfbbp_1
|
||||
sky130_fd_sc_hd__dfrbp_1
|
||||
sky130_fd_sc_hd__dfrtp_1
|
||||
sky130_fd_sc_hd__dfsbp_1
|
||||
sky130_fd_sc_hd__dfstp_1
|
||||
sky130_fd_sc_hd__dfxbp_1
|
||||
sky130_fd_sc_hd__dfxtp_1
|
||||
sky130_fd_sc_hd__ebufn_1
|
||||
sky130_fd_sc_hd__inv_1
|
||||
sky130_fd_sc_hd__nand2_1
|
||||
sky130_fd_sc_hd__nand2b_1
|
||||
sky130_fd_sc_hd__nand3_1
|
||||
sky130_fd_sc_hd__nand3b_1
|
||||
sky130_fd_sc_hd__nand4_1
|
||||
sky130_fd_sc_hd__nand4b_1
|
||||
sky130_fd_sc_hd__nand4bb_1
|
||||
sky130_fd_sc_hd__nor2_1
|
||||
sky130_fd_sc_hd__nor2b_1
|
||||
sky130_fd_sc_hd__nor3_1
|
||||
sky130_fd_sc_hd__nor3b_1
|
||||
sky130_fd_sc_hd__nor4_1
|
||||
sky130_fd_sc_hd__nor4b_1
|
||||
sky130_fd_sc_hd__nor4bb_1
|
||||
sky130_fd_sc_hd__o2111a_1
|
||||
sky130_fd_sc_hd__o2111ai_1
|
||||
sky130_fd_sc_hd__o211a_1
|
||||
sky130_fd_sc_hd__o211ai_1
|
||||
sky130_fd_sc_hd__o21a_1
|
||||
sky130_fd_sc_hd__o21ai_1
|
||||
sky130_fd_sc_hd__o21ba_1
|
||||
sky130_fd_sc_hd__o21bai_1
|
||||
sky130_fd_sc_hd__o221a_1
|
||||
sky130_fd_sc_hd__o221ai_1
|
||||
sky130_fd_sc_hd__o22a_1
|
||||
sky130_fd_sc_hd__o22ai_1
|
||||
sky130_fd_sc_hd__o2bb2a_1
|
||||
sky130_fd_sc_hd__o2bb2ai_1
|
||||
sky130_fd_sc_hd__o311a_1
|
||||
sky130_fd_sc_hd__o311ai_1
|
||||
sky130_fd_sc_hd__o31a_1
|
||||
sky130_fd_sc_hd__o31ai_1
|
||||
sky130_fd_sc_hd__o32a_1
|
||||
sky130_fd_sc_hd__o32ai_1
|
||||
sky130_fd_sc_hd__o41a_1
|
||||
sky130_fd_sc_hd__o41ai_1
|
||||
sky130_fd_sc_hd__or2_1
|
||||
sky130_fd_sc_hd__or2b_1
|
||||
sky130_fd_sc_hd__or3_1
|
||||
sky130_fd_sc_hd__or3b_1
|
||||
sky130_fd_sc_hd__or4_1
|
||||
sky130_fd_sc_hd__or4b_1
|
||||
sky130_fd_sc_hd__or4bb_1
|
||||
sky130_fd_sc_hd__xnor2_1
|
||||
sky130_fd_sc_hd__xor2_1
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#S
|
||||
resetb
|
||||
ext_clk
|
||||
|
||||
#E
|
||||
ext_clk_sel
|
||||
sel.*
|
||||
ext_reset
|
||||
|
||||
#W
|
||||
pll_clk
|
||||
pll_clk90
|
||||
|
||||
#N
|
||||
core_clk
|
||||
user_clk
|
||||
resetb_sync
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
create_clock [get_pins {"ringosc.ibufp01/Y"} ] -name "pll_control_clock" -period 6.6666666666667
|
||||
|
||||
set_propagated_clock [get_clocks {pll_control_clock}]
|
||||
|
||||
set input_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
|
||||
set output_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
|
||||
puts "\[INFO\]: Setting output delay to: $output_delay_value"
|
||||
puts "\[INFO\]: Setting input delay to: $input_delay_value"
|
||||
|
||||
set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
|
||||
set_input_delay $input_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_inputs]
|
||||
set_output_delay $output_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_outputs]
|
||||
|
||||
# TODO set this as parameter
|
||||
set_driving_cell -lib_cell $::env(SYNTH_DRIVING_CELL) -pin $::env(SYNTH_DRIVING_CELL_PIN) [all_inputs]
|
||||
set cap_load [expr $::env(SYNTH_CAP_LOAD) / 1000.0]
|
||||
puts "\[INFO\]: Setting load to: $cap_load"
|
||||
set_load $cap_load [all_outputs]
|
||||
|
||||
puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 10}] %"
|
||||
set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}]
|
||||
set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}]
|
||||
|
||||
puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINITY)"
|
||||
set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {pll_control_clock}]
|
||||
|
||||
puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)"
|
||||
set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {pll_control_clock}]
|
||||
|
|
@ -29,6 +29,8 @@ set ::env(SYNTH_MAX_FANOUT) 6
|
|||
set ::env(SYNTH_BUFFERING) 0
|
||||
set ::env(SYNTH_SIZING) 0
|
||||
|
||||
set ::env(BASE_SDC_FILE) $script_dir/base.sdc
|
||||
|
||||
## Floorplan
|
||||
set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg
|
||||
|
||||
|
|
@ -56,5 +58,3 @@ set ::env(GLB_RT_ADJUSTMENT) 0
|
|||
|
||||
## Diode Insertion
|
||||
set ::env(DIODE_INSERTION_STRATEGY) "4"
|
||||
|
||||
set ::env(QUIT_ON_TIMING_VIOLATIONS) "0"
|
||||
|
|
@ -0,0 +1 @@
|
|||
openlane 2021.09.09_03.00.48-60-gcbb562b
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
openlane cbb562bd43c5c410b1b498604803c3dd88a44856
|
||||
skywater-pdk c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
|
||||
open_pdks c5730b574461889c82858b08d12ba42423d9c2cb
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
|
||||
0,/project/openlane/caravel_clocking,caravel_clocking,caravel_clocking,flow_completed,0h2m5s,-1,83437.5,0.0064,41718.75,89.0,668.91,267,0,0,0,0,0,0,0,0,0,0,-1,5362,2031,-3.73,-5.41,-1,-5.06,-1,-24.41,-36.66,-1,-29.74,-1,2636042.0,22.97,25.9,15.17,0.43,0.0,-1,202,252,67,117,0,0,0,200,0,0,0,0,0,0,0,4,72,71,6,42,57,0,99,90.9090909090909,11.0,10.0,DELAY 0,5,50,1,22.986666666666668,19.413333333333334,0.94,0,sky130_fd_sc_hd,0,4
|
||||
|
|
|
@ -1 +1 @@
|
|||
openlane 2021.09.09_03.00.48-53-g97579eb
|
||||
openlane 2021.09.09_03.00.48-60-gcbb562b
|
||||
|
|
|
|||
|
|
@ -1,6 +1,3 @@
|
|||
-ne openlane
|
||||
e6ba5d36a9b32a9f87626d49bf3c80cf3964ebeb
|
||||
-ne skywater-pdk
|
||||
c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
|
||||
-ne open_pdks
|
||||
f90a86bdd133bd629251d59eebb1aee8452c0f5c
|
||||
openlane cbb562bd43c5c410b1b498604803c3dd88a44856
|
||||
skywater-pdk c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
|
||||
open_pdks c5730b574461889c82858b08d12ba42423d9c2cb
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
|
||||
0,/project/openlane/digital_pll,digital_pll,digital_pll,flow_completed,0h1m28s,-1,112355.55555555556,0.005625,56177.77777777778,81.29,555.68,316,0,-1,-1,-1,-1,0,0,-1,0,0,-1,5981,2244,-0.11,0.0,-1,-1.46,-1,-0.11,0.0,-1,-1.46,-1,4115053.0,20.95,29.53,21.12,0.0,0.0,0.0,613,808,120,303,0,0,0,646,0,0,0,0,0,0,0,4,31,72,18,46,50,0,96,90.9090909090909,11.0,10.0,AREA 0,6,50,1,40,40,0.82,0,sky130_fd_sc_hd,0,4
|
||||
0,/project/openlane/digital_pll,digital_pll,digital_pll,flow_completed,0h1m45s,-1,110933.33333333334,0.005625,55466.66666666667,81.42,533.2,312,0,-1,-1,-1,-1,0,0,-1,0,0,-1,5954,2241,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,4109866.0,23.53,31.05,21.81,0.0,0.0,0.0,613,808,120,303,0,0,0,646,0,0,0,0,0,0,0,4,31,72,20,46,50,0,96,90.9090909090909,11.0,10.0,AREA 0,6,50,1,40,40,0.82,0,sky130_fd_sc_hd,0,4
|
||||
|
|
|
|||
|
|
|
@ -0,0 +1,786 @@
|
|||
* NGSPICE file created from caravel_clocking.ext - technology: sky130A
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__inv_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__inv_2 A VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__xnor2_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__xnor2_1 A B VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfrtp_4 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfrtp_4 CLK D RESET_B VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfxtp_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfxtp_1 CLK D VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__fill_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__fill_1 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__clkbuf_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__clkbuf_2 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o21a_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__o21a_1 A1 A2 B1 VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__fill_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__fill_2 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__diode_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__diode_2 DIODE VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__clkinv_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__clkinv_2 A VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nor2_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__nor2_1 A B VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfstp_4 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfstp_4 CLK D SET_B VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nand3_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__nand3_1 A B C VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dlymetal6s2s_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__dlymetal6s2s_1 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__decap_3 abstract view
|
||||
.subckt sky130_fd_sc_hd__decap_3 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o21ai_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__o21ai_1 A1 A2 B1 VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__decap_12 abstract view
|
||||
.subckt sky130_fd_sc_hd__decap_12 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__decap_6 abstract view
|
||||
.subckt sky130_fd_sc_hd__decap_6 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__clkbuf_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__clkbuf_1 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__a21bo_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__a21bo_1 A1 A2 B1_N VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__xor2_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__xor2_1 A B VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__buf_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__buf_1 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__mux2_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__mux2_1 A0 A1 S VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__decap_8 abstract view
|
||||
.subckt sky130_fd_sc_hd__decap_8 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nand2_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__nand2_1 A B VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__and2_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__and2_1 A B VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__buf_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__buf_2 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__decap_4 abstract view
|
||||
.subckt sky130_fd_sc_hd__decap_4 VGND VNB VPB VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__mux2_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__mux2_2 A0 A1 S VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__clkbuf_16 abstract view
|
||||
.subckt sky130_fd_sc_hd__clkbuf_16 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o21bai_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__o21bai_1 A1 A2 B1_N VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nor3b_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__nor3b_2 A B C_N VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nand3b_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__nand3b_1 A_N B C VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__or2b_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__or2b_1 A B_N VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o211ai_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__o211ai_1 A1 A2 B1 C1 VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__a21o_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__a21o_1 A1 A2 B1 VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfrtp_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfrtp_1 CLK D RESET_B VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfstp_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfstp_1 CLK D SET_B VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nand2_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__nand2_2 A B VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfrtn_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfrtn_1 CLK_N D RESET_B VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__and2b_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__and2b_1 A_N B VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o21ai_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__o21ai_2 A1 A2 B1 VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__dfrtp_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__dfrtp_2 CLK D RESET_B VGND VNB VPB VPWR Q
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o2bb2ai_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__o2bb2ai_1 A1_N A2_N B1 B2 VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__tapvpwrvgnd_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__tapvpwrvgnd_1 VGND VPWR
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__buf_6 abstract view
|
||||
.subckt sky130_fd_sc_hd__buf_6 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__nor3_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__nor3_1 A B C VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__buf_12 abstract view
|
||||
.subckt sky130_fd_sc_hd__buf_12 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o2bb2ai_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__o2bb2ai_2 A1_N A2_N B1 B2 VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__conb_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__conb_1 VGND VNB VPB VPWR HI LO
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__clkdlybuf4s25_1 abstract view
|
||||
.subckt sky130_fd_sc_hd__clkdlybuf4s25_1 A VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__o21bai_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__o21bai_2 A1 A2 B1_N VGND VNB VPB VPWR Y
|
||||
.ends
|
||||
|
||||
* Black-box entry subcircuit for sky130_fd_sc_hd__and2b_2 abstract view
|
||||
.subckt sky130_fd_sc_hd__and2b_2 A_N B VGND VNB VPB VPWR X
|
||||
.ends
|
||||
|
||||
.subckt caravel_clocking VGND VPWR core_clk ext_clk ext_clk_sel ext_reset pll_clk
|
||||
+ pll_clk90 resetb resetb_sync sel2[0] sel2[1] sel2[2] sel[0] sel[1] sel[2] user_clk
|
||||
X_294_ _397_/X VGND VGND VPWR VPWR _294_/Y sky130_fd_sc_hd__inv_2
|
||||
X_363_ _445_/Q _444_/Q VGND VGND VPWR VPWR _363_/Y sky130_fd_sc_hd__xnor2_1
|
||||
X_432_ _351_/Y _432_/D _343_/S VGND VGND VPWR VPWR _432_/Q sky130_fd_sc_hd__dfrtp_4
|
||||
X_415_ _411_/A1 _431_/Q VGND VGND VPWR VPWR _415_/Q sky130_fd_sc_hd__dfxtp_1
|
||||
XFILLER_12_21 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_346_ _346_/A VGND VGND VPWR VPWR _410_/S sky130_fd_sc_hd__inv_2
|
||||
X_277_ _454_/Q VGND VGND VPWR VPWR _279_/B sky130_fd_sc_hd__inv_2
|
||||
XFILLER_2_143 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
Xclkbuf_1_1_0_pll_clk clkbuf_0_pll_clk/X VGND VGND VPWR VPWR _411_/A1 sky130_fd_sc_hd__clkbuf_2
|
||||
X_329_ _325_/Y _328_/Y _286_/Y VGND VGND VPWR VPWR _443_/D sky130_fd_sc_hd__o21a_1
|
||||
XFILLER_18_53 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XANTENNA__443__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_362_ _444_/Q VGND VGND VPWR VPWR _362_/Y sky130_fd_sc_hd__clkinv_2
|
||||
X_293_ _449_/Q _448_/Q VGND VGND VPWR VPWR _293_/Y sky130_fd_sc_hd__nor2_1
|
||||
X_431_ _351_/Y _431_/D _343_/S VGND VGND VPWR VPWR _431_/Q sky130_fd_sc_hd__dfstp_4
|
||||
XFILLER_6_119 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_276_ _276_/A _276_/B _451_/Q VGND VGND VPWR VPWR _345_/A sky130_fd_sc_hd__nand3_1
|
||||
X_345_ _345_/A VGND VGND VPWR VPWR _404_/S sky130_fd_sc_hd__inv_2
|
||||
X_414_ _411_/A1 _430_/Q VGND VGND VPWR VPWR _414_/Q sky130_fd_sc_hd__dfxtp_1
|
||||
X_259_ _266_/A VGND VGND VPWR VPWR _263_/A sky130_fd_sc_hd__dlymetal6s2s_1
|
||||
XFILLER_0_69 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_328_ _326_/Y _327_/X _279_/C VGND VGND VPWR VPWR _328_/Y sky130_fd_sc_hd__o21ai_1
|
||||
XFILLER_15_7 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
XFILLER_20_22 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_6
|
||||
XFILLER_15_44 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
Xoutput10 _393_/X VGND VGND VPWR VPWR core_clk sky130_fd_sc_hd__clkbuf_1
|
||||
X_292_ _405_/X _286_/Y _291_/Y VGND VGND VPWR VPWR _451_/D sky130_fd_sc_hd__a21bo_1
|
||||
X_430_ _351_/Y _430_/D _343_/S VGND VGND VPWR VPWR _430_/Q sky130_fd_sc_hd__dfrtp_4
|
||||
X_361_ _453_/Q _361_/B VGND VGND VPWR VPWR _361_/X sky130_fd_sc_hd__xor2_1
|
||||
X_334__6 _453_/CLK VGND VGND VPWR VPWR _441_/CLK sky130_fd_sc_hd__inv_2
|
||||
XFILLER_3_69 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_275_ _452_/Q VGND VGND VPWR VPWR _276_/B sky130_fd_sc_hd__inv_2
|
||||
X_344_ _344_/A VGND VGND VPWR VPWR _420_/D sky130_fd_sc_hd__buf_1
|
||||
X_413_ _455_/Q _413_/A1 _413_/S VGND VGND VPWR VPWR _413_/X sky130_fd_sc_hd__mux2_1
|
||||
XFILLER_0_59 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8
|
||||
XFILLER_0_48 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8
|
||||
XFILLER_0_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8
|
||||
X_258_ _258_/A _258_/B VGND VGND VPWR VPWR _266_/A sky130_fd_sc_hd__nand2_1
|
||||
X_327_ _432_/Q _416_/Q VGND VGND VPWR VPWR _327_/X sky130_fd_sc_hd__and2_1
|
||||
XFILLER_9_57 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__439__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
Xoutput11 _375_/Y VGND VGND VPWR VPWR resetb_sync sky130_fd_sc_hd__buf_2
|
||||
XANTENNA__422__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_360_ _452_/Q _451_/Q VGND VGND VPWR VPWR _361_/B sky130_fd_sc_hd__nor2_1
|
||||
X_291_ _291_/A _451_/Q _316_/C VGND VGND VPWR VPWR _291_/Y sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_5_7 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
X_412_ _412_/A0 _426_/Q _425_/D VGND VGND VPWR VPWR _412_/X sky130_fd_sc_hd__mux2_1
|
||||
X_274_ _453_/Q VGND VGND VPWR VPWR _276_/A sky130_fd_sc_hd__inv_2
|
||||
X_343_ hold1/A _343_/A1 _343_/S VGND VGND VPWR VPWR _344_/A sky130_fd_sc_hd__mux2_2
|
||||
X_257_ _257_/A _257_/B _257_/C VGND VGND VPWR VPWR _459_/D sky130_fd_sc_hd__nand3_1
|
||||
X_326_ _432_/Q _416_/Q VGND VGND VPWR VPWR _326_/Y sky130_fd_sc_hd__nor2_1
|
||||
X_309_ _397_/S _309_/B _406_/S VGND VGND VPWR VPWR _316_/A sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_20_57 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
Xoutput12 _394_/X VGND VGND VPWR VPWR user_clk sky130_fd_sc_hd__clkbuf_1
|
||||
XFILLER_11_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
XANTENNA_input8_A sel[1] VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_290_ _402_/X _286_/Y _289_/Y VGND VGND VPWR VPWR _452_/D sky130_fd_sc_hd__a21bo_1
|
||||
Xclkbuf_0_pll_clk pll_clk VGND VGND VPWR VPWR clkbuf_0_pll_clk/X sky130_fd_sc_hd__clkbuf_16
|
||||
X_342_ _439_/Q _342_/B VGND VGND VPWR VPWR _439_/D sky130_fd_sc_hd__xnor2_1
|
||||
X_411_ _439_/Q _411_/A1 _411_/S VGND VGND VPWR VPWR _411_/X sky130_fd_sc_hd__mux2_1
|
||||
X_273_ _273_/A _273_/B VGND VGND VPWR VPWR _455_/D sky130_fd_sc_hd__nand2_1
|
||||
XANTENNA__446__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_256_ _253_/Y _258_/A _250_/B VGND VGND VPWR VPWR _257_/B sky130_fd_sc_hd__o21bai_1
|
||||
X_325_ _325_/A _325_/B _414_/Q VGND VGND VPWR VPWR _325_/Y sky130_fd_sc_hd__nand3_1
|
||||
X_308_ _442_/Q _441_/Q _440_/Q VGND VGND VPWR VPWR _406_/S sky130_fd_sc_hd__nor3b_2
|
||||
XANTENNA__468__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_239_ _461_/Q VGND VGND VPWR VPWR _240_/B sky130_fd_sc_hd__inv_2
|
||||
XFILLER_6_27 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_341_ _430_/Q _364_/A _444_/Q VGND VGND VPWR VPWR _342_/B sky130_fd_sc_hd__nand3b_1
|
||||
X_272_ _346_/A _272_/B _272_/C VGND VGND VPWR VPWR _273_/B sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_12_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XFILLER_12_37 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_410_ _438_/Q _373_/Y _410_/S VGND VGND VPWR VPWR _410_/X sky130_fd_sc_hd__mux2_1
|
||||
XFILLER_0_29 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_324_ _415_/Q _431_/Q VGND VGND VPWR VPWR _325_/B sky130_fd_sc_hd__or2b_1
|
||||
X_255_ _437_/Q _438_/Q _436_/Q _254_/Y VGND VGND VPWR VPWR _258_/A sky130_fd_sc_hd__o211ai_1
|
||||
XANTENNA__428__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_18_36 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_1_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
XANTENNA__430__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_307_ _447_/Q VGND VGND VPWR VPWR _309_/B sky130_fd_sc_hd__inv_2
|
||||
X_238_ _462_/Q VGND VGND VPWR VPWR _240_/A sky130_fd_sc_hd__inv_2
|
||||
XFILLER_20_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_19_144 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XFILLER_6_39 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XPHY_0 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_12_27 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_340_ _446_/Q _445_/Q VGND VGND VPWR VPWR _364_/A sky130_fd_sc_hd__nor2_1
|
||||
X_271_ _346_/A _272_/B _272_/C VGND VGND VPWR VPWR _273_/A sky130_fd_sc_hd__a21o_1
|
||||
XFILLER_4_94 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_469_ _469_/CLK _469_/D _343_/S VGND VGND VPWR VPWR _469_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
X_254_ _462_/Q _461_/Q VGND VGND VPWR VPWR _254_/Y sky130_fd_sc_hd__nor2_1
|
||||
X_323_ _431_/Q _415_/Q VGND VGND VPWR VPWR _325_/A sky130_fd_sc_hd__or2b_1
|
||||
XANTENNA__434__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_306_ _306_/A _306_/B VGND VGND VPWR VPWR _397_/S sky130_fd_sc_hd__nor2_1
|
||||
X_237_ _460_/Q _258_/B _390_/X VGND VGND VPWR VPWR _237_/Y sky130_fd_sc_hd__nand3b_1
|
||||
XANTENNA__470__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_1 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA_input6_A sel2[2] VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_270_ _455_/Q VGND VGND VPWR VPWR _272_/C sky130_fd_sc_hd__inv_2
|
||||
X_399_ _398_/X _432_/Q _443_/Q VGND VGND VPWR VPWR _399_/X sky130_fd_sc_hd__mux2_1
|
||||
XANTENNA__424__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_468_ _469_/CLK _468_/D _343_/S VGND VGND VPWR VPWR _468_/Q sky130_fd_sc_hd__dfstp_1
|
||||
XANTENNA__457__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_322_ _322_/A VGND VGND VPWR VPWR _444_/D sky130_fd_sc_hd__clkbuf_1
|
||||
X_253_ _253_/A _253_/B _456_/Q VGND VGND VPWR VPWR _253_/Y sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_18_27 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_236_ _467_/Q _234_/Y _235_/Y VGND VGND VPWR VPWR _236_/Y sky130_fd_sc_hd__o21bai_1
|
||||
Xclkbuf_1_1_0_pll_clk90 clkbuf_0_pll_clk90/X VGND VGND VPWR VPWR _413_/A1 sky130_fd_sc_hd__clkbuf_2
|
||||
X_219_ _465_/Q VGND VGND VPWR VPWR _221_/A sky130_fd_sc_hd__inv_2
|
||||
XANTENNA_clkbuf_0_pll_clk_A pll_clk VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_2 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_467_ _413_/A1 _467_/D _343_/S VGND VGND VPWR VPWR _467_/Q sky130_fd_sc_hd__dfrtp_4
|
||||
X_398_ _361_/X _432_/Q _404_/S VGND VGND VPWR VPWR _398_/X sky130_fd_sc_hd__mux2_1
|
||||
X_252_ _457_/Q VGND VGND VPWR VPWR _253_/B sky130_fd_sc_hd__inv_2
|
||||
X_321_ _400_/X _444_/Q _430_/Q VGND VGND VPWR VPWR _322_/A sky130_fd_sc_hd__mux2_1
|
||||
XFILLER_13_83 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
Xclkbuf_1_0_0_pll_clk90 clkbuf_0_pll_clk90/X VGND VGND VPWR VPWR _469_/CLK sky130_fd_sc_hd__clkbuf_2
|
||||
X_304_ _294_/Y _448_/Q _296_/Y VGND VGND VPWR VPWR _448_/D sky130_fd_sc_hd__a21bo_1
|
||||
X_235_ _390_/X VGND VGND VPWR VPWR _235_/Y sky130_fd_sc_hd__inv_2
|
||||
X_242__1 _469_/CLK VGND VGND VPWR VPWR _461_/CLK sky130_fd_sc_hd__inv_2
|
||||
X_218_ _210_/Y _214_/Y _217_/Y VGND VGND VPWR VPWR _467_/D sky130_fd_sc_hd__o21a_1
|
||||
Xclkbuf_1_1_0_ext_clk clkbuf_0_ext_clk/X VGND VGND VPWR VPWR _412_/A0 sky130_fd_sc_hd__clkbuf_2
|
||||
XPHY_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
Xclkbuf_1_0_0_pll_clk clkbuf_0_pll_clk/X VGND VGND VPWR VPWR _453_/CLK sky130_fd_sc_hd__clkbuf_2
|
||||
X_466_ _413_/A1 _466_/D _343_/S VGND VGND VPWR VPWR _466_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_397_ _286_/Y _443_/Q _397_/S VGND VGND VPWR VPWR _397_/X sky130_fd_sc_hd__mux2_1
|
||||
XANTENNA__423__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XANTENNA__433__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_251_ _458_/Q VGND VGND VPWR VPWR _253_/A sky130_fd_sc_hd__inv_2
|
||||
X_320_ _320_/A VGND VGND VPWR VPWR _445_/D sky130_fd_sc_hd__clkbuf_1
|
||||
X_449_ _449_/CLK _449_/D _343_/S VGND VGND VPWR VPWR _449_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_303_ _299_/B _302_/X _295_/Y VGND VGND VPWR VPWR _449_/D sky130_fd_sc_hd__o21ai_1
|
||||
XFILLER_1_65 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_234_ _461_/Q _460_/Q VGND VGND VPWR VPWR _234_/Y sky130_fd_sc_hd__nor2_1
|
||||
X_217_ _247_/A _258_/B VGND VGND VPWR VPWR _217_/Y sky130_fd_sc_hd__nand2_2
|
||||
XFILLER_15_19 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_16_118 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XANTENNA__458__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_4 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_465_ _413_/A1 _465_/D _343_/S VGND VGND VPWR VPWR _465_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
X_396_ _395_/X _438_/Q _467_/Q VGND VGND VPWR VPWR _396_/X sky130_fd_sc_hd__mux2_1
|
||||
XFILLER_4_32 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_4_43 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_250_ _390_/S _250_/B _408_/S VGND VGND VPWR VPWR _257_/A sky130_fd_sc_hd__nand3_1
|
||||
X_305__5 _453_/CLK VGND VGND VPWR VPWR _447_/CLK sky130_fd_sc_hd__inv_2
|
||||
XANTENNA_input4_A sel2[0] VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_379_ _368_/Y _436_/Q _391_/S VGND VGND VPWR VPWR _379_/X sky130_fd_sc_hd__mux2_1
|
||||
X_448_ _453_/CLK _448_/D _343_/S VGND VGND VPWR VPWR _448_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
X_233_ _380_/X _217_/Y _232_/Y VGND VGND VPWR VPWR _463_/D sky130_fd_sc_hd__a21bo_1
|
||||
X_302_ _448_/Q _397_/X VGND VGND VPWR VPWR _302_/X sky130_fd_sc_hd__and2b_1
|
||||
XFILLER_10_97 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_18_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
X_216_ _467_/Q VGND VGND VPWR VPWR _258_/B sky130_fd_sc_hd__inv_2
|
||||
XPHY_5 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__427__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_16_52 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_8_104 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_464_ _413_/A1 _464_/D _343_/S VGND VGND VPWR VPWR _464_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_395_ _367_/X _438_/Q _408_/S VGND VGND VPWR VPWR _395_/X sky130_fd_sc_hd__mux2_1
|
||||
XANTENNA__452__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_13_75 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XANTENNA__442__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_447_ _447_/CLK _447_/D _343_/S VGND VGND VPWR VPWR _447_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_232_ _232_/A _257_/C _463_/Q VGND VGND VPWR VPWR _232_/Y sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_10_32 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
X_215_ _437_/Q _438_/Q _436_/Q VGND VGND VPWR VPWR _247_/A sky130_fd_sc_hd__o21ai_2
|
||||
XPHY_6 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_7_55 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XANTENNA__467__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_16_97 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_8_116 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_394_ _412_/X _354_/Y _425_/Q VGND VGND VPWR VPWR _394_/X sky130_fd_sc_hd__mux2_1
|
||||
X_463_ _413_/A1 _463_/D _343_/S VGND VGND VPWR VPWR _463_/Q sky130_fd_sc_hd__dfrtp_2
|
||||
X_446_ _411_/A1 _446_/D _343_/S VGND VGND VPWR VPWR _446_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
XFILLER_8_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_6
|
||||
X_377_ _470_/Q _377_/B VGND VGND VPWR VPWR _470_/D sky130_fd_sc_hd__xor2_1
|
||||
XFILLER_13_43 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
Xclkbuf_0_ext_clk ext_clk VGND VGND VPWR VPWR clkbuf_0_ext_clk/X sky130_fd_sc_hd__clkbuf_16
|
||||
X_231_ _392_/X _217_/Y _230_/Y VGND VGND VPWR VPWR _464_/D sky130_fd_sc_hd__a21bo_1
|
||||
X_300_ _450_/Q _295_/Y _296_/Y _306_/B VGND VGND VPWR VPWR _450_/D sky130_fd_sc_hd__o2bb2ai_1
|
||||
X_429_ _351_/Y _429_/D _343_/S VGND VGND VPWR VPWR _432_/D sky130_fd_sc_hd__dfrtp_1
|
||||
XTAP_90 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Xinput1 ext_clk_sel VGND VGND VPWR VPWR _374_/A sky130_fd_sc_hd__buf_6
|
||||
XFILLER_10_44 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_214_ _211_/Y _212_/X _223_/C VGND VGND VPWR VPWR _214_/Y sky130_fd_sc_hd__o21ai_1
|
||||
XPHY_7 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__436__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_393_ _412_/X _351_/Y _425_/Q VGND VGND VPWR VPWR _393_/X sky130_fd_sc_hd__mux2_1
|
||||
X_462_ _469_/CLK _462_/D _343_/S VGND VGND VPWR VPWR _462_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
XANTENNA__451__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_1_145 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_13_55 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_445_ _411_/A1 _445_/D _343_/S VGND VGND VPWR VPWR _445_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
X_376_ _469_/Q _436_/Q _468_/Q VGND VGND VPWR VPWR _377_/B sky130_fd_sc_hd__nor3_1
|
||||
XANTENNA_input2_A ext_reset VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_230_ _232_/A _257_/C _464_/Q VGND VGND VPWR VPWR _230_/Y sky130_fd_sc_hd__nand3_1
|
||||
X_428_ _351_/Y _428_/D _343_/S VGND VGND VPWR VPWR _431_/D sky130_fd_sc_hd__dfstp_1
|
||||
X_359_ _452_/Q _451_/Q VGND VGND VPWR VPWR _359_/Y sky130_fd_sc_hd__xnor2_1
|
||||
Xinput2 ext_reset VGND VGND VPWR VPWR _375_/A sky130_fd_sc_hd__clkbuf_1
|
||||
XTAP_91 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XFILLER_10_78 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
XTAP_80 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_213_ _437_/Q _438_/Q _436_/Q VGND VGND VPWR VPWR _223_/C sky130_fd_sc_hd__o21a_1
|
||||
XFILLER_16_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
XPHY_8 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__441__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_392_ _391_/X _437_/Q _467_/Q VGND VGND VPWR VPWR _392_/X sky130_fd_sc_hd__mux2_1
|
||||
X_461_ _461_/CLK _461_/D _343_/S VGND VGND VPWR VPWR _461_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_375_ _375_/A _421_/Q VGND VGND VPWR VPWR _375_/Y sky130_fd_sc_hd__nor2_1
|
||||
X_444_ _411_/A1 _444_/D _343_/S VGND VGND VPWR VPWR _444_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_358_ _451_/Q VGND VGND VPWR VPWR _358_/Y sky130_fd_sc_hd__clkinv_2
|
||||
X_427_ _351_/Y _427_/D _343_/S VGND VGND VPWR VPWR _430_/D sky130_fd_sc_hd__dfrtp_1
|
||||
XFILLER_1_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XTAP_92 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_81 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Xinput3 resetb VGND VGND VPWR VPWR _343_/S sky130_fd_sc_hd__buf_12
|
||||
X_289_ _291_/A _452_/Q _316_/C VGND VGND VPWR VPWR _289_/Y sky130_fd_sc_hd__nand3_1
|
||||
XTAP_70 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_212_ _419_/Q _438_/Q VGND VGND VPWR VPWR _212_/X sky130_fd_sc_hd__and2_1
|
||||
XFILLER_10_13 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XANTENNA__464__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_9 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__445__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_391_ _369_/Y _437_/Q _391_/S VGND VGND VPWR VPWR _391_/X sky130_fd_sc_hd__mux2_1
|
||||
X_460_ _469_/CLK _460_/D _343_/S VGND VGND VPWR VPWR _460_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
XANTENNA__460__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_13_24 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_374_ _374_/A VGND VGND VPWR VPWR _424_/D sky130_fd_sc_hd__inv_2
|
||||
X_443_ _411_/A1 _443_/D _343_/S VGND VGND VPWR VPWR _443_/Q sky130_fd_sc_hd__dfrtp_4
|
||||
XTAP_93 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_82 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_288_ _399_/X _286_/Y _287_/Y VGND VGND VPWR VPWR _453_/D sky130_fd_sc_hd__a21bo_1
|
||||
XTAP_60 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_357_ _442_/Q _357_/B VGND VGND VPWR VPWR _357_/X sky130_fd_sc_hd__xor2_1
|
||||
X_426_ _411_/A1 hold1/X _343_/S VGND VGND VPWR VPWR _426_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
XTAP_71 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Xinput4 sel2[0] VGND VGND VPWR VPWR _433_/D sky130_fd_sc_hd__clkbuf_1
|
||||
X_211_ _419_/Q _438_/Q VGND VGND VPWR VPWR _211_/Y sky130_fd_sc_hd__nor2_1
|
||||
XFILLER_10_25 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_409_ _408_/X _437_/Q _467_/Q VGND VGND VPWR VPWR _409_/X sky130_fd_sc_hd__mux2_1
|
||||
X_390_ _217_/Y _467_/Q _390_/S VGND VGND VPWR VPWR _390_/X sky130_fd_sc_hd__mux2_1
|
||||
X_442_ _453_/CLK _442_/D _343_/S VGND VGND VPWR VPWR _442_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
X_373_ _469_/Q _468_/Q VGND VGND VPWR VPWR _373_/Y sky130_fd_sc_hd__xnor2_1
|
||||
XANTENNA__447__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_287_ _291_/A _453_/Q _316_/C VGND VGND VPWR VPWR _287_/Y sky130_fd_sc_hd__nand3_1
|
||||
X_356_ _441_/Q _440_/Q VGND VGND VPWR VPWR _357_/B sky130_fd_sc_hd__nor2_1
|
||||
Xinput5 sel2[1] VGND VGND VPWR VPWR _434_/D sky130_fd_sc_hd__clkbuf_1
|
||||
X_425_ _411_/A1 _425_/D _343_/S VGND VGND VPWR VPWR _425_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
XTAP_94 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_83 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_50 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_61 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_72 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_408_ _365_/Y _437_/Q _408_/S VGND VGND VPWR VPWR _408_/X sky130_fd_sc_hd__mux2_1
|
||||
X_210_ _210_/A _210_/B _417_/Q VGND VGND VPWR VPWR _210_/Y sky130_fd_sc_hd__nand3_1
|
||||
X_339_ _337_/Y _335_/A _338_/Y VGND VGND VPWR VPWR _440_/D sky130_fd_sc_hd__o21ai_1
|
||||
X_441_ _441_/CLK _441_/D _343_/S VGND VGND VPWR VPWR _441_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_372_ _468_/Q VGND VGND VPWR VPWR _372_/Y sky130_fd_sc_hd__clkinv_2
|
||||
Xclkbuf_1_0_0_ext_clk clkbuf_0_ext_clk/X VGND VGND VPWR VPWR _343_/A1 sky130_fd_sc_hd__clkbuf_2
|
||||
X_286_ _306_/A _330_/B VGND VGND VPWR VPWR _286_/Y sky130_fd_sc_hd__nand2_2
|
||||
X_424_ _411_/A1 _424_/D _343_/S VGND VGND VPWR VPWR _425_/D sky130_fd_sc_hd__dfrtp_1
|
||||
X_355_ _441_/Q _440_/Q VGND VGND VPWR VPWR _355_/Y sky130_fd_sc_hd__xnor2_1
|
||||
Xinput6 sel2[2] VGND VGND VPWR VPWR _435_/D sky130_fd_sc_hd__clkbuf_1
|
||||
XTAP_95 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XFILLER_19_36 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XTAP_84 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_51 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_62 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_73 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XFILLER_2_94 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_2_83 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_338_ _338_/A _386_/X VGND VGND VPWR VPWR _338_/Y sky130_fd_sc_hd__nand2_1
|
||||
X_407_ _406_/X _432_/Q _443_/Q VGND VGND VPWR VPWR _407_/X sky130_fd_sc_hd__mux2_1
|
||||
X_269_ _436_/Q VGND VGND VPWR VPWR _272_/B sky130_fd_sc_hd__inv_2
|
||||
XFILLER_16_7 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_16_59 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_371_ _465_/Q _371_/B VGND VGND VPWR VPWR _371_/X sky130_fd_sc_hd__xor2_1
|
||||
X_440_ _453_/CLK _440_/D _343_/S VGND VGND VPWR VPWR _440_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
XFILLER_8_9 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_423_ _393_/X _423_/D _343_/S VGND VGND VPWR VPWR _423_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_354_ _272_/B _413_/X _232_/A _353_/Y VGND VGND VPWR VPWR _354_/Y sky130_fd_sc_hd__o2bb2ai_2
|
||||
X_285_ _285_/A _316_/C _285_/C VGND VGND VPWR VPWR _454_/D sky130_fd_sc_hd__nand3_1
|
||||
XTAP_96 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_85 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_52 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XANTENNA__448__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
Xinput7 sel[0] VGND VGND VPWR VPWR _427_/D sky130_fd_sc_hd__clkbuf_1
|
||||
XTAP_63 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_74 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_337_ _440_/Q VGND VGND VPWR VPWR _337_/Y sky130_fd_sc_hd__inv_2
|
||||
X_406_ _357_/X _432_/Q _406_/S VGND VGND VPWR VPWR _406_/X sky130_fd_sc_hd__mux2_1
|
||||
X_268_ _469_/Q _470_/Q _468_/Q VGND VGND VPWR VPWR _346_/A sky130_fd_sc_hd__nor3b_2
|
||||
XANTENNA_clkbuf_0_pll_clk90_A pll_clk90 VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XANTENNA__463__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_1_107 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_370_ _464_/Q _463_/Q VGND VGND VPWR VPWR _371_/B sky130_fd_sc_hd__nor2_1
|
||||
X_422_ _393_/X _423_/Q _343_/S VGND VGND VPWR VPWR _422_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_284_ _291_/A _345_/A _279_/B VGND VGND VPWR VPWR _285_/C sky130_fd_sc_hd__o21bai_1
|
||||
X_353_ _466_/Q _459_/Q VGND VGND VPWR VPWR _353_/Y sky130_fd_sc_hd__xnor2_1
|
||||
XTAP_97 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_86 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_42 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_53 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Xinput8 sel[1] VGND VGND VPWR VPWR _428_/D sky130_fd_sc_hd__clkbuf_1
|
||||
XTAP_64 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_75 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XFILLER_10_29 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_267_ _265_/Y _263_/A _266_/Y VGND VGND VPWR VPWR _456_/D sky130_fd_sc_hd__o21ai_1
|
||||
X_405_ _404_/X _430_/Q _443_/Q VGND VGND VPWR VPWR _405_/X sky130_fd_sc_hd__mux2_1
|
||||
X_336_ _312_/B _335_/A _335_/Y VGND VGND VPWR VPWR _441_/D sky130_fd_sc_hd__o21ai_1
|
||||
X_319_ _403_/X _445_/Q _430_/Q VGND VGND VPWR VPWR _320_/A sky130_fd_sc_hd__mux2_1
|
||||
XANTENNA__432__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XANTENNA__459__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_17_82 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_12_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
XANTENNA_input9_A sel[2] VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_421_ _393_/X _422_/Q _343_/S VGND VGND VPWR VPWR _421_/Q sky130_fd_sc_hd__dfstp_1
|
||||
XTAP_98 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_87 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_352_ _437_/Q _438_/Q VGND VGND VPWR VPWR _413_/S sky130_fd_sc_hd__nor2_1
|
||||
XTAP_43 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_54 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_283_ _306_/A VGND VGND VPWR VPWR _291_/A sky130_fd_sc_hd__clkbuf_2
|
||||
XTAP_65 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
Xinput9 sel[2] VGND VGND VPWR VPWR _429_/D sky130_fd_sc_hd__clkbuf_1
|
||||
XTAP_76 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XFILLER_14_83 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_10_19 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
X_266_ _266_/A _384_/X VGND VGND VPWR VPWR _266_/Y sky130_fd_sc_hd__nand2_1
|
||||
X_404_ _358_/Y _430_/Q _404_/S VGND VGND VPWR VPWR _404_/X sky130_fd_sc_hd__mux2_1
|
||||
X_335_ _335_/A _382_/X VGND VGND VPWR VPWR _335_/Y sky130_fd_sc_hd__nand2_1
|
||||
X_249_ _458_/Q _457_/Q _456_/Q VGND VGND VPWR VPWR _408_/S sky130_fd_sc_hd__nor3b_2
|
||||
X_318_ _446_/Q _318_/B VGND VGND VPWR VPWR _446_/D sky130_fd_sc_hd__xor2_1
|
||||
XFILLER_8_52 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_378__13 VGND VGND VPWR VPWR _378__13/HI _423_/D sky130_fd_sc_hd__conb_1
|
||||
Xhold1 hold1/A VGND VGND VPWR VPWR hold1/X sky130_fd_sc_hd__clkdlybuf4s25_1
|
||||
X_282_ _432_/Q _431_/Q _430_/Q VGND VGND VPWR VPWR _306_/A sky130_fd_sc_hd__o21ai_1
|
||||
X_351_ _291_/A _349_/Y _350_/X VGND VGND VPWR VPWR _351_/Y sky130_fd_sc_hd__o21bai_2
|
||||
X_420_ _411_/A1 _420_/D VGND VGND VPWR VPWR hold1/A sky130_fd_sc_hd__dfxtp_1
|
||||
XTAP_88 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_44 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_55 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_66 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_77 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_403_ _432_/Q _363_/Y _403_/S VGND VGND VPWR VPWR _403_/X sky130_fd_sc_hd__mux2_1
|
||||
XANTENNA__426__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_265_ _456_/Q VGND VGND VPWR VPWR _265_/Y sky130_fd_sc_hd__inv_2
|
||||
XFILLER_2_21 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_14_141 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_2_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
X_317_ _430_/Q _445_/Q _444_/Q VGND VGND VPWR VPWR _318_/B sky130_fd_sc_hd__nor3_1
|
||||
X_248_ _459_/Q VGND VGND VPWR VPWR _250_/B sky130_fd_sc_hd__inv_2
|
||||
XFILLER_8_42 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_17_95 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_246__2 _413_/A1 VGND VGND VPWR VPWR _459_/CLK sky130_fd_sc_hd__inv_2
|
||||
X_281_ _330_/B VGND VGND VPWR VPWR _316_/C sky130_fd_sc_hd__dlymetal6s2s_1
|
||||
X_350_ _430_/Q _411_/X VGND VGND VPWR VPWR _350_/X sky130_fd_sc_hd__and2b_2
|
||||
XTAP_89 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_78 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_45 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_56 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_67 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_264_ _253_/B _263_/A _263_/Y VGND VGND VPWR VPWR _457_/D sky130_fd_sc_hd__o21ai_1
|
||||
XPHY_40 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_402_ _401_/X _431_/Q _443_/Q VGND VGND VPWR VPWR _402_/X sky130_fd_sc_hd__mux2_1
|
||||
X_333_ _312_/A _335_/A _332_/Y VGND VGND VPWR VPWR _442_/D sky130_fd_sc_hd__o21ai_1
|
||||
X_316_ _316_/A _316_/B _316_/C VGND VGND VPWR VPWR _447_/D sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_11_42 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_247_ _247_/A _247_/B VGND VGND VPWR VPWR _390_/S sky130_fd_sc_hd__nor2_1
|
||||
XFILLER_20_145 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_8_87 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XANTENNA__431__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_10_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_6
|
||||
XANTENNA_input7_A sel[0] VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_280_ _443_/Q VGND VGND VPWR VPWR _330_/B sky130_fd_sc_hd__inv_2
|
||||
XTAP_46 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_57 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_68 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_79 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XANTENNA__435__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_41 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_263_ _263_/A _409_/X VGND VGND VPWR VPWR _263_/Y sky130_fd_sc_hd__nand2_1
|
||||
XPHY_30 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_401_ _359_/Y _431_/Q _404_/S VGND VGND VPWR VPWR _401_/X sky130_fd_sc_hd__mux2_1
|
||||
X_332_ _335_/A _407_/X VGND VGND VPWR VPWR _332_/Y sky130_fd_sc_hd__nand2_1
|
||||
XFILLER_20_113 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_315_ _312_/Y _330_/A _309_/B VGND VGND VPWR VPWR _316_/B sky130_fd_sc_hd__o21bai_1
|
||||
XANTENNA__454__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_229_ _389_/X _217_/Y _228_/Y VGND VGND VPWR VPWR _465_/D sky130_fd_sc_hd__a21bo_1
|
||||
XANTENNA__450__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_262__3 _469_/CLK VGND VGND VPWR VPWR _457_/CLK sky130_fd_sc_hd__inv_2
|
||||
XFILLER_14_76 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
XTAP_47 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_58 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_69 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XPHY_31 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_400_ _431_/Q _362_/Y _403_/S VGND VGND VPWR VPWR _400_/X sky130_fd_sc_hd__mux2_1
|
||||
X_331_ _338_/A VGND VGND VPWR VPWR _335_/A sky130_fd_sc_hd__dlymetal6s2s_1
|
||||
XPHY_20 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_11_55 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_314_ _432_/Q _431_/Q _430_/Q _313_/Y VGND VGND VPWR VPWR _330_/A sky130_fd_sc_hd__o211ai_1
|
||||
X_245_ _235_/Y _460_/Q _237_/Y VGND VGND VPWR VPWR _460_/D sky130_fd_sc_hd__a21bo_1
|
||||
XFILLER_0_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
X_228_ _232_/A _257_/C _465_/Q VGND VGND VPWR VPWR _228_/Y sky130_fd_sc_hd__nand3_1
|
||||
XANTENNA__429__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XTAP_48 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
XTAP_59 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_261_ _253_/A _263_/A _260_/Y VGND VGND VPWR VPWR _458_/D sky130_fd_sc_hd__o21ai_1
|
||||
XPHY_32 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__437__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_10 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_330_ _330_/A _330_/B VGND VGND VPWR VPWR _338_/A sky130_fd_sc_hd__nand2_1
|
||||
XPHY_21 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_459_ _459_/CLK _459_/D _343_/S VGND VGND VPWR VPWR _459_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_313_ _450_/Q _449_/Q VGND VGND VPWR VPWR _313_/Y sky130_fd_sc_hd__nor2_1
|
||||
X_244_ _240_/B _243_/X _236_/Y VGND VGND VPWR VPWR _461_/D sky130_fd_sc_hd__o21ai_1
|
||||
X_227_ _227_/A _257_/C _227_/C VGND VGND VPWR VPWR _466_/D sky130_fd_sc_hd__nand3_1
|
||||
XFILLER_17_44 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_3_100 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XANTENNA__469__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_5_25 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XTAP_49 VGND VPWR sky130_fd_sc_hd__tapvpwrvgnd_1
|
||||
X_260_ _263_/A _396_/X VGND VGND VPWR VPWR _260_/Y sky130_fd_sc_hd__nand2_1
|
||||
XPHY_33 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_11 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA_input5_A sel2[1] VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_22 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_458_ _469_/CLK _458_/D _343_/S VGND VGND VPWR VPWR _458_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
X_389_ _388_/X _438_/Q _467_/Q VGND VGND VPWR VPWR _389_/X sky130_fd_sc_hd__mux2_1
|
||||
X_312_ _312_/A _312_/B _440_/Q VGND VGND VPWR VPWR _312_/Y sky130_fd_sc_hd__nand3_1
|
||||
X_243_ _460_/Q _390_/X VGND VGND VPWR VPWR _243_/X sky130_fd_sc_hd__and2b_1
|
||||
XFILLER_19_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
X_226_ _232_/A _347_/A _223_/B VGND VGND VPWR VPWR _227_/C sky130_fd_sc_hd__o21bai_1
|
||||
XFILLER_17_34 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_3_145 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_209_ _437_/Q _418_/Q VGND VGND VPWR VPWR _210_/B sky130_fd_sc_hd__or2b_1
|
||||
XANTENNA__438__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XANTENNA__466__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_12 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_17_144 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XPHY_34 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XANTENNA__453__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_23 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_457_ _457_/CLK _457_/D _343_/S VGND VGND VPWR VPWR _457_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_388_ _371_/X _438_/Q _391_/S VGND VGND VPWR VPWR _388_/X sky130_fd_sc_hd__mux2_1
|
||||
X_311_ _441_/Q VGND VGND VPWR VPWR _312_/B sky130_fd_sc_hd__inv_2
|
||||
X_225_ _247_/A VGND VGND VPWR VPWR _232_/A sky130_fd_sc_hd__clkbuf_2
|
||||
X_208_ _418_/Q _437_/Q VGND VGND VPWR VPWR _210_/A sky130_fd_sc_hd__or2b_1
|
||||
XFILLER_0_82 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XFILLER_9_91 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_5_38 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XPHY_35 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_13 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_9_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_6
|
||||
XPHY_24 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_456_ _469_/CLK _456_/D _343_/S VGND VGND VPWR VPWR _456_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
X_387_ _437_/Q _372_/Y _410_/S VGND VGND VPWR VPWR _387_/X sky130_fd_sc_hd__mux2_1
|
||||
X_310_ _442_/Q VGND VGND VPWR VPWR _312_/A sky130_fd_sc_hd__inv_2
|
||||
XFILLER_11_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
XFILLER_11_48 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
X_439_ _411_/A1 _439_/D _343_/S VGND VGND VPWR VPWR _439_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_241_ _462_/Q _236_/Y _237_/Y _247_/B VGND VGND VPWR VPWR _462_/D sky130_fd_sc_hd__o2bb2ai_1
|
||||
XFILLER_12_80 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_224_ _258_/B VGND VGND VPWR VPWR _257_/C sky130_fd_sc_hd__clkbuf_2
|
||||
X_207_ _207_/A VGND VGND VPWR VPWR _468_/D sky130_fd_sc_hd__clkbuf_1
|
||||
XANTENNA__449__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_9_70 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_10_9 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XPHY_36 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_14 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_25 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_386_ _385_/X _430_/Q _443_/Q VGND VGND VPWR VPWR _386_/X sky130_fd_sc_hd__mux2_1
|
||||
X_455_ _413_/A1 _455_/D _343_/S VGND VGND VPWR VPWR _455_/Q sky130_fd_sc_hd__dfstp_1
|
||||
XANTENNA__462__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XANTENNA_input3_A resetb VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_240_ _240_/A _240_/B VGND VGND VPWR VPWR _247_/B sky130_fd_sc_hd__nand2_1
|
||||
X_369_ _464_/Q _463_/Q VGND VGND VPWR VPWR _369_/Y sky130_fd_sc_hd__xnor2_1
|
||||
X_438_ _354_/Y _438_/D _343_/S VGND VGND VPWR VPWR _438_/Q sky130_fd_sc_hd__dfrtp_4
|
||||
XFILLER_9_142 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_223_ _347_/A _223_/B _223_/C VGND VGND VPWR VPWR _227_/A sky130_fd_sc_hd__nand3b_1
|
||||
XFILLER_8_17 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_17_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_8
|
||||
X_206_ _387_/X _468_/Q _436_/Q VGND VGND VPWR VPWR _207_/A sky130_fd_sc_hd__mux2_1
|
||||
XFILLER_17_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
XFILLER_18_91 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XANTENNA__455__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_37 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_15 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_26 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_385_ _337_/Y _430_/Q _406_/S VGND VGND VPWR VPWR _385_/X sky130_fd_sc_hd__mux2_1
|
||||
X_454_ _411_/A1 _454_/D _343_/S VGND VGND VPWR VPWR _454_/Q sky130_fd_sc_hd__dfstp_1
|
||||
X_437_ _354_/Y _437_/D _343_/S VGND VGND VPWR VPWR _437_/Q sky130_fd_sc_hd__dfstp_4
|
||||
X_299_ _299_/A _299_/B VGND VGND VPWR VPWR _306_/B sky130_fd_sc_hd__nand2_1
|
||||
X_368_ _463_/Q VGND VGND VPWR VPWR _368_/Y sky130_fd_sc_hd__clkinv_2
|
||||
X_222_ _466_/Q VGND VGND VPWR VPWR _223_/B sky130_fd_sc_hd__inv_2
|
||||
X_205_ _205_/A VGND VGND VPWR VPWR _469_/D sky130_fd_sc_hd__clkbuf_1
|
||||
XFILLER_0_85 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
Xclkbuf_0_pll_clk90 pll_clk90 VGND VGND VPWR VPWR clkbuf_0_pll_clk90/X sky130_fd_sc_hd__clkbuf_16
|
||||
XANTENNA__456__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XANTENNA__461__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_470_ _413_/A1 _470_/D _343_/S VGND VGND VPWR VPWR _470_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
XPHY_38 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_27 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_16 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_384_ _383_/X _436_/Q _467_/Q VGND VGND VPWR VPWR _384_/X sky130_fd_sc_hd__mux2_1
|
||||
X_453_ _453_/CLK _453_/D _343_/S VGND VGND VPWR VPWR _453_/Q sky130_fd_sc_hd__dfrtp_1
|
||||
XANTENNA_clkbuf_0_ext_clk_A ext_clk VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_367_ _458_/Q _367_/B VGND VGND VPWR VPWR _367_/X sky130_fd_sc_hd__xor2_1
|
||||
X_298_ _449_/Q VGND VGND VPWR VPWR _299_/B sky130_fd_sc_hd__inv_2
|
||||
X_436_ _354_/Y _436_/D _343_/S VGND VGND VPWR VPWR _436_/Q sky130_fd_sc_hd__dfrtp_4
|
||||
X_221_ _221_/A _221_/B _463_/Q VGND VGND VPWR VPWR _347_/A sky130_fd_sc_hd__nand3_1
|
||||
X_419_ _413_/A1 _438_/Q VGND VGND VPWR VPWR _419_/Q sky130_fd_sc_hd__dfxtp_1
|
||||
X_204_ _410_/X _469_/Q _436_/Q VGND VGND VPWR VPWR _205_/A sky130_fd_sc_hd__mux2_1
|
||||
XANTENNA__421__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_18_71 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_301__4 _453_/CLK VGND VGND VPWR VPWR _449_/CLK sky130_fd_sc_hd__inv_2
|
||||
XANTENNA__425__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_20_83 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XPHY_17 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_28 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_39 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_383_ _265_/Y _436_/Q _408_/S VGND VGND VPWR VPWR _383_/X sky130_fd_sc_hd__mux2_1
|
||||
X_452_ _453_/CLK _452_/D _343_/S VGND VGND VPWR VPWR _452_/Q sky130_fd_sc_hd__dfstp_1
|
||||
XANTENNA__440__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_435_ _354_/Y _435_/D _343_/S VGND VGND VPWR VPWR _438_/D sky130_fd_sc_hd__dfrtp_1
|
||||
X_366_ _457_/Q _456_/Q VGND VGND VPWR VPWR _367_/B sky130_fd_sc_hd__nor2_1
|
||||
X_297_ _450_/Q VGND VGND VPWR VPWR _299_/A sky130_fd_sc_hd__inv_2
|
||||
X_220_ _464_/Q VGND VGND VPWR VPWR _221_/B sky130_fd_sc_hd__inv_2
|
||||
XANTENNA_input1_A ext_clk_sel VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
X_418_ _413_/A1 _437_/Q VGND VGND VPWR VPWR _418_/Q sky130_fd_sc_hd__dfxtp_1
|
||||
X_349_ _454_/Q _447_/Q VGND VGND VPWR VPWR _349_/Y sky130_fd_sc_hd__xnor2_1
|
||||
XANTENNA__444__SET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_9_30 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XFILLER_9_41 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
XANTENNA__465__RESET_B _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XFILLER_15_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
XANTENNA__343__S _343_/S VGND VGND VPWR VPWR sky130_fd_sc_hd__diode_2
|
||||
XPHY_29 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_18 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_15_84 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_451_ _411_/A1 _451_/D _343_/S VGND VGND VPWR VPWR _451_/Q sky130_fd_sc_hd__dfrtp_2
|
||||
X_382_ _381_/X _431_/Q _443_/Q VGND VGND VPWR VPWR _382_/X sky130_fd_sc_hd__mux2_1
|
||||
X_365_ _457_/Q _456_/Q VGND VGND VPWR VPWR _365_/Y sky130_fd_sc_hd__xnor2_1
|
||||
X_434_ _354_/Y _434_/D _343_/S VGND VGND VPWR VPWR _437_/D sky130_fd_sc_hd__dfstp_1
|
||||
X_296_ _448_/Q _330_/B _397_/X VGND VGND VPWR VPWR _296_/Y sky130_fd_sc_hd__nand3b_1
|
||||
X_417_ _413_/A1 _436_/Q VGND VGND VPWR VPWR _417_/Q sky130_fd_sc_hd__dfxtp_1
|
||||
X_279_ _345_/A _279_/B _279_/C VGND VGND VPWR VPWR _285_/A sky130_fd_sc_hd__nand3b_1
|
||||
X_348_ _432_/Q _431_/Q VGND VGND VPWR VPWR _411_/S sky130_fd_sc_hd__nor2_1
|
||||
XFILLER_9_53 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_20_41 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XPHY_19 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
X_450_ _453_/CLK _450_/D _343_/S VGND VGND VPWR VPWR _450_/Q sky130_fd_sc_hd__dfrtn_1
|
||||
X_381_ _355_/Y _431_/Q _406_/S VGND VGND VPWR VPWR _381_/X sky130_fd_sc_hd__mux2_1
|
||||
X_433_ _354_/Y _433_/D _343_/S VGND VGND VPWR VPWR _436_/D sky130_fd_sc_hd__dfrtp_1
|
||||
XFILLER_3_55 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_295_ _443_/Q _293_/Y _294_/Y VGND VGND VPWR VPWR _295_/Y sky130_fd_sc_hd__o21bai_1
|
||||
X_364_ _364_/A _444_/Q VGND VGND VPWR VPWR _403_/S sky130_fd_sc_hd__nand2_1
|
||||
XFILLER_5_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_1
|
||||
X_278_ _432_/Q _431_/Q _430_/Q VGND VGND VPWR VPWR _279_/C sky130_fd_sc_hd__o21a_1
|
||||
X_416_ _453_/CLK _432_/Q VGND VGND VPWR VPWR _416_/Q sky130_fd_sc_hd__dfxtp_1
|
||||
X_347_ _347_/A VGND VGND VPWR VPWR _391_/S sky130_fd_sc_hd__inv_2
|
||||
XFILLER_0_23 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_18_85 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_4
|
||||
XFILLER_20_75 VGND VGND VPWR VPWR sky130_fd_sc_hd__fill_2
|
||||
XFILLER_20_53 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_3
|
||||
XFILLER_20_3 VGND VGND VPWR VPWR sky130_fd_sc_hd__decap_12
|
||||
X_380_ _379_/X _436_/Q _467_/Q VGND VGND VPWR VPWR _380_/X sky130_fd_sc_hd__mux2_1
|
||||
.ends
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue