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359 Commits

Author SHA1 Message Date
Clifford Wolf 462b22f44f dict<> ref vs insert bugfix 2015-01-06 00:16:44 +01:00
Clifford Wolf 11c3b81c08 typo fix for "opt -fast" 2014-12-30 22:35:38 +01:00
Clifford Wolf c64b1de11d Fixed build with SMALL=1 2014-12-30 11:41:24 +01:00
Clifford Wolf 29a555ec7e Added statehash to ezSAT 2014-12-29 17:10:37 +01:00
Clifford Wolf 3ff0d04555 Cleanups in opt_clean 2014-12-29 05:11:06 +01:00
Clifford Wolf 7d843adef9 dict/pool changes in opt_clean 2014-12-29 04:06:52 +01:00
Clifford Wolf cfe0817697 Converting "share" to dict<> and pool<> complete 2014-12-29 02:01:42 +01:00
Clifford Wolf 9ff3a9f30d Switched most of "share" to dict<> and pool<> 2014-12-29 00:42:48 +01:00
Clifford Wolf 445686cba3 using dict and pool in opt_reduce 2014-12-28 21:27:05 +01:00
Clifford Wolf 951c72ba52 bugfix in opt_share 2014-12-28 21:26:36 +01:00
Clifford Wolf 3da46d3437 Renamed hashmap.h to hashlib.h, some related improvements 2014-12-28 17:51:16 +01:00
Clifford Wolf 6c8b0a5fd1 More dict/pool related changes 2014-12-27 12:02:57 +01:00
Clifford Wolf 66ab88d7b0 More hashtable finetuning 2014-12-27 03:04:50 +01:00
Clifford Wolf ec4751e55c Replaced std::unordered_set (nodict) with Yosys::pool 2014-12-26 21:59:41 +01:00
Clifford Wolf 9e6fb0b02c Replaced std::unordered_map as implementation for Yosys::dict 2014-12-26 21:35:22 +01:00
Clifford Wolf a6c96b986b Added Yosys::{dict,nodict,vector} container types 2014-12-26 10:53:21 +01:00
Clifford Wolf edb3c9d0c4 Renamed extend() to extend_xx(), changed most users to extend_u0() 2014-12-24 09:51:17 +01:00
Clifford Wolf 546e8b5fe7 Improved TopoSort determinism 2014-11-07 15:21:03 +01:00
Clifford Wolf ab28491f27 Added "opt -full" alias for all more aggressive optimizations 2014-10-31 03:36:51 +01:00
Clifford Wolf 84ffe04075 Fixed various VS warnings 2014-10-18 15:20:38 +02:00
Clifford Wolf 18cb8b4636 Don't be too smart with $dff cells with "init" attribute on out signal 2014-10-16 11:49:31 +02:00
Clifford Wolf 66eb254fc2 Some cleanups in opt_clean 2014-10-16 11:46:57 +02:00
William Speirs 6433203b39 Wrapped init in std::set constructor 2014-10-15 00:58:05 +02:00
Clifford Wolf 35fbc0b35f Do not the 'z' modifier in format string (another win32 fix) 2014-10-11 11:42:08 +02:00
Clifford Wolf 4569a747f8 Renamed SIZE() to GetSize() because of name collision on Win32 2014-10-10 17:07:24 +02:00
Clifford Wolf c5c7066ea6 sat encoding for exclusive $pmux ctrl inputs in "share" pass 2014-10-03 19:01:24 +02:00
Clifford Wolf 3e4b0cac8d added resource sharing of $macc cells 2014-10-03 12:58:40 +02:00
Clifford Wolf c3e779a65f Added $_BUF_ cell type 2014-10-03 10:12:28 +02:00
Clifford Wolf 600c6cb013 remove buffers in opt_clean 2014-10-03 10:04:15 +02:00
Clifford Wolf 7019bc00e4 resource sharing of $alu cells 2014-10-03 09:55:50 +02:00
Clifford Wolf 0b8cfbc6fd Added support for "keep" on modules 2014-09-29 12:51:54 +02:00
Clifford Wolf f9a307a50b namespace Yosys 2014-09-27 16:17:53 +02:00
Clifford Wolf 13117bb346 Re-enabled assert for new logic loops in "share" pass 2014-09-21 19:44:08 +02:00
Clifford Wolf 96e821dc6c Various improvements regarding logic loops in "share" results 2014-09-21 19:36:56 +02:00
Clifford Wolf d6e2ace95b Logic loop bugfix for "share" pass 2014-09-21 15:13:44 +02:00
Clifford Wolf b28be0759f Added "share -limit" 2014-09-21 15:13:06 +02:00
Clifford Wolf a6c08b40fe Still loop bug in "share": changed assert to warning 2014-09-21 14:51:07 +02:00
Clifford Wolf 8d60754aef Do not introduce new logic loops in "share" 2014-09-21 13:52:39 +02:00
Clifford Wolf edf11c635a Assert on new logic loops in "share" pass 2014-09-21 12:57:33 +02:00
Clifford Wolf 2cbdbaad1f Fixed wreduce $shiftx handling 2014-09-15 11:29:09 +02:00
Clifford Wolf aab0e3bf70 Cleanup in wreduce 2014-09-14 10:01:30 +02:00
Ruben Undheim 79cbf9067c Corrected spelling mistakes found by lintian 2014-09-06 08:47:06 +02:00
Clifford Wolf f5a40e7043 Fixed "opt_const -fine" for $pos cells 2014-09-04 08:55:58 +02:00
Clifford Wolf 8927aa6148 Removed $bu0 cell type 2014-09-04 02:07:52 +02:00
Clifford Wolf d5148f2e01 Moved "share" and "wreduce" to passes/opt/ 2014-09-01 11:45:26 +02:00
Clifford Wolf e07698818d Using std::vector<RTLIL::State> instead of RTLIL::Const for RTLIL::SigChunk::data 2014-09-01 11:36:02 +02:00
Clifford Wolf 2a1b08aeb3 Added design->scratchpad 2014-08-30 19:37:12 +02:00
Clifford Wolf 7bbbe3580d Optimize shift ops with constant rhs in opt_const 2014-08-24 17:08:43 +02:00
Clifford Wolf 641501203c Added some additional log messages to opt_const 2014-08-24 17:08:43 +02:00
Clifford Wolf 410d043dd8 Renamed toposort.h to utils.h 2014-08-17 00:55:35 +02:00
Clifford Wolf eb17fbade5 Added "opt -fast" 2014-08-16 15:34:15 +02:00
Clifford Wolf f092b50148 Renamed $_INV_ cell type to $_NOT_ 2014-08-15 14:11:40 +02:00
Clifford Wolf ca87116449 More idstring sort_by_* helpers and fixed tpl ordering in techmap 2014-08-15 02:40:46 +02:00
Clifford Wolf 13f2f36884 RIP $safe_pmux 2014-08-14 11:39:46 +02:00
Clifford Wolf 8fd1c269ac Fixed a performance bug in opt_reduce 2014-08-02 15:12:16 +02:00
Clifford Wolf b9bd22b8c8 More cleanups related to RTLIL::IdString usage 2014-08-02 13:19:57 +02:00
Clifford Wolf bd74ed7da4 Replaced sha1 implementation 2014-08-01 19:01:10 +02:00
Clifford Wolf cdae8abe16 Renamed port access function on RTLIL::Cell, added param access functions 2014-07-31 16:38:54 +02:00
Clifford Wolf 397b00252d Added $shift and $shiftx cell types (needed for correct part select behavior) 2014-07-29 16:35:13 +02:00
Clifford Wolf 7bd2d1064f Using log_assert() instead of assert() 2014-07-28 11:27:48 +02:00
Clifford Wolf 0c86d6106c Added SigPool::check(bit) 2014-07-27 15:38:02 +02:00
Clifford Wolf 77a1462f2d Fixed bug in opt_clean 2014-07-27 15:13:29 +02:00
Clifford Wolf d07a871d35 Improved performance of opt_const on large modules 2014-07-27 14:50:25 +02:00
Clifford Wolf dbb3556e3f Fixed a bug in opt_clean and some RTLIL API usage cleanups 2014-07-27 13:19:05 +02:00
Clifford Wolf 49f72421d5 Using new obj iterator API in a few places 2014-07-27 11:32:42 +02:00
Clifford Wolf 10e5791c5e Refactoring: Renamed RTLIL::Design::modules to modules_ 2014-07-27 11:18:30 +02:00
Clifford Wolf 4c4b602156 Refactoring: Renamed RTLIL::Module::cells to cells_ 2014-07-27 01:51:45 +02:00
Clifford Wolf f9946232ad Refactoring: Renamed RTLIL::Module::wires to wires_ 2014-07-27 01:49:51 +02:00
Clifford Wolf 946ddff9ce Changed a lot of code to the new RTLIL::Wire constructors 2014-07-26 20:12:50 +02:00
Clifford Wolf 3f4e3ca8ad More RTLIL::Cell API usage cleanups 2014-07-26 16:14:02 +02:00
Clifford Wolf 97a59851a6 Added RTLIL::Cell::has(portname) 2014-07-26 16:11:28 +02:00
Clifford Wolf f8fdc47d33 Manual fixes for new cell connections API 2014-07-26 15:58:23 +02:00
Clifford Wolf b7dda72302 Changed users of cell->connections_ to the new API (sed command) 
git grep -l 'connections_' | xargs sed -i -r -e '
	s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
	s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
	s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
	s/(->|\.)connections_.push_back/\1connect/g;
	s/(->|\.)connections_/\1connections()/g;'
 2014-07-26 15:58:23 +02:00
Clifford Wolf cc4f10883b Renamed RTLIL::{Module,Cell}::connections to connections_ 2014-07-26 11:58:03 +02:00
Clifford Wolf 2bec47a404 Use only module->addCell() and module->remove() to create and delete cells 2014-07-25 17:56:19 +02:00
Clifford Wolf 0520bfea89 Fixed memory corruption in "opt_reduce" pass 2014-07-25 12:49:51 +02:00
Clifford Wolf 6aa792c864 Replaced more old SigChunk programming patterns 2014-07-24 23:10:58 +02:00
Clifford Wolf 9962384d3e Added cover() calls to opt_const 2014-07-24 20:47:18 +02:00
Clifford Wolf c094c53de8 Removed RTLIL::SigSpec::optimize() 2014-07-23 20:32:28 +02:00
Clifford Wolf a62c21c9c6 Removed RTLIL::SigSpec::expand() method 2014-07-23 19:34:51 +02:00
Clifford Wolf ec923652e2 Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3 2014-07-23 09:52:55 +02:00
Clifford Wolf a8d3a68971 Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3 2014-07-23 09:49:43 +02:00
Clifford Wolf 28b3fd05fa SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw() 2014-07-22 20:58:44 +02:00
Clifford Wolf 4b4048bc5f SigSpec refactoring: using the accessor functions everywhere 2014-07-22 20:39:37 +02:00
Clifford Wolf a233762a81 SigSpec refactoring: renamed chunks and width to __chunks and __width 2014-07-22 20:39:37 +02:00
Clifford Wolf 137dbf3cf7 Added "opt_const -keepdc" 2014-07-21 21:38:55 +02:00
Clifford Wolf 1873480ca5 Added mul to mux conversion to "opt_const -fine" 2014-07-21 17:19:50 +02:00
Clifford Wolf 1241a9fd50 Added "opt_const -fine" and "opt_reduce -fine" 2014-07-21 16:34:16 +02:00
Clifford Wolf e035f1d886 Added opt_const support for simple identities 2014-07-21 14:41:02 +02:00
Clifford Wolf 309ae98246 Apply opt_reduce WR_EN opts to the whole mux tree driving the WR_EN port 2014-07-18 10:28:45 +02:00
Clifford Wolf 1b00861d0a Improved opt_reduce handling of mem wr_en mux bits 2014-07-17 12:12:04 +02:00
Clifford Wolf d678b6533d improved opt_reduce for $mem/$memwr WR_EN multiplexers 2014-07-16 14:08:51 +02:00
Clifford Wolf 68c059565a Fixed bug in opt_reduce (see vloghammer issue_044) 2014-05-12 12:45:47 +02:00
Clifford Wolf 9a34486bfb Fixed performance problem in opt_mux with nets driven by many conflicting drivers 2014-03-19 10:05:01 +01:00
Clifford Wolf 9b9c3327cc Fixed undef handling in opt_reduce 2014-03-06 14:18:34 +01:00
Clifford Wolf 9e99984336 Fixed const folding of $bu0 cells 2014-02-27 04:09:32 +01:00
Clifford Wolf 548519875b Fixed bug (typo) in passes/opt/opt_const.cc 2014-02-22 17:07:22 +01:00
Clifford Wolf 28e14ee50a Fixed handling of "keep" attribute on wires in opt_clean 2014-02-16 21:58:27 +01:00
Clifford Wolf 67effc9f5b Fixed opt_const handling of double invert with non-1 output width 2014-02-15 13:16:08 +01:00
Clifford Wolf 82c98bbbe6 Added opt -purge (frontend to opt_clean -purge) 2014-02-08 14:21:34 +01:00
Clifford Wolf 922d1c9520 Only count non-trivial attributes when findinf master signal in opt_clean 2014-02-08 14:21:04 +01:00
Clifford Wolf 274bcef66c Improved detection of primary wire for a signal in opt_clean 2014-02-07 23:50:17 +01:00
Clifford Wolf 594d52e0b6 Added opt_const -undriven 2014-02-06 15:49:03 +01:00
Clifford Wolf 99b9c56da1 Fixed detection of init attribute in opt_rmdff 2014-02-04 23:00:32 +01:00
Clifford Wolf ecdf1f5577 Improved handling of reg init in opt_share and opt_rmdff 2014-02-04 12:02:47 +01:00
Clifford Wolf de336d93b2 More opt_const -mux_bool features 2014-02-02 22:41:24 +01:00
Clifford Wolf 9d0b69edaa Added opt_const -mux_bool 2014-02-02 22:11:08 +01:00
Clifford Wolf bee4450c4c Added support for inverter chains to opt_const 2014-02-02 21:46:42 +01:00
Clifford Wolf 83fa652820 Added constant-clock case to opt_rmdff 2014-02-02 21:09:08 +01:00
Clifford Wolf 1e67099b77 Added $assert cell 2014-01-19 14:03:40 +01:00
Clifford Wolf 2e370d5a2f Added support for $adff with undef data inputs to opt_rmdff 2014-01-17 16:42:40 +01:00
Clifford Wolf 54275c61ee Added "opt_const -mux_undef" 2014-01-14 11:10:29 +01:00
Clifford Wolf bd39263796 Improved $_MUX_ handling in opt_const 2013-12-28 10:30:31 +01:00
Clifford Wolf d81e3ed3ae More conservastive $eq/$ne/$eqx/$nex opt_const code 2013-12-28 10:29:22 +01:00
Clifford Wolf c9699fe76d More $eq/$ne/$eqx/$nex fixes in opt_const 2013-12-27 15:18:14 +01:00
Clifford Wolf 7b02a44efb Fixed/improved opt_const $eq/$ne/$eqx/$nex handling 2013-12-27 14:21:24 +01:00
Clifford Wolf 369bf81a70 Added support for non-const === and !== (for miter circuits) 2013-12-27 14:20:15 +01:00
Clifford Wolf e5b974fa2a Cleanups and bugfixes in response to new internal cell checker 2013-11-11 00:39:45 +01:00
Clifford Wolf b04051a0e2 Fixed keep attribute on wires in opt_clean 2013-11-08 05:20:15 +01:00
Clifford Wolf 947bd9b96b Renamed extend_un0() to extend_u0() and use it in genrtlil 2013-11-07 18:17:10 +01:00
Clifford Wolf 0e1661f84e Fixed type of sign extension in opt_const $eq/$ne handling 2013-11-07 16:53:28 +01:00
Clifford Wolf db42a8f89b Fixed $eq/$ne bitwise optimization in opt_const 2013-11-07 11:54:59 +01:00
Clifford Wolf 1d34fd7608 Added support for "keep" attributes on wires 2013-11-05 15:52:29 +01:00
Clifford Wolf e679a5d046 Fixed handling of boolean attributes (passes) 2013-10-24 11:37:54 +02:00
Clifford Wolf 8cc53ef72c Only prefer connected signals iff they have public names 2013-10-17 22:10:55 +02:00
Clifford Wolf c20571ca5e Avoid re-arranging signals on register outputs 2013-10-17 20:48:40 +02:00
Clifford Wolf f5c0ed6c79 Fixed detection of major wires in opt_clean 2013-10-17 02:41:59 +02:00
Clifford Wolf 96e7abad48 Added iopadmap pass 2013-10-16 16:16:06 +02:00
Clifford Wolf a5836af172 Added "clean -purge" and ";;;" support 2013-08-11 13:59:14 +02:00
Clifford Wolf 080f0aac34 Added ";;" as shortcut for "; clean;" 2013-08-11 13:33:38 +02:00
Clifford Wolf 05483619f0 Some fixes to improve determinism 2013-08-09 12:42:32 +02:00
Clifford Wolf 8cd153612e Added "clean" command (less verbose opt_clean) 2013-08-08 10:53:37 +02:00
Clifford Wolf e729857647 Improved handling of private names in opt_clean and rename commands 2013-08-07 18:39:49 +02:00
Clifford Wolf a9fefc6ce1 Bugfixes for empty signal vectors 2013-07-10 12:52:29 +02:00
Clifford Wolf cf885c4a28 Added opt_clean -purge option 2013-07-07 12:59:30 +02:00
Clifford Wolf 0c0197cf45 Fixed handling of $eq and $ne in opt_const 2013-07-07 12:59:00 +02:00
Clifford Wolf c32b918681 Renamed opt_rmunused to opt_clean 2013-06-05 07:07:31 +02:00
Clifford Wolf ccd2a93439 Added log_abort() api 2013-05-24 12:32:06 +02:00
Clifford Wolf f674150f1c Fixed memory corruption bug in opt_rmunused 2013-05-23 13:19:28 +02:00
Clifford Wolf 3b8882ae49 Some improvements in opt_rmdff 2013-05-23 07:48:18 +02:00
Clifford Wolf 3ecc314238 Fixed to aggressive x-folding in opt_const 2013-05-17 14:55:18 +02:00
Clifford Wolf c6198ea5a8 Fixed a bug in opt_const when optimizing 1-bit compares with constants 2013-04-13 21:18:24 +02:00
Clifford Wolf 88af5b6a16 Improved opt_share for reduce cells 2013-03-29 11:19:21 +01:00
Clifford Wolf 0d48b846ac Improved opt_share for commutative standard cells 2013-03-29 11:01:26 +01:00
Clifford Wolf 9f10acb840 added optimizations for single-bit $eq/$ne with constant input to opt_const 2013-03-19 13:33:33 +01:00
Clifford Wolf d8a7fa6b67 improved $mux optimization in opt_const 2013-03-19 13:32:39 +01:00
Clifford Wolf b7fcf1fb9a keep $mux and $_MUX_ optimizations separate in opt_const 2013-03-19 13:32:04 +01:00
Johann Glaser 69674652c5 added one more suggestion to optimize MUXes in pass "opt_const" 2013-03-18 22:06:16 +01:00
Johann Glaser a4e2c887f1 also optimize single-bit "$mux" cells in pass "opt_const", added suggestions 
for more optimizations
 2013-03-18 22:05:21 +01:00
Johann Glaser cd8008bda0 fixed typos 2013-03-18 07:28:31 +01:00
Clifford Wolf 55f927eecb Fixed detection of public wires in opt_rmunused 2013-03-10 14:20:03 +01:00
Clifford Wolf b96ffed69b Automatically select new objects in abc and techmap passes 2013-03-08 09:16:25 +01:00
Clifford Wolf 45bfe26f5f Minor hotfixes (mostly gcc build fixes) 2013-03-03 13:18:37 +01:00
Clifford Wolf a338d1a082 Added help messages for fsm_* passes 2013-03-01 12:35:12 +01:00
Clifford Wolf 36954471a6 Added help messages for opt_* passes 2013-03-01 09:01:49 +01:00
Clifford Wolf 1bbc2b34c8 Added support for simple gates with one constant input to opt_const 2013-02-27 18:00:01 +01:00
Clifford Wolf f28b6aff40 Implemented basic functionality of "extract" pass 2013-02-27 16:27:20 +01:00
Clifford Wolf a321a5c412 Moved stand-alone libs to libs/ directory and added libs/subcircuit 2013-02-27 09:32:19 +01:00
Clifford Wolf 7764d0ba1d initial import 2013-01-05 11:13:26 +01:00