mirror of https://github.com/YosysHQ/yosys.git
Converting "share" to dict<> and pool<> complete
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cfe0817697
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@ -76,6 +76,17 @@ template<> struct hash_ops<std::string> {
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}
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};
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template<typename P, typename Q> struct hash_ops<std::pair<P, Q>> {
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bool cmp(std::pair<P, Q> a, std::pair<P, Q> b) const {
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return a == b;
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}
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unsigned int hash(std::pair<P, Q> a) const {
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hash_ops<P> p_ops;
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hash_ops<Q> q_ops;
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return mkhash(p_ops.hash(a.first), q_ops.hash(a.second));
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}
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};
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struct hash_cstr_ops {
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bool cmp(const char *a, const char *b) const {
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for (int i = 0; a[i] || b[i]; i++)
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@ -219,8 +219,8 @@ namespace RTLIL
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return index_;
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}
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// The following is a helper key_compare class. Instead of for example pool<Cell*>
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// use pool<Cell*, IdString::compare_ptr_by_name<Cell>> if the order of cells in the
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// The following is a helper key_compare class. Instead of for example std::set<Cell*>
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// use std::set<Cell*, IdString::compare_ptr_by_name<Cell>> if the order of cells in the
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// set has an influence on the algorithm.
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template<typename T> struct compare_ptr_by_name {
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@ -450,6 +450,13 @@ struct RTLIL::Const
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std::string decode_string() const;
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inline int size() const { return bits.size(); }
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inline unsigned int hash() const {
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unsigned int h = 5381;
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for (auto b : bits)
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mkhash(h, b);
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return h;
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}
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};
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struct RTLIL::SigChunk
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@ -28,6 +28,7 @@ USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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typedef RTLIL::IdString::compare_ptr_by_name<RTLIL::Cell> cell_ptr_cmp;
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typedef std::pair<RTLIL::SigSpec, RTLIL::Const> ssc_pair_t;
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struct ShareWorkerConfig
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{
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@ -35,7 +36,7 @@ struct ShareWorkerConfig
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bool opt_force;
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bool opt_aggressive;
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bool opt_fast;
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std::set<RTLIL::IdString> generic_uni_ops, generic_bin_ops, generic_cbin_ops, generic_other_ops;
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pool<RTLIL::IdString> generic_uni_ops, generic_bin_ops, generic_cbin_ops, generic_other_ops;
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};
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struct ShareWorker
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@ -50,8 +51,8 @@ struct ShareWorker
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ModWalker modwalker;
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ModIndex mi;
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std::set<RTLIL::Cell*> cells_to_remove;
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std::set<RTLIL::Cell*> recursion_state;
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pool<RTLIL::Cell*> cells_to_remove;
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pool<RTLIL::Cell*> recursion_state;
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SigMap topo_sigmap;
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std::map<RTLIL::Cell*, std::set<RTLIL::Cell*, cell_ptr_cmp>, cell_ptr_cmp> topo_cell_drivers;
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@ -64,11 +65,11 @@ struct ShareWorker
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// Find terminal bits -- i.e. bits that do not (exclusively) feed into a mux tree
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// ------------------------------------------------------------------------------
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std::set<RTLIL::SigBit> terminal_bits;
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pool<RTLIL::SigBit> terminal_bits;
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void find_terminal_bits()
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{
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std::set<RTLIL::SigBit> queue_bits;
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pool<RTLIL::SigBit> queue_bits;
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pool<RTLIL::Cell*> visited_cells;
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queue_bits.insert(modwalker.signal_outputs.begin(), modwalker.signal_outputs.end());
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@ -718,12 +719,12 @@ struct ShareWorker
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// Finding forbidden control inputs for a cell
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// -------------------------------------------
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dict<RTLIL::Cell*, std::set<RTLIL::SigBit>> forbidden_controls_cache;
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std::map<RTLIL::Cell*, pool<RTLIL::SigBit>, cell_ptr_cmp> forbidden_controls_cache;
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const std::set<RTLIL::SigBit> &find_forbidden_controls(RTLIL::Cell *cell)
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const pool<RTLIL::SigBit> &find_forbidden_controls(RTLIL::Cell *cell)
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{
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if (recursion_state.count(cell)) {
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static std::set<RTLIL::SigBit> empty_controls_set;
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static pool<RTLIL::SigBit> empty_controls_set;
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return empty_controls_set;
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}
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@ -745,7 +746,7 @@ struct ShareWorker
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for (auto c : consumer_cells)
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if (fwd_ct.cell_known(c->type)) {
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const std::set<RTLIL::SigBit> &bits = find_forbidden_controls(c);
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const pool<RTLIL::SigBit> &bits = find_forbidden_controls(c);
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forbidden_controls_cache[cell].insert(bits.begin(), bits.end());
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}
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@ -760,10 +761,9 @@ struct ShareWorker
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// Finding control inputs and activation pattern for a cell
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// --------------------------------------------------------
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// FIXME: For some reasone this must be std::map<> and not dict<>
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std::map<RTLIL::Cell*, std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>>> activation_patterns_cache;
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std::map<RTLIL::Cell*, pool<ssc_pair_t>, cell_ptr_cmp> activation_patterns_cache;
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bool sort_check_activation_pattern(std::pair<RTLIL::SigSpec, RTLIL::Const> &p)
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bool sort_check_activation_pattern(ssc_pair_t &p)
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{
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std::map<RTLIL::SigBit, RTLIL::State> p_bits;
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@ -787,16 +787,16 @@ struct ShareWorker
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return true;
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}
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void optimize_activation_patterns(std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> & /* patterns */)
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void optimize_activation_patterns(pool<ssc_pair_t> & /* patterns */)
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{
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// TODO: Remove patterns that are contained in other patterns
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// TODO: Consolidate pairs of patterns that only differ in the value for one signal bit
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}
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const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &find_cell_activation_patterns(RTLIL::Cell *cell, const char *indent)
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const pool<ssc_pair_t> &find_cell_activation_patterns(RTLIL::Cell *cell, const char *indent)
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{
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if (recursion_state.count(cell)) {
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static std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> empty_patterns_set;
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static pool<ssc_pair_t> empty_patterns_set;
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return empty_patterns_set;
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}
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@ -810,7 +810,7 @@ struct ShareWorker
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{
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if (terminal_bits.count(bit)) {
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// Terminal cells are always active: unconditional activation pattern
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activation_patterns_cache[cell].insert(std::pair<RTLIL::SigSpec, RTLIL::Const>());
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activation_patterns_cache[cell].insert(ssc_pair_t());
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return activation_patterns_cache.at(cell);
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}
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for (auto &pbit : modwalker.signal_consumers[bit]) {
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@ -826,7 +826,7 @@ struct ShareWorker
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for (auto c : driven_data_muxes)
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{
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const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &c_patterns = find_cell_activation_patterns(c, indent);
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const pool<ssc_pair_t> &c_patterns = find_cell_activation_patterns(c, indent);
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bool used_in_a = false;
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std::set<int> used_in_b_parts;
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@ -861,7 +861,7 @@ struct ShareWorker
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}
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for (auto c : driven_cells) {
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const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &c_patterns = find_cell_activation_patterns(c, indent);
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const pool<ssc_pair_t> &c_patterns = find_cell_activation_patterns(c, indent);
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activation_patterns_cache[cell].insert(c_patterns.begin(), c_patterns.end());
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}
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@ -879,7 +879,7 @@ struct ShareWorker
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return activation_patterns_cache[cell];
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}
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RTLIL::SigSpec bits_from_activation_patterns(const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &activation_patterns)
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RTLIL::SigSpec bits_from_activation_patterns(const pool<ssc_pair_t> &activation_patterns)
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{
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std::set<RTLIL::SigBit> all_bits;
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for (auto &it : activation_patterns) {
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@ -894,13 +894,13 @@ struct ShareWorker
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return signal;
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}
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void filter_activation_patterns(std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &out,
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const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &in, const std::set<RTLIL::SigBit> &filter_bits)
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void filter_activation_patterns(pool<ssc_pair_t> &out,
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const pool<ssc_pair_t> &in, const std::set<RTLIL::SigBit> &filter_bits)
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{
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for (auto &p : in)
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{
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std::vector<RTLIL::SigBit> p_first = p.first;
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std::pair<RTLIL::SigSpec, RTLIL::Const> new_p;
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ssc_pair_t new_p;
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for (int i = 0; i < GetSize(p_first); i++)
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if (filter_bits.count(p_first[i]) == 0) {
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@ -912,7 +912,7 @@ struct ShareWorker
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}
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}
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RTLIL::SigSpec make_cell_activation_logic(const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &activation_patterns, pool<RTLIL::Cell*> &supercell_aux)
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RTLIL::SigSpec make_cell_activation_logic(const pool<ssc_pair_t> &activation_patterns, pool<RTLIL::Cell*> &supercell_aux)
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{
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RTLIL::Wire *all_cases_wire = module->addWire(NEW_ID, 0);
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@ -1050,6 +1050,14 @@ struct ShareWorker
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// Setup and run
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// -------------
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void remove_cell(Cell *cell)
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{
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shareable_cells.erase(cell);
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forbidden_controls_cache.erase(cell);
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activation_patterns_cache.erase(cell);
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module->remove(cell);
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}
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ShareWorker(ShareWorkerConfig config, RTLIL::Design *design, RTLIL::Module *module) :
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config(config), design(design), module(module), mi(module)
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{
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@ -1097,7 +1105,7 @@ struct ShareWorker
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log(" Analyzing resource sharing options for %s:\n", log_id(cell));
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const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &cell_activation_patterns = find_cell_activation_patterns(cell, " ");
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const pool<ssc_pair_t> &cell_activation_patterns = find_cell_activation_patterns(cell, " ");
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RTLIL::SigSpec cell_activation_signals = bits_from_activation_patterns(cell_activation_patterns);
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if (cell_activation_patterns.empty()) {
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@ -1106,7 +1114,7 @@ struct ShareWorker
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continue;
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}
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if (cell_activation_patterns.count(std::pair<RTLIL::SigSpec, RTLIL::Const>())) {
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if (cell_activation_patterns.count(ssc_pair_t())) {
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log(" Cell is always active. Therefore no sharing is possible.\n");
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continue;
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}
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@ -1130,7 +1138,7 @@ struct ShareWorker
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{
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log(" Analyzing resource sharing with %s:\n", log_id(other_cell));
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const std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> &other_cell_activation_patterns = find_cell_activation_patterns(other_cell, " ");
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const pool<ssc_pair_t> &other_cell_activation_patterns = find_cell_activation_patterns(other_cell, " ");
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RTLIL::SigSpec other_cell_activation_signals = bits_from_activation_patterns(other_cell_activation_patterns);
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if (other_cell_activation_patterns.empty()) {
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@ -1140,7 +1148,7 @@ struct ShareWorker
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continue;
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}
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if (other_cell_activation_patterns.count(std::pair<RTLIL::SigSpec, RTLIL::Const>())) {
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if (other_cell_activation_patterns.count(ssc_pair_t())) {
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log(" Cell is always active. Therefore no sharing is possible.\n");
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shareable_cells.erase(other_cell);
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continue;
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@ -1149,8 +1157,8 @@ struct ShareWorker
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log(" Found %d activation_patterns using ctrl signal %s.\n",
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GetSize(other_cell_activation_patterns), log_signal(other_cell_activation_signals));
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const std::set<RTLIL::SigBit> &cell_forbidden_controls = find_forbidden_controls(cell);
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const std::set<RTLIL::SigBit> &other_cell_forbidden_controls = find_forbidden_controls(other_cell);
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const pool<RTLIL::SigBit> &cell_forbidden_controls = find_forbidden_controls(cell);
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const pool<RTLIL::SigBit> &other_cell_forbidden_controls = find_forbidden_controls(other_cell);
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std::set<RTLIL::SigBit> union_forbidden_controls;
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union_forbidden_controls.insert(cell_forbidden_controls.begin(), cell_forbidden_controls.end());
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@ -1159,8 +1167,8 @@ struct ShareWorker
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if (!union_forbidden_controls.empty())
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log(" Forbidden control signals for this pair of cells: %s\n", log_signal(union_forbidden_controls));
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std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> filtered_cell_activation_patterns;
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std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> filtered_other_cell_activation_patterns;
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pool<ssc_pair_t> filtered_cell_activation_patterns;
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pool<ssc_pair_t> filtered_other_cell_activation_patterns;
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filter_activation_patterns(filtered_cell_activation_patterns, cell_activation_patterns, union_forbidden_controls);
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filter_activation_patterns(filtered_other_cell_activation_patterns, other_cell_activation_patterns, union_forbidden_controls);
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@ -1305,11 +1313,11 @@ struct ShareWorker
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cells_to_remove.erase(other_cell);
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shareable_cells.insert(other_cell);
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for (auto cc : supercell_aux)
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module->remove(cc);
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remove_cell(cc);
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continue;
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}
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std::set<std::pair<RTLIL::SigSpec, RTLIL::Const>> supercell_activation_patterns;
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pool<ssc_pair_t> supercell_activation_patterns;
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supercell_activation_patterns.insert(filtered_cell_activation_patterns.begin(), filtered_cell_activation_patterns.end());
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supercell_activation_patterns.insert(filtered_other_cell_activation_patterns.begin(), filtered_other_cell_activation_patterns.end());
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optimize_activation_patterns(supercell_activation_patterns);
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log("Removing %d cells in module %s:\n", GetSize(cells_to_remove), log_id(module));
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for (auto c : cells_to_remove) {
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log(" Removing cell %s (%s).\n", log_id(c), log_id(c->type));
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module->remove(c);
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remove_cell(c);
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}
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}
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