mirror of https://github.com/YosysHQ/yosys.git
Fixed wreduce $shiftx handling
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@ -186,7 +186,7 @@ struct WreduceWorker
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bool port_a_signed = false;
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bool port_b_signed = false;
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if (max_port_a_size >= 0)
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if (max_port_a_size >= 0 && cell->type != "$shiftx")
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run_reduce_inport(cell, 'A', max_port_a_size, port_a_signed, did_something);
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if (max_port_b_size >= 0)
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