Merge pull request #1225 from JanMatCodasip/jm-codasip/fix-datatypes-around-program

Fix data types around opcodes.h and program.{c,h}

.checkpatch.conf

@@ -17,7 +17,6 @@
 --ignore LINE_SPACING
 --ignore LOGICAL_CONTINUATIONS
 --ignore MACRO_WITH_FLOW_CONTROL
---ignore NEW_TYPEDEFS
 --ignore PARENTHESIS_ALIGNMENT
 --ignore PREFER_DEFINED_ATTRIBUTE_MACRO
 --ignore PREFER_FALLTHROUGH

.github/workflows/checkpatch.yml

@@ -10,7 +10,7 @@ jobs:
       BUILD_DIR: ../build
     steps:
       - name: Checkout Code
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4
         with:
             fetch-depth: 0
       - name: Checkout Base
@@ -23,10 +23,4 @@ jobs:
             sudo apt-get install patchutils python3-ply python3-git
       - name: Run checkpatch
         run: |
-            git diff --patch FETCH_HEAD \
+            ./tools/scripts/checkpatch.pl --no-signoff --git FETCH_HEAD..HEAD
-            | filterdiff \
-                -x "a/src/jtag/drivers/libjaylink/*" \
-                -x "a/tools/git2cl/*" \
-                -x "a/.github/*" \
-                -x "a/HACKING" \
-            | ./tools/scripts/checkpatch.pl --no-signoff -

.github/workflows/linux-build.yml

@@ -9,13 +9,34 @@ jobs:
     env:
       CFLAGS: -m32
       CC: clang
+      PKG_CONFIG_PATH: /opt/libjim32/lib/pkgconfig
     steps:
-      - name: Checkout Code
-        uses: actions/checkout@v2
       - name: Install required packages (apt-get)
         run: |
           sudo apt-get update
           sudo apt-get install clang gcc-multilib
+      - name: Get 32-bit JIM TCL from cache
+        id: cache-libjim32
+        uses: actions/cache@v4
+        with:
+          path: /opt/libjim32
+          key: libjim32
+      - if: ${{ steps.cache-libjim32.outputs.cache-hit != 'true' }}
+        name: Checkout JIM TCL
+        uses: actions/checkout@v4
+        with:
+          repository: msteveb/jimtcl
+          ref: 0.83
+          path: jimtcl
+      - if: ${{ steps.cache-libjim32.outputs.cache-hit != 'true' }}
+        name: Build 32-bit JIM TCL from source
+        run: |
+          cd jimtcl
+          ./configure --prefix=/opt/libjim32 --with-ext=json --minimal --disable-ssl
+          make -j`nproc`
+          make install
+      - name: Checkout Code
+        uses: actions/checkout@v4
       - run: ./bootstrap
       - run: ./configure --enable-remote-bitbang --enable-jtag_vpi --disable-target64
       - run: make -j`nproc`
@@ -30,7 +51,7 @@ jobs:
       CC: gcc
     steps:
       - name: Checkout Code
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4
       - name: Configure environment
         run: |
           TAG=$(git rev-parse --short HEAD)
@@ -39,7 +60,7 @@ jobs:
       - name: Install required packages (apt-get)
         run: |
           sudo apt-get update
-          sudo apt-get install libusb-1.0-0 libusb-1.0-0-dev
+          sudo apt-get install libusb-1.0-0 libusb-1.0-0-dev libjim-dev
       - run: ./bootstrap
       - run: ./configure --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi-cjtag --prefix /tmp/${{ env.NAME }}
       - run: make -j`nproc`
@@ -55,7 +76,7 @@ jobs:
           make install
           tar zcvf ${{ env.NAME }}.tgz -C /tmp ${{ env.NAME }}
       - name: Upload Artifact
-        uses: actions/upload-artifact@v3
+        uses: actions/upload-artifact@v4
         with:
           name: ${{ env.NAME }}
           path: ${{ env.NAME }}.tgz

.github/workflows/snapshot.yml

@@ -18,7 +18,7 @@ jobs:
           sudo apt-get update
           sudo apt-get install autotools-dev autoconf automake libtool pkg-config cmake texinfo texlive g++-mingw-w64-i686
       - name: Checkout Code
-        uses: actions/checkout@v1
+        uses: actions/checkout@v4
       - run: ./bootstrap
       - name: Prepare libusb1
         env:
@@ -66,6 +66,14 @@ jobs:
           cd libjaylink-${LIBJAYLINK_VER}
           ./autogen.sh
           echo "LIBJAYLINK_SRC=$PWD" >> $GITHUB_ENV
+      - name: Prepare jimtcl
+        env:
+          JIMTCL_VER: 0.83
+        run: |
+          mkdir -p $DL_DIR && cd $DL_DIR
+          wget https://github.com/msteveb/jimtcl/archive/refs/tags/${JIMTCL_VER}.tar.gz
+          tar -xzf ${JIMTCL_VER}.tar.gz
+          echo "JIMTCL_SRC=$PWD/jimtcl-${JIMTCL_VER}" >> $GITHUB_ENV
       - name: Package OpenOCD for windows
         env:
           MAKE_JOBS: 2
@@ -75,6 +83,7 @@ jobs:
           LIBFTDI_CONFIG: -DSTATICLIBS=OFF -DEXAMPLES=OFF -DFTDI_EEPROM=OFF
           CAPSTONE_CONFIG: "CAPSTONE_BUILD_CORE_ONLY=yes CAPSTONE_STATIC=yes CAPSTONE_SHARED=no"
           LIBJAYLINK_CONFIG: --enable-shared --disable-static
+          JIMTCL_CONFIG: --with-ext=json --minimal --disable-ssl
         run: |
           # check if there is tag pointing at HEAD, otherwise take the HEAD SHA-1 as OPENOCD_TAG
           OPENOCD_TAG="`git tag --points-at HEAD`"
@@ -102,11 +111,11 @@ jobs:
           echo "IS_PRE_RELEASE=$IS_PRE_RELEASE" >> $GITHUB_ENV
           echo "ARTIFACT_PATH=$PWD/$ARTIFACT" >> $GITHUB_ENV
       - name: Publish OpenOCD packaged for windows
-        uses: actions/upload-artifact@v3
+        uses: actions/upload-artifact@v4
         with:
           path: ${{ env.ARTIFACT_PATH }}
       - name: Delete 'latest' Release
-        uses: dev-drprasad/delete-tag-and-release@v0.2.1
+        uses: dev-drprasad/delete-tag-and-release@v1.1
         with:
           delete_release: true
           tag_name: ${{ env.RELEASE_NAME }}

.github/workflows/spike-openocd-tests.yml

@@ -28,12 +28,12 @@ jobs:
     name: Test debug (Ubuntu)
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4
 
       - name: Install packages
         run: |
           sudo apt-get update
-          sudo apt-get install -y device-tree-compiler build-essential
+          sudo apt-get install -y device-tree-compiler build-essential libjim-dev
 
       - name: Get revisions of dependencies
         run: |
@@ -47,14 +47,14 @@ jobs:
 
       - name: Get the toolchain from cache (if available)
         id: cache-toolchain
-        uses: actions/cache@v3
+        uses: actions/cache@v4
         with:
           path: /opt/riscv/toolchain
           key: "toolchain-${{env.TOOLCHAIN_URL}}"
 
       - name: Get spike from cache (if available)
         id: cache-spike
-        uses: actions/cache@v3
+        uses: actions/cache@v4
         with:
           path: /opt/riscv/spike
           key: "spike-${{env.SPIKE_COMMIT}}"
@@ -130,7 +130,7 @@ jobs:
       - name: Archive test logs
         # Proceed even if there was a failed test
         if: ${{ success() || failure() }}
-        uses: actions/upload-artifact@v3
+        uses: actions/upload-artifact@v4
         with:
           name: test-logs
           path: riscv-tests/debug/logs

.gitignore

@@ -11,9 +11,9 @@
 *.la
 *.in
 
-# generated source files
+# coverage files (gcov)
-src/jtag/minidriver_imp.h
+*.gcda
-src/jtag/jtag_minidriver.h
+*.gcno
 
 # OpenULINK driver files generated by SDCC
 src/jtag/drivers/OpenULINK/*.rel
@@ -84,6 +84,9 @@ patches
 .cproject
 .settings
 
+# VSCode stuff
+.vscode
+
 # Emacs temp files
 *~
 

.gitmodules

@@ -1,6 +1,3 @@
-[submodule "tools/git2cl"]
-	path = tools/git2cl
-	url = https://git.savannah.nongnu.org/git/git2cl.git
 [submodule "jimtcl"]
 	path = jimtcl
 	url = https://github.com/msteveb/jimtcl.git

AUTHORS

@@ -1,12 +1,2 @@
-Dominic Rath <Dominic.Rath@gmx.de>
+Please check the source code files and/or Git history for a list of all authors
-Magnus Lundin <lundin@mlu.mine.nu>
+and contributors.
-Michael Fischer <fischermi@t-online.de>
-Spencer Oliver <spen@spen-soft.co.uk>
-Carsten Schlote <schlote@vahanus.net>
-Øyvind Harboe <oyvind.harboe@zylin.com>
-Duane Ellis <openocd@duaneellis.com>
-Michael Schwingen <michael@schwingen.org>
-Rick Altherr <kc8apf@users.berlios.de>
-David Brownell <dbrownell@users.sourceforge.net>
-Vincint Palatin <vpalatin@users.berlios.de>
-Zachary T Welch <zw@superlucidity.net>

HACKING

@@ -118,6 +118,22 @@ patch:
   make
   @endcode
 
+- Code coverage analysis
+
+  By inspecting the code coverage, you can identify potential gaps in your testing
+  and use that information to improve your test scenarios.
+
+  Example usage:
+  @code
+  mkdir build-gcov; cd build-gcov
+  ../configure --enable-gcov [...]
+  make
+  # ... Now execute your test scenarios to collect OpenOCD code coverage ...
+  lcov --capture --directory ./src --output-file openocd-coverage.info
+  genhtml openocd-coverage.info --output-directory coverage_report
+  # ... Open coverage_report/index.html in a web browser ...
+  @endcode
+
 Please consider performing these additional checks where appropriate
 (especially Clang Static Analyzer for big portions of new code) and
 mention the results (e.g. "Valgrind-clean, no new Clang analyzer
@@ -313,6 +329,13 @@ Only for <em>exceptional cases</em>, it is allowed to submit patches
 to Gerrit with the special field 'Checkpatch-ignore:' in the commit
 message. This field will cause checkpatch to ignore the error types
 listed in the field, only for the patch itself.
+For errors in the commit message, the special field has to be put in
+the commit message before the line that produces the error.
+The special field must be added <em>before</em> the 'Signed-off-by:'
+line, otherwise it is ignored.
+To ignore multiple errors, either add multiple lines with the special
+field or add multiple error types, separated by space or commas, in a
+single line.
 The error type is printed by checkpatch on failure.
 For example the names of Windows APIs mix lower and upper case chars,
 in violation of OpenOCD coding style, triggering a 'CAMELCASE' error:

LICENSES/stand-alone/Apache-2.0

@@ -0,0 +1,189 @@
+Valid-License-Identifier: Apache-2.0
+SPDX-URL: https://spdx.org/licenses/Apache-2.0.html
+Usage-Guide:
+  Do NOT use on OpenOCD code. The Apache-2.0 is not GPL2 compatible. It may only
+  be used for dual-licensed files where the other license is GPL2 compatible.
+  If you end up using this it MUST be used together with a GPL2 compatible
+  license using "OR".
+  It may also be used for stand-alone code NOT linked within the OpenOCD binary
+  but distributed with OpenOCD.
+  To use the Apache License version 2.0 put the following SPDX tag/value
+  pair into a comment according to the placement guidelines in the
+  licensing rules documentation:
+    SPDX-License-Identifier: Apache-2.0
+License-Text:
+
+Apache License
+
+Version 2.0, January 2004
+
+http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+"License" shall mean the terms and conditions for use, reproduction, and
+distribution as defined by Sections 1 through 9 of this document.
+
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+
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+entities that control, are controlled by, or are under common control with
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+power, direct or indirect, to cause the direction or management of such
+entity, whether by contract or otherwise, or (ii) ownership of fifty
+percent (50%) or more of the outstanding shares, or (iii) beneficial
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+
+"You" (or "Your") shall mean an individual or Legal Entity exercising
+permissions granted by this License.
+
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+including but not limited to software source code, documentation source,
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+
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+5. Submission of Contributions. Unless You explicitly state otherwise, any
+   Contribution intentionally submitted for inclusion in the Work by You to
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+6. Trademarks. This License does not grant permission to use the trade
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+7. Disclaimer of Warranty. Unless required by applicable law or agreed to
+   in writing, Licensor provides the Work (and each Contributor provides
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+   responsible for determining the appropriateness of using or
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+8. Limitation of Liability. In no event and under no legal theory, whether
+   in tort (including negligence), contract, or otherwise, unless required
+   by applicable law (such as deliberate and grossly negligent acts) or
+   agreed to in writing, shall any Contributor be liable to You for
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+   not limited to damages for loss of goodwill, work stoppage, computer
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+END OF TERMS AND CONDITIONS

Makefile.am

@@ -7,7 +7,7 @@ AUTOMAKE_OPTIONS = gnu 1.6
 .DELETE_ON_ERROR:
 
 # make sure we pass the correct jimtcl flags to distcheck
-DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
+AM_DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
 
 # do not run Jim Tcl tests (esp. during distcheck)
 check-recursive: SUBDIRS :=
@@ -37,20 +37,27 @@ DISTCLEANFILES += jimtcl/jsmn/jsmn.o
 endif
 
 # common flags used in openocd build
-AM_CFLAGS = $(GCC_WARNINGS)\
+AM_CFLAGS = $(GCC_WARNINGS)
-			  -DFD_SETSIZE=128
+AM_LDFLAGS =
 
 AM_CPPFLAGS = $(HOST_CPPFLAGS)\
 			  -I$(top_srcdir)/src \
 			  -I$(top_builddir)/src \
 			  -DPKGDATADIR=\"$(pkgdatadir)\" \
-			  -DBINDIR=\"$(bindir)\"\
+			  -DBINDIR=\"$(bindir)\"
-			  -DFD_SETSIZE=128
 
 if INTERNAL_JIMTCL
 AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
 			   -I$(top_builddir)/jimtcl
+else
+AM_CPPFLAGS += $(JIMTCL_CFLAGS)
 endif
+
+if USE_GCOV
+AM_CFLAGS += --coverage
+AM_LDFLAGS += --coverage
+endif
+
 EXTRA_DIST += \
 	BUGS \
 	HACKING \
@@ -72,6 +79,7 @@ EXTRA_DIST += \
 	LICENSES/preferred/GPL-2.0 \
 	LICENSES/preferred/LGPL-2.1 \
 	LICENSES/preferred/MIT \
+	LICENSES/stand-alone/Apache-2.0 \
 	LICENSES/stand-alone/GPL-3.0 \
 	tools/logger.pl \
 	tools/rlink_make_speed_table \
@@ -115,9 +123,13 @@ TCL_PATH = tcl
 TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' -o -name '*.txt' | \
 		sed -e 's,^$(srcdir)/$(TCL_PATH),,'
 
+# The git log command below generates many empty text lines with only some space characters
+# for indentation purposes, so use sed to trim all trailing whitespace.
 dist-hook:
 	if test -d $(srcdir)/.git -a \( ! -e $(distdir)/ChangeLog -o -w $(distdir)/ChangeLog \) ; then \
-		git --git-dir $(srcdir)/.git log | $(srcdir)/tools/git2cl/git2cl > $(distdir)/ChangeLog ; \
+		git --git-dir $(srcdir)/.git log --date=short --pretty="format:%ad  %aN <%aE>%n%n%w(0,4,6)* %B" \
+		| sed 's/[[:space:]]*$$//' > $(distdir)/ChangeLog.tmp && \
+		mv $(distdir)/ChangeLog.tmp $(distdir)/ChangeLog; \
 	fi
 	for i in $$($(TCL_FILES)); do \
 		j="$(distdir)/$(TCL_PATH)/$$i" && \

README

@@ -1,5 +1,4 @@
-Welcome to OpenOCD!
+# Welcome to OpenOCD!
-===================
 
 OpenOCD provides on-chip programming and debugging support with a
 layered architecture of JTAG interface and TAP support including:
@@ -26,9 +25,7 @@ This README file contains an overview of the following topics:
 - packaging tips.
 
 
-============================
+# Quickstart for the impatient
-Quickstart for the impatient
-============================
 
 If you have a popular board then just start OpenOCD with its config,
 e.g.:
@@ -39,20 +36,22 @@ If you are connecting a particular adapter with some specific target,
 you need to source both the jtag interface and the target configs,
 e.g.:
 
+```
 openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
         -f target/ti_calypso.cfg
+```
 
+```
 openocd -f interface/stlink.cfg -c "transport select hla_swd" \
         -f target/stm32l0.cfg
+```
 
 After OpenOCD startup, connect GDB with
 
     (gdb) target extended-remote localhost:3333
 
 
-=====================
+# OpenOCD Documentation
-OpenOCD Documentation
-=====================
 
 In addition to the in-tree documentation, the latest manuals may be
 viewed online at the following URLs:
@@ -71,35 +70,34 @@ by subscribing to the OpenOCD developer mailing list:
 
 	openocd-devel@lists.sourceforge.net
 
-Building the OpenOCD Documentation
+## Building the OpenOCD Documentation
-----------------------------------
 
 By default the OpenOCD build process prepares documentation in the
-"Info format" and installs it the standard way, so that "info openocd"
+"Info format" and installs it the standard way, so that `info openocd`
 can access it.
 
 Additionally, the OpenOCD User's Guide can be produced in the
 following different formats:
 
-  # If PDFVIEWER is set, this creates and views the PDF User Guide.
+If `PDFVIEWER` is set, this creates and views the PDF User Guide.
+
     make pdf && ${PDFVIEWER} doc/openocd.pdf
 
-  # If HTMLVIEWER is set, this creates and views the HTML User Guide.
+If `HTMLVIEWER` is set, this creates and views the HTML User Guide.
+
     make html && ${HTMLVIEWER} doc/openocd.html/index.html
 
 The OpenOCD Developer Manual contains information about the internal
 architecture and other details about the code:
 
-  # NB! make sure doxygen is installed, type doxygen --version
+Note: make sure doxygen is installed, type doxygen --version
+
     make doxygen && ${HTMLVIEWER} doxygen/index.html
 
 
-==================
+# Supported hardware
-Supported hardware
-==================
 
-JTAG adapters
+## JTAG adapters
--------------
 
 AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
 Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP,
@@ -116,8 +114,7 @@ sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
 USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
 Xverve.
 
-Debug targets
+## Debug targets
--------------
 
 ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
 FA526, Feroceon/Dragonite, XScale.
@@ -125,8 +122,7 @@ ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
 ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, RISC-V, ST STM8,
 Xtensa.
 
-Flash drivers
+## Flash drivers
--------------
 
 ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
 DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
@@ -140,12 +136,9 @@ TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
 XMC1xxx, XMC4xxx.
 
 
-==================
+# Installing OpenOCD
-Installing OpenOCD
-==================
 
-A Note to OpenOCD Users
+## A Note to OpenOCD Users
------------------------
 
 If you would rather be working "with" OpenOCD rather than "on" it, your
 operating system or JTAG interface supplier may provide binaries for
@@ -164,8 +157,7 @@ Users of these binary versions of OpenOCD must contact their Packager to
 ask for support or newer versions of the binaries; the OpenOCD
 developers do not support packages directly.
 
-A Note to OpenOCD Packagers
+## A Note to OpenOCD Packagers
----------------------------
 
 You are a PACKAGER of OpenOCD if you:
 
@@ -192,11 +184,9 @@ suggestions:
 - Use "ftdi" interface adapter driver for the FTDI-based devices.
 
 
-================
+# Building OpenOCD
-Building OpenOCD
-================
 
-The INSTALL file contains generic instructions for running 'configure'
+The INSTALL file contains generic instructions for running `configure`
 and compiling the OpenOCD source code. That file is provided by
 default for all GNU autotools packages. If you are not familiar with
 the GNU autotools, then you should read those instructions first.
@@ -204,8 +194,7 @@ the GNU autotools, then you should read those instructions first.
 The remainder of this document tries to provide some instructions for
 those looking for a quick-install.
 
-OpenOCD Dependencies
+## OpenOCD Dependencies
---------------------
 
 GCC or Clang is currently required to build OpenOCD. The developers
 have begun to enforce strict code warnings (-Wall, -Werror, -Wextra,
@@ -220,9 +209,7 @@ You'll also need:
 - make
 - libtool
 - pkg-config >= 0.23 or pkgconf
-
+- libjim >= 0.79
-OpenOCD uses jimtcl library; build from git can retrieve jimtcl as git
-submodule.
 
 Additionally, for building from git:
 
@@ -250,8 +237,7 @@ Optional development script checkpatch needs:
 - python
 - python-ply
 
-Permissions delegation
+## Permissions delegation
-----------------------
 
 Running OpenOCD with root/administrative permissions is strongly
 discouraged for security reasons.
@@ -268,27 +254,24 @@ For parport adapters on Windows you need to run install_giveio.bat
 (it's also possible to use "ioperm" with Cygwin instead) to give
 ordinary users permissions for accessing the "LPT" registers directly.
 
-Compiling OpenOCD
+## Compiling OpenOCD
------------------
 
 To build OpenOCD, use the following sequence of commands:
 
-  ./bootstrap (when building from the git repository)
+    ./bootstrap
     ./configure [options]
     make
     sudo make install
 
-The 'configure' step generates the Makefiles required to build
+The `bootstrap` command is only necessary when building from the Git repository. The `configure` step generates the Makefiles required to build
 OpenOCD, usually with one or more options provided to it. The first
 'make' step will build OpenOCD and place the final executable in
-'./src/'. The final (optional) step, ``make install'', places all of
+'./src/'. The final (optional) step, `make install`, places all of
 the files in the required location.
 
-To see the list of all the supported options, run
+To see the list of all the supported options, run `./configure --help`
-  ./configure --help
 
-Cross-compiling Options
+## Cross-compiling Options
------------------------
 
 Cross-compiling is supported the standard autotools way, you just need
 to specify the cross-compiling target triplet in the --host option,
@@ -303,29 +286,26 @@ additional wrapper script as described at
 
 This is needed to tell pkg-config where to look for the target
 libraries that OpenOCD depends on. Alternatively, you can specify
-*_CFLAGS and *_LIBS environment variables directly, see "./configure
+`*_CFLAGS` and `*_LIBS` environment variables directly, see `./configure
---help" for the details.
+--help` for the details.
 
 For a more or less complete script that does all this for you, see
 
     contrib/cross-build.sh
 
-Parallel Port Dongles
+## Parallel Port Dongles
----------------------
 
 If you want to access the parallel port using the PPDEV interface you
-have to specify both --enable-parport AND --enable-parport-ppdev, since
+have to specify both `--enable-parport` and `--enable-parport-ppdev`, since
 the later option is an option to the parport driver.
 
-The same is true for the --enable-parport-giveio option, you have to
+The same is true for the `--enable-parport-giveio` option, you have to
-use both the --enable-parport AND the --enable-parport-giveio option
+use both the `--enable-parport` and the `--enable-parport-giveio` option
 if you want to use giveio instead of ioperm parallel port access
 method.
 
 
-==========================
+# Obtaining OpenOCD From GIT
-Obtaining OpenOCD From GIT
-==========================
 
 You can download the current GIT version with a GIT client of your
 choice from the main repository:
@@ -343,9 +323,7 @@ directory called "openocd" in the current directory):
 
     git clone git://git.code.sf.net/p/openocd/code openocd
 
-Then you can update that at your convenience using
+Then you can update that at your convenience using `git pull`.
-
-   git pull
 
 There is also a gitweb interface, which you can use either to browse
 the repository or to download arbitrary snapshots using HTTP:

bootstrap

@@ -3,8 +3,8 @@
 
 # Run the autotools bootstrap sequence to create the configure script
 
-# Abort execution on error
+set -e  # Abort execution on error.
-set -e
+set -u  # Abort if you reference an undefined variable.
 
 if which libtoolize > /dev/null; then
     libtoolize="libtoolize"
@@ -15,13 +15,23 @@ else
     exit 1
 fi
 
-if [ "$1" = "nosubmodule" ]; then
+WITH_SUBMODULES=0
-    SKIP_SUBMODULE=1
+
+case "$#" in
+    0) ;;
+    1) if [ "$1" = "with-submodules" ]; then
+           WITH_SUBMODULES=1
+       elif [ "$1" = "nosubmodule" ]; then
+           WITH_SUBMODULES=0
        elif [ -n "$1" ]; then
-    echo "$0: Illegal argument $1"
+           echo "$0: Illegal argument $1" >&2
-    echo "USAGE: $0 [nosubmodule]"
+           echo "USAGE: $0 [with-submodules]" >&2
            exit 1
-fi
+       fi;;
+   *)  echo "$0: Wrong number of command-line arguments." >&2
+       echo "USAGE: $0 [with-submodules]" >&2
+       exit 1;;
+esac
 
 # bootstrap the autotools
 (
@@ -34,12 +44,12 @@ autoheader --warnings=all
 automake --warnings=all --gnu --add-missing --copy
 )
 
-if [ -n "$SKIP_SUBMODULE" ]; then
+if [ "$WITH_SUBMODULES" -ne 0 ]; then
-    echo "Skipping submodule setup"
-else
     echo "Setting up submodules"
-    git submodule init
+    git submodule sync
-    git submodule update
+    git submodule update --init
+else
+    echo "Skipping submodule setup"
 fi
 
 if [ -x src/jtag/drivers/libjaylink/autogen.sh ]; then

config_subdir.m4

@@ -7,6 +7,6 @@ AC_DEFUN([AX_CONFIG_SUBDIR_OPTION],
 AC_CONFIG_SUBDIRS([$1])
 
 m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
-[echo -e '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" '"$2"' "'\$'@"' > "$srcdir/$1/configure.gnu"
+[printf '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" '"$2"' "'\$'@"\n' > "$srcdir/$1/configure.gnu"
 ])
 ])

configure.ac

@@ -52,9 +52,16 @@ AC_SEARCH_LIBS([openpty], [util])
 
 AC_CHECK_HEADERS([sys/socket.h])
 AC_CHECK_HEADERS([elf.h])
-AC_EGREP_HEADER(Elf64_Ehdr, [elf.h], [
+
-  AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type `Elf64_Ehdr'.])
+AC_CHECK_TYPE([Elf64_Ehdr],
-])
+	AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type 'Elf64_Ehdr'.]),
+	[], [[#include <elf.h>]])
+
+AC_MSG_CHECKING([for glibc])
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[#include <features.h>]], [[int v = __GLIBC__;return 0;]])],
+	[have_glibc=yes], [have_glibc=no])
+AC_MSG_RESULT($have_glibc)
+
 AC_CHECK_HEADERS([fcntl.h])
 AC_CHECK_HEADERS([malloc.h])
 AC_CHECK_HEADERS([netdb.h])
@@ -104,12 +111,18 @@ AS_IF([test -x "$srcdir/guess-rev.sh"], [
 AC_MSG_RESULT([$build_release])
 
 # Adapter drivers
-# 1st column -- configure option
+# 1st column -- Basename for the configure option generated with AC_ARG_ENABLE.
-# 2nd column -- description
+#               For example, "buspirate" generates options "--enable-buspirate[=yes/no]"
-# 3rd column -- symbol used for both config.h and automake
+#               and "--disable-buspirate".
+# 2nd column -- Description for the configure option. For example, "Bus Pirate"
+#               generates "Enable building support for the Bus Pirate (default is auto)".
+# 3rd column -- Basename for the config.h and Automake symbols.
+#               For example, basename "BUS_PIRATE" generates "BUILD_BUS_PIRATE" with AC_DEFINE
+#               for config.h and "BUS_PIRATE" with AM_CONDITIONAL for Automake.
 m4_define([ADAPTER_ARG], [m4_argn([1], $1)])
 m4_define([ADAPTER_DESC], [m4_argn([2], $1)])
 m4_define([ADAPTER_SYM], [m4_argn([3], $1)])
+# AC_ARG_ENABLE uses prefix "enable_" to name the corresponding option variable.
 m4_define([ADAPTER_VAR], [enable_[]ADAPTER_ARG($1)])
 m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
 
@@ -158,9 +171,22 @@ m4_define([PCIE_ADAPTERS],
 m4_define([SERIAL_PORT_ADAPTERS],
 	[[[buspirate], [Bus Pirate], [BUS_PIRATE]]])
 
+m4_define([LINUXSPIDEV_ADAPTER],
+	[[[linuxspidev], [Linux spidev driver], [LINUXSPIDEV]]])
+m4_define([VDEBUG_ADAPTER],
+	[[[vdebug], [Cadence Virtual Debug Interface], [VDEBUG]]])
+
+# The word 'Adapter' in "Dummy Adapter" below must begin with a capital letter
+# because there is an M4 macro called 'adapter'.
+m4_define([DUMMY_ADAPTER],
+	[[[dummy], [Dummy Adapter], [DUMMY]]])
+
 m4_define([OPTIONAL_LIBRARIES],
 	[[[capstone], [Use Capstone disassembly framework], []]])
 
+m4_define([COVERAGE],
+	[[[gcov], [Collect coverage using gcov], []]])
+
 AC_ARG_ENABLE([doxygen-html],
   AS_HELP_STRING([--disable-doxygen-html],
     [Disable building Doxygen manual as HTML.]),
@@ -189,6 +215,19 @@ AC_ARG_ENABLE([werror],
   AS_HELP_STRING([--disable-werror], [Do not treat warnings as errors]),
   [gcc_werror=$enableval], [gcc_werror=$gcc_warnings])
 
+AC_ARG_ENABLE([gcov],
+  AS_HELP_STRING([--enable-gcov], [Enable runtime coverage collection via gcov]),
+  [enable_gcov=$enableval], [enable_gcov=no])
+
+AS_IF([test "x$enable_gcov" = "xyes"], [
+  AC_DEFINE([USE_GCOV], [1], [1 to enable coverage collection using gcov.])
+  dnl When collecting coverage, disable optimizations.
+  dnl This overrides the "-O2" that autoconf uses by default:
+  CFLAGS+=" -O0"
+], [
+  AC_DEFINE([USE_GCOV], [0], [0 to leave coverage collection disabled.])
+])
+
 # set default verbose options, overridden by following options
 debug_usb_io=no
 debug_usb_comms=no
@@ -231,14 +270,10 @@ AC_ARG_ENABLE([malloc_logging],
 
 AC_MSG_CHECKING([whether to enable malloc free space logging]);
 AC_MSG_RESULT([$debug_malloc])
-AS_IF([test "x$debug_malloc" = "xyes"], [
+AS_IF([test "x$debug_malloc" = "xyes" -a "x$have_glibc" = "xyes"], [
   AC_DEFINE([_DEBUG_FREE_SPACE_],[1], [Include malloc free space in logging])
 ])
 
-AC_ARG_ENABLE([dummy],
-  AS_HELP_STRING([--enable-dummy], [Enable building the dummy port driver]),
-  [build_dummy=$enableval], [build_dummy=no])
-
 AC_ARG_ENABLE([rshim],
   AS_HELP_STRING([--enable-rshim], [Enable building the rshim driver]),
   [build_rshim=$enableval], [build_rshim=no])
@@ -250,9 +285,13 @@ AC_ARG_ENABLE([dmem],
 m4_define([AC_ARG_ADAPTERS], [
   m4_foreach([adapter], [$1],
 	[AC_ARG_ENABLE(ADAPTER_OPT([adapter]),
-		AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])],
+		AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])[[[=yes/no/auto]]]],
 			[Enable building support for the ]ADAPTER_DESC([adapter])[ (default is $2)]),
-		[], [ADAPTER_VAR([adapter])=$2])
+		[case "${enableval}" in
+			yes|no|auto) ;;
+			*) AC_MSG_ERROR([Option --enable-ADAPTER_OPT([adapter]) has invalid value "${enableval}".]) ;;
+			esac],
+		[ADAPTER_VAR([adapter])=$2])
   ])
 ])
 
@@ -261,9 +300,13 @@ AC_ARG_ADAPTERS([
   HIDAPI_ADAPTERS,
   HIDAPI_USB1_ADAPTERS,
   LIBFTDI_ADAPTERS,
-  LIBFTDI_USB1_ADAPTERS
+  LIBFTDI_USB1_ADAPTERS,
   LIBGPIOD_ADAPTERS,
+  LINUXSPIDEV_ADAPTER,
   SERIAL_PORT_ADAPTERS,
+  DUMMY_ADAPTER,
+  VDEBUG_ADAPTER,
+  PCIE_ADAPTERS,
   LIBJAYLINK_ADAPTERS
   ],[auto])
 
@@ -285,10 +328,6 @@ AC_ARG_ENABLE([jtag_vpi],
   AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]),
   [build_jtag_vpi=$enableval], [build_jtag_vpi=no])
 
-AC_ARG_ENABLE([vdebug],
-  AS_HELP_STRING([--enable-vdebug], [Enable building support for Cadence Virtual Debug Interface]),
-  [build_vdebug=$enableval], [build_vdebug=no])
-
 AC_ARG_ENABLE([jtag_dpi],
   AS_HELP_STRING([--enable-jtag_dpi], [Enable building support for JTAG DPI]),
   [build_jtag_dpi=$enableval], [build_jtag_dpi=no])
@@ -338,25 +377,15 @@ AC_ARG_ENABLE([sysfsgpio],
   AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]),
   [build_sysfsgpio=$enableval], [build_sysfsgpio=no])
 
-AC_ARG_ENABLE([xlnx_pcie_xvc],
-  AS_HELP_STRING([--enable-xlnx-pcie-xvc], [Enable building support for Xilinx XVC/PCIe.]),
-  [build_xlnx_pcie_xvc=$enableval], [build_xlnx_pcie_xvc=no])
-
 AS_CASE([$host_os],
-  [linux*], [],
+  [linux*], [
+    is_linux=yes
+  ],
   [
     AS_IF([test "x$build_sysfsgpio" = "xyes"], [
       AC_MSG_ERROR([sysfsgpio is only available on linux])
     ])
 
-    AS_IF([test "x$enable_linuxgpiod" = "xyes"], [
-      AC_MSG_ERROR([linuxgpiod is only available on linux])
-    ])
-
-    AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
-      AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux])
-    ])
-
     AS_CASE([$host_os], [freebsd*], [],
     [
       AS_IF([test "x$build_rshim" = "xyes"], [
@@ -370,8 +399,8 @@ AS_CASE([$host_os],
 ])
 
 AC_ARG_ENABLE([internal-jimtcl],
-  AS_HELP_STRING([--disable-internal-jimtcl], [Disable building internal jimtcl]),
+  AS_HELP_STRING([--enable-internal-jimtcl], [Enable building internal jimtcl (deprecated)]),
-  [use_internal_jimtcl=$enableval], [use_internal_jimtcl=yes])
+  [use_internal_jimtcl=$enableval], [use_internal_jimtcl=no])
 
 AC_ARG_ENABLE([jimtcl-maintainer],
   AS_HELP_STRING([--enable-jimtcl-maintainer], [Enable maintainer mode when building internal jimtcl]),
@@ -395,8 +424,10 @@ AS_CASE(["${host_cpu}"],
     parport_use_ppdev=yes
 ])
 
-AS_CASE([$host],
+can_build_buspirate=yes
-  [*-cygwin*], [
+
+AS_CASE([$host_os],
+  [cygwin*], [
     is_win32=yes
     parport_use_ppdev=no
 
@@ -416,7 +447,7 @@ AS_CASE([$host],
       ])
     ])
   ],
-  [*-mingw* | *-msys*], [
+  [mingw* | msys*], [
     is_mingw=yes
     is_win32=yes
     parport_use_ppdev=no
@@ -426,16 +457,16 @@ AS_CASE([$host],
     ])
     parport_use_giveio=yes
 
-    AS_IF([test "x$enable_buspirate" = "xyes"], [
+    AS_IF([test "x$ADAPTER_VAR([buspirate])" = "xyes"], [
-      AC_MSG_ERROR([buspirate currently not supported by MinGW32 hosts])
+      AC_MSG_ERROR([The Bus Pirate adapter is currently not supported by MinGW32 hosts.])
     ])
 
     # In case enable_buspirate=auto, make sure it will not be built.
-    enable_buspirate=no
+    can_build_buspirate=no
 
-    AC_SUBST([HOST_CPPFLAGS], [-D__USE_MINGW_ANSI_STDIO])
+    AC_SUBST([HOST_CPPFLAGS], ["-D__USE_MINGW_ANSI_STDIO -DFD_SETSIZE=128"])
   ],
-  [*darwin*], [
+  [darwin*], [
     is_darwin=yes
 
     AS_IF([test "x$parport_use_giveio" = "xyes"], [
@@ -493,11 +524,8 @@ AS_IF([test "x$build_dmem" = "xyes"], [
   AC_DEFINE([BUILD_DMEM], [0], [0 if you don't want to debug via Direct Mem.])
 ])
 
-AS_IF([test "x$build_dummy" = "xyes"], [
+AS_IF([test "x$ADAPTER_VAR([dummy])" != "xno"], [
   build_bitbang=yes
-  AC_DEFINE([BUILD_DUMMY], [1], [1 if you want dummy driver.])
-], [
-  AC_DEFINE([BUILD_DUMMY], [0], [0 if you don't want dummy driver.])
 ])
 
 AS_IF([test "x$build_ep93xx" = "xyes"], [
@@ -553,12 +581,6 @@ AS_IF([test "x$build_jtag_vpi" = "xyes"], [
   AC_DEFINE([BUILD_JTAG_VPI], [0], [0 if you don't want JTAG VPI.])
 ])
 
-AS_IF([test "x$build_vdebug" = "xyes"], [
-  AC_DEFINE([BUILD_VDEBUG], [1], [1 if you want Cadence vdebug interface.])
-], [
-  AC_DEFINE([BUILD_VDEBUG], [0], [0 if you don't want Cadence vdebug interface.])
-])
-
 AS_IF([test "x$build_jtag_dpi" = "xyes"], [
   AC_DEFINE([BUILD_JTAG_DPI], [1], [1 if you want JTAG DPI.])
 ], [
@@ -578,12 +600,6 @@ AS_IF([test "x$build_gw16012" = "xyes"], [
   AC_DEFINE([BUILD_GW16012], [0], [0 if you don't want the Gateworks GW16012 driver.])
 ])
 
-AS_IF([test "x$enable_buspirate" != "xno"], [
-  AC_DEFINE([BUILD_BUSPIRATE], [1], [1 if you want the Buspirate JTAG driver.])
-], [
-  AC_DEFINE([BUILD_BUSPIRATE], [0], [0 if you don't want the Buspirate JTAG driver.])
-])
-
 AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
   AS_IF([test -f "$srcdir/jimtcl/configure"], [
     AS_IF([test "x$use_internal_jimtcl_maintainer" = "xyes"], [
@@ -595,6 +611,15 @@ AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
   ], [
     AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule update.])
   ])
+], [
+  PKG_CHECK_MODULES([JIMTCL], [jimtcl >= 0.79], [
+      have_jimtcl_pkg_config=yes
+    ], [
+      have_jimtcl_pkg_config=no
+      AC_CHECK_HEADER([jim.h], [], [
+        AC_MSG_ERROR([jimtcl is required but not found via pkg-config and system includes])
+      ])
+  ])
 ])
 
 AS_IF([test "x$build_remote_bitbang" = "xyes"], [
@@ -611,13 +636,6 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [
   AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
 ])
 
-AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
-  build_xlnx_pcie_xvc=yes
-  AC_DEFINE([BUILD_XLNX_PCIE_XVC], [1], [1 if you want the Xilinx XVC/PCIe driver.])
-], [
-  AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.])
-])
-
 PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
 	use_libusb1=yes
 	AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@@ -670,11 +688,20 @@ PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [
 	PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no])
 ])
 
-PKG_CHECK_MODULES([LIBGPIOD], [libgpiod], [use_libgpiod=yes], [use_libgpiod=no])
+PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [
+	use_libgpiod=yes
+	PKG_CHECK_EXISTS([libgpiod >= 1.5],
+		[AC_DEFINE([HAVE_LIBGPIOD1_FLAGS_BIAS], [1], [define if libgpiod v1 has line request flags bias])])
+], [use_libgpiod=no])
 
 PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2],
 	[use_libjaylink=yes], [use_libjaylink=no])
 
+# Arg $1: An array of adapter triplets, used to derive option and variable names for each adapter.
+# Arg $2: Whether the adapters can be enabled, for example, because
+#         their prerequisites are installed in the system.
+# Arg $3: What prerequisites are missing, to be shown in an error message
+#         if an adapter was requested but cannot be enabled.
 m4_define([PROCESS_ADAPTERS], [
   m4_foreach([adapter], [$1], [
 	AS_IF([test $2], [
@@ -685,7 +712,7 @@ m4_define([PROCESS_ADAPTERS], [
 		])
 	], [
 		AS_IF([test "x$ADAPTER_VAR([adapter])" = "xyes"], [
-			AC_MSG_ERROR([$3 is required for the ADAPTER_DESC([adapter])])
+			AC_MSG_ERROR([$3 is required for [adapter] "ADAPTER_DESC([adapter])".])
 		])
 		ADAPTER_VAR([adapter])=no
 		AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [0], [0 if you do not want the ]ADAPTER_DESC([adapter]).)
@@ -699,8 +726,14 @@ PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi])
 PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x])
 PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi])
 PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a "x$use_libusb1" = "xyes"], [libftdi and libusb-1.x])
-PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod])
+PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [Linux libgpiod])
 PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2])
+PROCESS_ADAPTERS([PCIE_ADAPTERS], ["x$is_linux" = "xyes"], [Linux build])
+PROCESS_ADAPTERS([SERIAL_PORT_ADAPTERS], ["x$can_build_buspirate" = "xyes"],
+                                         [internal error: validation should happen beforehand])
+PROCESS_ADAPTERS([LINUXSPIDEV_ADAPTER], ["x$is_linux" = "xyes"], [Linux spidev])
+PROCESS_ADAPTERS([VDEBUG_ADAPTER], [true], [unused])
+PROCESS_ADAPTERS([DUMMY_ADAPTER], [true], [unused])
 
 AS_IF([test "x$enable_linuxgpiod" != "xno"], [
   build_bitbang=yes
@@ -740,7 +773,6 @@ AS_IF([test "x$enable_esp_usb_jtag" != "xno"], [
 
 AM_CONDITIONAL([RELEASE], [test "x$build_release" = "xyes"])
 AM_CONDITIONAL([PARPORT], [test "x$build_parport" = "xyes"])
-AM_CONDITIONAL([DUMMY], [test "x$build_dummy" = "xyes"])
 AM_CONDITIONAL([GIVEIO], [test "x$parport_use_giveio" = "xyes"])
 AM_CONDITIONAL([EP93XX], [test "x$build_ep93xx" = "xyes"])
 AM_CONDITIONAL([AT91RM9200], [test "x$build_at91rm9200" = "xyes"])
@@ -749,15 +781,12 @@ AM_CONDITIONAL([IMX_GPIO], [test "x$build_imx_gpio" = "xyes"])
 AM_CONDITIONAL([AM335XGPIO], [test "x$build_am335xgpio" = "xyes"])
 AM_CONDITIONAL([BITBANG], [test "x$build_bitbang" = "xyes"])
 AM_CONDITIONAL([JTAG_VPI], [test "x$build_jtag_vpi" = "xyes"])
-AM_CONDITIONAL([VDEBUG], [test "x$build_vdebug" = "xyes"])
 AM_CONDITIONAL([JTAG_DPI], [test "x$build_jtag_dpi" = "xyes"])
 AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x$enable_usb_blaster_2" != "xno"])
 AM_CONDITIONAL([AMTJTAGACCEL], [test "x$build_amtjtagaccel" = "xyes"])
 AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"])
 AM_CONDITIONAL([REMOTE_BITBANG], [test "x$build_remote_bitbang" = "xyes"])
-AM_CONDITIONAL([BUSPIRATE], [test "x$enable_buspirate" != "xno"])
 AM_CONDITIONAL([SYSFSGPIO], [test "x$build_sysfsgpio" = "xyes"])
-AM_CONDITIONAL([XLNX_PCIE_XVC], [test "x$build_xlnx_pcie_xvc" = "xyes"])
 AM_CONDITIONAL([USE_LIBUSB1], [test "x$use_libusb1" = "xyes"])
 AM_CONDITIONAL([IS_CYGWIN], [test "x$is_cygwin" = "xyes"])
 AM_CONDITIONAL([IS_MINGW], [test "x$is_mingw" = "xyes"])
@@ -773,8 +802,11 @@ AM_CONDITIONAL([DMEM], [test "x$build_dmem" = "xyes"])
 AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
 
 AM_CONDITIONAL([INTERNAL_JIMTCL], [test "x$use_internal_jimtcl" = "xyes"])
+AM_CONDITIONAL([HAVE_JIMTCL_PKG_CONFIG], [test "x$have_jimtcl_pkg_config" = "xyes"])
 AM_CONDITIONAL([INTERNAL_LIBJAYLINK], [test "x$use_internal_libjaylink" = "xyes"])
 
+AM_CONDITIONAL([USE_GCOV], [test "x$enable_gcov" = "xyes"])
+
 # Look for environ alternatives.  Possibility #1: is environ in unistd.h or stdlib.h?
 AC_MSG_CHECKING([for environ in unistd.h and stdlib.h])
 AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
@@ -840,6 +872,10 @@ AS_IF([test "x$enable_jlink" != "xno"], [
   ]])
 )
 
+AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
+  AC_MSG_WARN([Using the internal jimtcl is deprecated and will not be possible in the future.])
+])
+
 echo
 echo
 echo OpenOCD configuration summary
@@ -849,7 +885,11 @@ m4_foreach([adapter], [USB1_ADAPTERS,
 	LIBFTDI_USB1_ADAPTERS,
 	LIBGPIOD_ADAPTERS,
 	LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS, SERIAL_PORT_ADAPTERS,
-	OPTIONAL_LIBRARIES],
+	LINUXSPIDEV_ADAPTER,
+	VDEBUG_ADAPTER,
+	DUMMY_ADAPTER,
+	OPTIONAL_LIBRARIES,
+	COVERAGE],
 	[s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
 	AS_CASE([$ADAPTER_VAR([adapter])],
 		[auto], [
@@ -860,6 +900,11 @@ m4_foreach([adapter], [USB1_ADAPTERS,
 		],
 		[no], [
 			echo "$s"no
+		],
+		[
+			AC_MSG_ERROR(m4_normalize([
+				Error in [adapter] "ADAPTER_ARG([adapter])": Variable "ADAPTER_VAR([adapter])"
+				has invalid value "$ADAPTER_VAR([adapter])".]))
 	])
 ])
 echo

contrib/60-openocd.rules

@@ -29,6 +29,27 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev",
 # Original FT231XQ VID:PID
 ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
+# Original FT2233HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6040", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4233HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6041", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT2232HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6042", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4232HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6043", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT233HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6044", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT232HP VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6045", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
+# Original FT4232HA VID:PID
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6048", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
 # DISTORTEC JTAG-lock-pick Tiny 2
 ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
 

contrib/coresight-trace.txt

@@ -1,68 +0,0 @@
-+OpenOCD and CoreSight Tracing
-+
-Many recent ARM chips  (Using e..g. Cortex-M3 and
-Cortex-M4 cores) support CoreSight debug/trace.
-This note sketches an approach currently planned for those cores
-with OpenOCD.
-
- This tracing data can help debug and tune ARM software, but not
-all cores support tracing.  Some support more extensive tracing
-other cores with trace support +should be able to use the same
-approach and maybe some of the same analysis code.
-
-+the Cortex-M3 is assumed here to be the
-+core in use, for simplicity and to reflect current OpenOCD users.
-
-
-This note summarizes a software model to generate, collect, and
-analyze such trace data .  That is not fully implemented as of early
-January 2011, +and thus is not *yet* usable.
-+
-+
-+Some microcontroller cores support a low pin-count Single-wire trace,
-with a mode where +trace data is emitted (usually to a UART.  To use
-this mode, +SWD must be in use.
-+At this writing, OpenOCD SWD support is not yet complete either.
-
-(There are also multi-wire trace ports requiring more complex debug
-adapters than OpenOCD currently supports, and offering richer data.
-+
-+
-+* ENABLING involves activating  SWD and (single wire) trace.
-+
-+current expectations are that OpenOCD itself will handle enabling;
-activating single wire trace involves a debug adapter interaction, and
-collecting that trace data requires particular (re)wiring.
-+
-+* CONFIGURATION involves setting up ITM  and/or ETM modules to emit the
-+desired data from the Cortex core.  (This might include dumping
-+event counters printf-style messages; code profiling; and more.  Not all
-+cores offer the same trace capabilities.
-+
-+current expectations are that Tcl scripts will be used to configure these
-+modules for the desired tracing, by direct writes to registers.  In some
-+cases (as with RTOS event tracking and similar messaging, this might
-+be  augmented or replaced by user code running on the ARM core.
-+
-+COLLECTION involves reading that trace data, probably through UART, and
-+saving it in a useful format to analyse  For now, deferred analysis modes
-are assumed, not than real-time or interactive ones.
-+
-+
-+current expectations are to to dump data in text using contrib/itmdump.c
-+or derived tools, and to post-process it into reports.  Such reports might
-+include program messaging (such as application data streams via ITM, maybe
-+using printf type messaging; code coverage analysis or so forth.  Recent
-+versions of CMSIS software reserve some ITM codespace for RTOS  event
-tracing and include ITM messaging support.
-Clearly some of that data would be valuable for interactive debugging.
-+
-+Should someone get ambitious, GUI reports should be possible.  GNU tools
-+for simpler reports like gprof may be simpler to support at first.
-+In any case, OpenOCD is not currently GUI-oriented.  Accordingly, we now
-+expect any such graphics to come from postprocessing.
-
- measurements for RTOS event timings should also be easy to collect.
-+Examples include context and message switch times, as well as times
-for application interactions.
-+

contrib/cross-build.sh

@@ -42,6 +42,7 @@ WORK_DIR=$PWD
 : ${LIBFTDI_SRC:=/path/to/libftdi}
 : ${CAPSTONE_SRC:=/path/to/capstone}
 : ${LIBJAYLINK_SRC:=/path/to/libjaylink}
+: ${JIMTCL_SRC:=/path/to/jimtcl}
 
 OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
 LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
@@ -49,6 +50,7 @@ HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
 LIBFTDI_SRC=`readlink -m $LIBFTDI_SRC`
 CAPSTONE_SRC=`readlink -m $CAPSTONE_SRC`
 LIBJAYLINK_SRC=`readlink -m $LIBJAYLINK_SRC`
+JIMTCL_SRC=`readlink -m $JIMTCL_SRC`
 
 HOST_TRIPLET=$1
 BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build
@@ -57,6 +59,7 @@ HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi
 LIBFTDI_BUILD_DIR=$BUILD_DIR/libftdi
 CAPSTONE_BUILD_DIR=$BUILD_DIR/capstone
 LIBJAYLINK_BUILD_DIR=$BUILD_DIR/libjaylink
+JIMTCL_BUILD_DIR=$BUILD_DIR/jimtcl
 OPENOCD_BUILD_DIR=$BUILD_DIR/openocd
 
 ## Root of host file tree
@@ -172,6 +175,18 @@ if [ -d $LIBJAYLINK_SRC ] ; then
   make install DESTDIR=$SYSROOT
 fi
 
+# jimtcl build & install into sysroot
+if [ -d $JIMTCL_SRC ] ; then
+  mkdir -p $JIMTCL_BUILD_DIR
+  cd $JIMTCL_BUILD_DIR
+  $JIMTCL_SRC/configure --host=$HOST_TRIPLET --prefix=$PREFIX \
+    $JIMTCL_CONFIG
+  make -j $MAKE_JOBS
+  # Running "make" does not create this file for static builds on Windows but "make install" still expects it
+  touch $JIMTCL_BUILD_DIR/build-jim-ext
+  make install DESTDIR=$SYSROOT
+fi
+
 # OpenOCD build & install into sysroot
 mkdir -p $OPENOCD_BUILD_DIR
 cd $OPENOCD_BUILD_DIR

contrib/itmdump.c

@@ -43,9 +43,9 @@ unsigned int dump_swit;
  * NOTE that this specific encoding could be space-optimized; and that
  * trace data streams could also be history-sensitive.
  */
-static void show_task(int port, unsigned data)
+static void show_task(int port, unsigned int data)
 {
-	unsigned code = data >> 16;
+	unsigned int code = data >> 16;
 	char buf[16];
 
 	if (dump_swit)
@@ -77,7 +77,7 @@ static void show_task(int port, unsigned data)
 
 static void show_reserved(FILE *f, char *label, int c)
 {
-	unsigned i;
+	unsigned int i;
 
 	if (dump_swit)
 		return;
@@ -96,9 +96,9 @@ static void show_reserved(FILE *f, char *label, int c)
 	printf("\n");
 }
 
-static bool read_varlen(FILE *f, int c, unsigned *value)
+static bool read_varlen(FILE *f, int c, unsigned int *value)
 {
-	unsigned size;
+	unsigned int size;
 	unsigned char buf[4];
 
 	*value = 0;
@@ -135,8 +135,8 @@ err:
 
 static void show_hard(FILE *f, int c)
 {
-	unsigned type = c >> 3;
+	unsigned int type = c >> 3;
-	unsigned value;
+	unsigned int value;
 	char *label;
 
 	if (dump_swit)
@@ -230,16 +230,16 @@ static void show_hard(FILE *f, int c)
  */
 struct {
 	int port;
-	void (*show)(int port, unsigned data);
+	void (*show)(int port, unsigned int data);
 } format[] = {
 	{ .port = 31,  .show = show_task, },
 };
 
 static void show_swit(FILE *f, int c)
 {
-	unsigned port = c >> 3;
+	unsigned int port = c >> 3;
-	unsigned value = 0;
+	unsigned int value = 0;
-	unsigned i;
+	unsigned int i;
 
 	if (port + 1 == dump_swit) {
 		if (!read_varlen(f, c, &value))
@@ -272,7 +272,7 @@ static void show_swit(FILE *f, int c)
 
 static void show_timestamp(FILE *f, int c)
 {
-	unsigned counter = 0;
+	unsigned int counter = 0;
 	char *label = "";
 	bool delayed = false;
 

contrib/list_example.c

@@ -12,7 +12,7 @@
 #include <assert.h>
 #include <helper/list.h>
 
-static LIST_HEAD(threads);
+static OOCD_LIST_HEAD(threads);
 
 struct thread {
 	int id;

contrib/loaders/flash/cc26xx/cc26x0_algo.inc

@@ -1,249 +1,248 @@
 /* Autogenerated with ../../../../src/helper/bin2char.sh */
 0x08,0xb5,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0xdf,0xf8,0x1c,0xd0,0x07,0x48,
-0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xfa,0xdb,
+0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xff,0xf6,
-0x00,0xf0,0xa8,0xf9,0xfe,0xe7,0x00,0x00,0xf0,0x0e,0x00,0x20,0x54,0x13,0x00,0x20,
+0xfa,0xaf,0x00,0xf0,0x71,0xf9,0xfe,0xe7,0xe0,0x0e,0x00,0x20,0x44,0x13,0x00,0x20,
-0x98,0x13,0x00,0x20,0x08,0xb5,0x07,0x4b,0x07,0x48,0x03,0x33,0x1b,0x1a,0x06,0x2b,
+0x88,0x13,0x00,0x20,0x10,0xb5,0x07,0x4c,0x23,0x78,0x00,0x2b,0x07,0xd1,0x06,0x4b,
-0x04,0xd9,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x5c,0xf8,0x08,0xbc,0x01,0xbc,
-0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
-0x08,0x48,0x09,0x49,0x09,0x1a,0x89,0x10,0x08,0xb5,0xcb,0x0f,0x59,0x18,0x49,0x10,
-0x04,0xd0,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x44,0xf8,0x08,0xbc,0x01,0xbc,
-0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
-0x10,0xb5,0x08,0x4c,0x23,0x78,0x00,0x2b,0x09,0xd1,0xff,0xf7,0xcb,0xff,0x06,0x4b,
 0x00,0x2b,0x02,0xd0,0x05,0x48,0xaf,0xf3,0x00,0x80,0x01,0x23,0x23,0x70,0x10,0xbc,
-0x01,0xbc,0x00,0x47,0x54,0x13,0x00,0x20,0x00,0x00,0x00,0x00,0xe0,0x0e,0x00,0x20,
+0x01,0xbc,0x00,0x47,0x44,0x13,0x00,0x20,0x00,0x00,0x00,0x00,0xd4,0x0e,0x00,0x20,
-0x08,0xb5,0x0b,0x4b,0x00,0x2b,0x03,0xd0,0x0a,0x48,0x0b,0x49,0xaf,0xf3,0x00,0x80,
+0x08,0xb5,0x09,0x4b,0x00,0x2b,0x03,0xd0,0x08,0x48,0x09,0x49,0xaf,0xf3,0x00,0x80,
-0x0a,0x48,0x03,0x68,0x00,0x2b,0x04,0xd1,0xff,0xf7,0xc2,0xff,0x08,0xbc,0x01,0xbc,
+0x08,0x48,0x03,0x68,0x00,0x2b,0x04,0xd0,0x07,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,
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+0x0d,0xf8,0x08,0xbc,0x01,0xbc,0x00,0x47,0x00,0x00,0x00,0x00,0xd4,0x0e,0x00,0x20,
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-0x00,0xf0,0x42,0xfd,0x10,0x4b,0x00,0x2b,0x01,0xd0,0xfe,0x46,0x9f,0x46,0x0f,0x4b,
+0x01,0xd0,0xfe,0x46,0x9f,0x46,0x10,0x4b,0x00,0x2b,0x01,0xd0,0xfe,0x46,0x9f,0x46,
-0x00,0x2b,0x01,0xd0,0xfe,0x46,0x9f,0x46,0x00,0x20,0x00,0x21,0x04,0x00,0x0d,0x00,
+0x00,0x20,0x00,0x21,0x04,0x00,0x0d,0x00,0x0e,0x48,0x00,0x28,0x02,0xd0,0x0e,0x48,
-0x0d,0x48,0x00,0xf0,0x89,0xfc,0x00,0xf0,0xc3,0xfc,0x20,0x00,0x29,0x00,0x00,0xf0,
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-0x28,0x15,0x00,0x20,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,
+0x52,0x00,0x40,0x46,0x98,0x50,0x02,0x2e,0xdf,0xd1,0xc6,0x22,0x52,0x00,0xa3,0x18,
-0xc5,0xc5,0xc5,0xff,0xc5,0xc5,0xc5,0xff,0x43,0x00,0x00,0x00,0x18,0x0f,0x00,0x20,
+0x18,0x68,0x01,0x43,0x19,0x60,0xd8,0xe7,0x1c,0x1c,0x4d,0x34,0xff,0x34,0x5c,0x51,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x12,0x00,0x20,
+0xb3,0xe7,0xc0,0x46,0xfc,0x0e,0x00,0x20,0x00,0x00,0x00,0x00,0xf8,0xb5,0xc0,0x46,
-0x6c,0x12,0x00,0x20,0xd4,0x12,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xf8,0xbc,0x08,0xbc,0x9e,0x46,0x70,0x47,0xf8,0xb5,0xc0,0x46,0xf8,0xbc,0x08,0xbc,
+0x9e,0x46,0x70,0x47,0x00,0x00,0x00,0x00,0xc8,0xf1,0xff,0x7f,0x01,0x00,0x00,0x00,
+0x18,0x15,0x00,0x20,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,
+0xc5,0xc5,0xc5,0xff,0xc5,0xc5,0xc5,0xff,0x43,0x00,0x00,0x00,0x08,0x0f,0x00,0x20,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf4,0x11,0x00,0x20,
+0x5c,0x12,0x00,0x20,0xc4,0x12,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x0f,0x00,0x20,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf8,0x0e,0x00,0x20,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -307,8 +306,9 @@
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x18,0x0f,0x00,0x20,0xc1,0x00,0x00,0x20,0x91,0x00,0x00,0x20,0x00,0x00,0x00,0x00,
+0x08,0x0f,0x00,0x20,0x61,0x00,0x00,0x20,0x35,0x00,0x00,0x20,0x00,0x00,0x00,0x00,
-0x95,0x0d,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x69,0x0c,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

contrib/loaders/flash/cc26xx/cc26x2_algo.inc

@@ -1,258 +1,257 @@
 /* Autogenerated with ../../../../src/helper/bin2char.sh */
 0x08,0xb5,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0xdf,0xf8,0x1c,0xd0,0x07,0x48,
-0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xfa,0xdb,
+0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xff,0xf6,
-0x00,0xf0,0xa8,0xf9,0xfe,0xe7,0x00,0x00,0xf0,0x0e,0x00,0x20,0x54,0x13,0x00,0x20,
+0xfa,0xaf,0x00,0xf0,0x71,0xf9,0xfe,0xe7,0xe8,0x0e,0x00,0x20,0x4c,0x13,0x00,0x20,
-0xfc,0x13,0x00,0x20,0x08,0xb5,0x07,0x4b,0x07,0x48,0x03,0x33,0x1b,0x1a,0x06,0x2b,
+0xf4,0x13,0x00,0x20,0x10,0xb5,0x07,0x4c,0x23,0x78,0x00,0x2b,0x07,0xd1,0x06,0x4b,
-0x04,0xd9,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x5c,0xf8,0x08,0xbc,0x01,0xbc,
-0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
-0x08,0x48,0x09,0x49,0x09,0x1a,0x89,0x10,0x08,0xb5,0xcb,0x0f,0x59,0x18,0x49,0x10,
-0x04,0xd0,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x44,0xf8,0x08,0xbc,0x01,0xbc,
-0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
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+0x43,0x00,0x00,0x00,0x10,0x0f,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0xfc,0x11,0x00,0x20,0x64,0x12,0x00,0x20,0xcc,0x12,0x00,0x20,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x0f,0x00,0x20,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x0f,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0e,0x33,0xcd,0xab,0x34,0x12,0x6d,0xe6,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0xec,0xde,0x05,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x0e,0x33,0xcd,0xab,0x34,0x12,0x6d,0xe6,0xec,0xde,0x05,0x00,0x0b,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -307,8 +306,9 @@
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-0x18,0x0f,0x00,0x20,0xc1,0x00,0x00,0x20,0x91,0x00,0x00,0x20,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x0f,0x00,0x20,0x61,0x00,0x00,0x20,
-0x95,0x0d,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x35,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x6d,0x0c,0x00,0x20,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

contrib/loaders/flash/cc26xx/flash.c

@@ -42,7 +42,7 @@ typedef uint32_t (*flash_sector_erase_pntr_t) (uint32_t);
 *
 ******************************************************************************/
 static void issue_fsm_command(flash_state_command_t command);
-static void enable_sectors_for_write(void);
+static void enable_sectors_for_write(uint32_t);
 static uint32_t scale_cycle_values(uint32_t specified_timing,
 	uint32_t scale_value);
 static void set_write_mode(void);
@@ -80,9 +80,14 @@ uint32_t flash_bank_erase(bool force_precondition)
 	uint32_t error_return;
 	uint32_t sector_address;
 	uint32_t reg_val;
+	uint32_t bank_no;
+	uint32_t top_bank_start_addr = (HWREG(FLASH_BASE + FLASH_O_FCFG_B1_START) &
+					FLASH_FCFG_B1_START_B1_START_ADDR_M)
+					>> FLASH_FCFG_B1_START_B1_START_ADDR_S;
 
+	for (bank_no = 0; bank_no < flash_bank_count(); bank_no++) {
 		/* Enable all sectors for erase. */
-	enable_sectors_for_write();
+		enable_sectors_for_write(bank_no);
 
 		/* Clear the Status register. */
 		issue_fsm_command(FAPI_CLEAR_STATUS);
@@ -97,6 +102,9 @@ uint32_t flash_bank_erase(bool force_precondition)
 				FLASH_FSM_ST_MACHINE_DO_PRECOND;
 		HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
 
+		// Write address to FADDR register.
+		HWREG(FLASH_BASE + FLASH_O_FADDR) = ADDR_OFFSET + (bank_no * top_bank_start_addr);
+
 		/* Issue the bank erase command to the FSM. */
 		issue_fsm_command(FAPI_ERASE_BANK);
 
@@ -107,9 +115,6 @@ uint32_t flash_bank_erase(bool force_precondition)
 		/* Update status. */
 		error_return = flash_check_fsm_for_error();
 
-	/* Disable sectors for erase. */
-	flash_disable_sectors_for_write();
-
 		/* Set configured precondition mode since it may have been forced on. */
 		if (!(reg_val & FLASH_FSM_ST_MACHINE_DO_PRECOND)) {
 			HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
@@ -118,6 +123,10 @@ uint32_t flash_bank_erase(bool force_precondition)
 			HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
 		}
 
+		if (error_return != FAPI_STATUS_SUCCESS)
+			break;
+	}
+
 	/* Program security data to default values in the customer configuration */
 	/* area within the flash top sector if erase was successful. */
 	if (error_return == FAPI_STATUS_SUCCESS) {
@@ -128,6 +137,9 @@ uint32_t flash_bank_erase(bool force_precondition)
 							CCFG_SIZE_SECURITY);
 	}
 
+	/* Disable sectors for erase. */
+	flash_disable_sectors_for_write();
+
 	/* Return status of operation. */
 	return error_return;
 }
@@ -161,9 +173,16 @@ uint32_t flash_program(uint8_t *data_buffer, uint32_t address, uint32_t count)
 ******************************************************************************/
 void flash_disable_sectors_for_write(void)
 {
+	uint32_t bank_no;
+
 	/* Configure flash back to read mode */
 	set_read_mode();
 
+	for (bank_no = 0; bank_no < flash_bank_count(); bank_no++) {
+
+		/* Select flash bank. */
+		HWREG(FLASH_BASE + FLASH_O_FMAC) = bank_no;
+
 		/* Disable Level 1 Protection. */
 		HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;
 
@@ -180,6 +199,10 @@ void flash_disable_sectors_for_write(void)
 		HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
 	}
 
+	// Select bank 0
+	HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x0;
+}
+
 /******************************************************************************
 *
 * Issues a command to the Flash State Machine.
@@ -214,7 +237,7 @@ static void issue_fsm_command(flash_state_command_t command)
 * the FLASH_O_FSM_SECTOR1 register.
 *
 ******************************************************************************/
-static void enable_sectors_for_write(void)
+static void enable_sectors_for_write(uint32_t bank_no)
 {
 	/* Trim flash module for program/erase operation. */
 	trim_for_write();
@@ -223,7 +246,7 @@ static void enable_sectors_for_write(void)
 	set_write_mode();
 
 	/* Select flash bank. */
-	HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x00;
+	HWREG(FLASH_BASE + FLASH_O_FMAC) = bank_no;
 
 	/* Disable Level 1 Protection. */
 	HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;

contrib/loaders/flash/cc26xx/flash.h

@@ -246,6 +246,46 @@ static inline uint32_t flash_check_fsm_for_ready(void)
 		return FAPI_STATUS_FSM_READY;
 }
 
+/******************************************************************************
+ *
+ * Get the number of banks
+ *
+ * This function returns the number of bank of the flash.
+ *
+ * Returns the number of banks
+ *
+ ******************************************************************************/
+static inline uint32_t flash_bank_count(void)
+{
+	uint32_t bank_count;
+
+	bank_count = (HWREG(FLASH_BASE + FLASH_O_FCFG_BANK) &
+		FLASH_FCFG_BANK_MAIN_NUM_BANK_M) >>
+		FLASH_FCFG_BANK_MAIN_NUM_BANK_S;
+
+	return bank_count;
+}
+
+/******************************************************************************
+ *
+ * Get the size of the bank.
+ *
+ * This function returns the size of the main bank in number of bytes.
+ *
+ * Returns the flash size in number of bytes.
+ *
+ ******************************************************************************/
+static inline uint8_t flash_bank_width(void)
+{
+	uint8_t bank_width;
+
+	bank_width = (uint8_t)(((HWREG(FLASH_BASE + FLASH_O_FCFG_BANK) &
+		FLASH_FCFG_BANK_MAIN_BANK_WIDTH_M) >>
+		FLASH_FCFG_BANK_MAIN_BANK_WIDTH_S) >> 3);
+
+	return bank_width;
+}
+
 /******************************************************************************
 *
 * Erase a flash sector.

contrib/loaders/flash/cc26xx/hw_regs.h

@@ -116,6 +116,10 @@
 /* FMC Sequential Pump Information */
 #define FLASH_O_FSEQPMP                                             0x000020A8
 
+#define FLASH_O_FADDR                                               0x00002110
+
+#define FLASH_O_FWPWRITE0                                           0x00002120
+
 /* FMC FSM Command */
 #define FLASH_O_FSM_CMD                                             0x0000220C
 
@@ -179,9 +183,14 @@
 /* FMC FSM Sector Erased  2 */
 #define FLASH_O_FSM_SECTOR2                                         0x000022C4
 
+#define FLASH_O_FCFG_BANK                                           0x00002400
+
 /* FMC Flash Bank 0 Starting Address */
 #define FLASH_O_FCFG_B0_START                                       0x00002410
 
+/* FMC Flash Bank 1 Starting Address */
+#define FLASH_O_FCFG_B1_START                                       0x00002414
+
 /* FMC Flash Bank 0 Sector Size 0 */
 #define FLASH_O_FCFG_B0_SSIZE0                                      0x00002430
 
@@ -1353,4 +1362,16 @@
 * 1: DCDC and GLDO are bypassed and an external regulator supplies VDDR */
 #define AON_PMCTL_PWRCTL_EXT_REG_MODE                               0x00000002
 
+/* Field:   [3:0] MAIN_NUM_BANK */
+#define FLASH_FCFG_BANK_MAIN_NUM_BANK_M 0x0000000F
+#define FLASH_FCFG_BANK_MAIN_NUM_BANK_S 0
+
+/* Field:  [23:0] B1_START_ADDR */
+#define FLASH_FCFG_B1_START_B1_START_ADDR_M 0x00FFFFFF
+#define FLASH_FCFG_B1_START_B1_START_ADDR_S 0
+
+/* Field:  [15:4] MAIN_BANK_WIDTH */
+#define FLASH_FCFG_BANK_MAIN_BANK_WIDTH_M 0x0000FFF0
+#define FLASH_FCFG_BANK_MAIN_BANK_WIDTH_S 4
+
 #endif /* #ifndef OPENOCD_LOADERS_FLASH_CC26XX_HW_REGS_H */

contrib/loaders/flash/dw-spi/Makefile

@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+TOOLCHAIN:=mipsel-linux-gnu-
+CC:=$(TOOLCHAIN)gcc
+OBJCOPY:=$(TOOLCHAIN)objcopy
+CFLAGS:=-O2 -Wall -Wextra -fpic -Wno-int-to-pointer-cast
+SRC=dw-spi.c
+OBJ=$(patsubst %.c, %.o,$(SRC))
+
+# sparx-iv
+ifeq ($(TOOLCHAIN),mipsel-linux-gnu-)
+	CFLAGS+= -march=24kec
+endif
+
+all: \
+	$(TOOLCHAIN)transaction.inc \
+	$(TOOLCHAIN)erase.inc \
+	$(TOOLCHAIN)check_fill.inc \
+	$(TOOLCHAIN)program.inc \
+	$(TOOLCHAIN)read.inc
+
+$(TOOLCHAIN)%.bin: $(OBJ)
+	$(OBJCOPY) --dump-section .$*=$@ $<
+
+%.inc: %.bin
+	xxd -i > $@ < $<
+
+.PHONY: clean
+clean:
+	rm -rf .ccls-cache
+	find . \( \
+	-iname "*.o" \
+	-o -iname "*.bin" \
+	-o -iname "*.inc" \
+	\) -delete

contrib/loaders/flash/dw-spi/dw-spi.c

@@ -0,0 +1,246 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/**
+ * @file
+ * Helper functions for DesignWare SPI Core driver.
+ * These helpers are loaded into CPU and execute Flash manipulation algorithms
+ * at full CPU speed. Due to inability to control nCS pin, this is the only way
+ * to communicate with Flash chips connected via DW SPI serial interface.
+ *
+ * In order to avoid using stack, all functions used in helpers are inlined.
+ * Software breakpoints are used to terminate helpers.
+ *
+ * Pushing byte to TX FIFO does not make byte immediately available in RX FIFO
+ * and nCS is only asserted when TX FIFO is not empty. General approach is to
+ * fill TX FIFO with as many bytes as possible, at the same time reading
+ * available bytes from RX FIFO.
+ *
+ * This file contains helper functions.
+ */
+
+#include "dw-spi.h"
+
+#include "../../../../src/flash/nor/dw-spi-helper.h"
+
+/**
+ * @brief Generic flash transaction.
+ *
+ * @param[in] arg: Function arguments.
+ */
+__attribute__((section(".transaction"))) void
+transaction(struct dw_spi_transaction *arg)
+{
+	register uint8_t *buffer_tx = (uint8_t *)arg->buffer;
+	register uint8_t *buffer_rx = buffer_tx;
+	register uint32_t size = arg->size;
+	register volatile uint8_t *status = (uint8_t *)arg->status_reg;
+	register volatile uint8_t *data = (uint8_t *)arg->data_reg;
+
+	wait_tx_finish(status);
+	flush_rx(status, data);
+
+	for (; size > 0; size--) {
+		send_u8(status, data, *buffer_tx++);
+		if (arg->read_flag && rx_available(status))
+			*buffer_rx++ = rcv_byte(data);
+	}
+
+	// Pushed all data to TX FIFO. Read bytes left in RX FIFO.
+	if (arg->read_flag) {
+		while (buffer_rx < buffer_tx) {
+			wait_rx_available(status);
+			*buffer_rx++ = rcv_byte(data);
+		}
+	}
+
+	RETURN;
+}
+
+/**
+ * @brief Check flash sectors are filled with pattern. Primary use for
+ * checking sector erase state.
+ *
+ * @param[in] arg: Function arguments.
+ */
+__attribute__((section(".check_fill"))) void
+check_fill(struct dw_spi_check_fill *arg)
+{
+	register uint32_t tx_size;
+	register uint32_t rx_size;
+	register uint32_t dummy_count;
+	register uint8_t filled;
+	register uint8_t *fill_status_array = (uint8_t *)arg->fill_status_array;
+	register volatile uint8_t *status = (uint8_t *)arg->status_reg;
+	register volatile uint8_t *data = (uint8_t *)arg->data_reg;
+
+	for (; arg->sector_count > 0; arg->sector_count--,
+								  arg->address += arg->sector_size,
+								  fill_status_array++) {
+		wait_tx_finish(status);
+		flush_rx(status, data);
+
+		/*
+		 * Command byte and address bytes make up for dummy_count number of
+		 * bytes, that must be skipped in RX FIFO before actual data arrives.
+		 */
+		send_u8(status, data, arg->read_cmd);
+		if (arg->four_byte_mode) {
+			dummy_count = 1 + 4; // Command byte + 4 address bytes
+			send_u32(status, data, arg->address);
+		} else {
+			dummy_count = 1 + 3; // Command byte + 3 address bytes
+			send_u24(status, data, arg->address);
+		}
+
+		for (tx_size = arg->sector_size, rx_size = arg->sector_size, filled = 1;
+			 tx_size > 0; tx_size--) {
+			send_u8(status, data, 0); // Dummy write to push out read data.
+			if (rx_available(status)) {
+				if (dummy_count > 0) {
+					// Read data not arrived yet.
+					rcv_byte(data);
+					dummy_count--;
+				} else {
+					if (rcv_byte(data) != arg->pattern) {
+						filled = 0;
+						break;
+					}
+					rx_size--;
+				}
+			}
+		}
+		if (filled) {
+			for (; rx_size > 0; rx_size--) {
+				wait_rx_available(status);
+				if (rcv_byte(data) != arg->pattern) {
+					filled = 0;
+					break;
+				}
+			}
+		}
+		*fill_status_array = filled;
+	}
+
+	RETURN;
+}
+
+/**
+ * @brief Erase flash sectors.
+ *
+ * @param[in] arg: Function arguments.
+ */
+__attribute__((section(".erase"))) void
+erase(struct dw_spi_erase *arg)
+{
+	register uint32_t address = arg->address;
+	register uint32_t count = arg->sector_count;
+	register volatile uint8_t *status = (uint8_t *)arg->status_reg;
+	register volatile uint8_t *data = (uint8_t *)arg->data_reg;
+
+	for (; count > 0; count--, address += arg->sector_size) {
+		write_enable(status, data, arg->write_enable_cmd);
+		wait_write_enable(status, data, arg->read_status_cmd,
+						  arg->write_enable_mask);
+
+		erase_sector(status, data, arg->erase_sector_cmd, address,
+					 arg->four_byte_mode);
+		wait_busy(status, data, arg->read_status_cmd, arg->busy_mask);
+	}
+
+	RETURN;
+}
+
+/**
+ * @brief Flash program.
+ *
+ * @param[in] arg: Function arguments.
+ */
+__attribute__((section(".program"))) void
+program(struct dw_spi_program *arg)
+{
+	register uint8_t *buffer = (uint8_t *)arg->buffer;
+	register uint32_t buffer_size = arg->buffer_size;
+	register volatile uint8_t *status = (uint8_t *)arg->status_reg;
+	register volatile uint8_t *data = (uint8_t *)arg->data_reg;
+	register uint32_t page_size;
+
+	while (buffer_size > 0) {
+		write_enable(status, data, arg->write_enable_cmd);
+		wait_write_enable(status, data, arg->read_status_cmd,
+						  arg->write_enable_mask);
+
+		wait_tx_finish(status);
+
+		send_u8(status, data, arg->program_cmd);
+		if (arg->four_byte_mode)
+			send_u32(status, data, arg->address);
+		else
+			send_u24(status, data, arg->address);
+
+		for (page_size = MIN(arg->page_size, buffer_size); page_size > 0;
+			 page_size--, buffer_size--) {
+			send_u8(status, data, *buffer++);
+		}
+		arg->address += arg->page_size;
+		wait_busy(status, data, arg->read_status_cmd, arg->busy_mask);
+	}
+
+	RETURN;
+}
+
+/**
+ * @brief Read data from flash.
+ *
+ * @param[in] arg: Function arguments.
+ */
+__attribute__((section(".read"))) void
+read(struct dw_spi_read *arg)
+{
+	register uint32_t tx_size = arg->buffer_size;
+	register uint32_t rx_size = arg->buffer_size;
+	register uint32_t dummy_count;
+	register uint8_t *buffer = (uint8_t *)arg->buffer;
+	register volatile uint8_t *status = (uint8_t *)arg->status_reg;
+	register volatile uint8_t *data = (uint8_t *)arg->data_reg;
+
+	wait_tx_finish(status);
+	flush_rx(status, data);
+
+	/*
+	 * Command byte and address bytes make up for dummy_count number of
+	 * bytes, that must be skipped in RX FIFO before actual data arrives.
+	 */
+	send_u8(status, data, arg->read_cmd);
+	if (arg->four_byte_mode) {
+		dummy_count = 1 + 4; // Command byte + 4 address bytes
+		send_u32(status, data, arg->address);
+	} else {
+		dummy_count = 1 + 3; // Command byte + 3 address bytes
+		send_u24(status, data, arg->address);
+	}
+
+	for (; tx_size > 0; tx_size--) {
+		send_u8(status, data, 0); // Dummy write to push out read data.
+		if (rx_available(status)) {
+			if (dummy_count > 0) {
+				rcv_byte(data);
+				dummy_count--;
+			} else {
+				*buffer++ = rcv_byte(data);
+				rx_size--;
+			}
+		}
+	}
+	while (rx_size > 0) {
+		wait_rx_available(status);
+		if (dummy_count > 0) {
+			// Read data not arrived yet.
+			rcv_byte(data);
+			dummy_count--;
+		} else {
+			*buffer++ = rcv_byte(data);
+			rx_size--;
+		}
+	}
+
+	RETURN;
+}

contrib/loaders/flash/dw-spi/dw-spi.h

@@ -0,0 +1,313 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/**
+ * @file
+ * Helper functions for DesignWare SPI Core driver.
+ * These helpers are loaded into CPU and execute Flash manipulation algorithms
+ * at full CPU speed. Due to inability to control nCS pin, this is the only way
+ * to communicate with Flash chips connected via DW SPI serial interface.
+ *
+ * In order to avoid using stack, all functions used in helpers are inlined.
+ * Software breakpoints are used to terminate helpers.
+ *
+ * This file contains functions, common to helpers.
+ */
+
+#ifndef _DW_SPI_H_
+#define _DW_SPI_H_
+
+#include <stdint.h>
+#include <sys/param.h>
+
+#include "../../../../src/helper/types.h"
+
+/**
+ * @brief SI busy status bit.
+ *
+ * Set when serial transfer is in progress, cleared when master is idle or
+ * disabled.
+ */
+#define DW_SPI_STATUS_BUSY 0x01
+
+/**
+ * @brief SI TX FIFO not full status bit.
+ *
+ * Set when TX FIFO has room for one or more data-word.
+ */
+#define DW_SPI_STATUS_TFNF 0x02
+
+/**
+ * @brief SI TX FIFO empty status bit.
+ */
+#define DW_SPI_STATUS_TFE 0x04
+
+/**
+ * @brief SI RX FIFO not empty status bit.
+ */
+#define DW_SPI_STATUS_RFNE 0x08
+
+/**
+ * @brief Return from helper function.
+ */
+#define RETURN            \
+	do {                  \
+		asm("sdbbp\n\t"); \
+		return;           \
+	} while (0)
+
+/**
+ * @brief Append byte to TX FIFO.
+ *
+ * For each transferred byte, DW SPI controller receives a byte into RX FIFO.
+ * Slave data are read by pushing dummy bytes to TX FIFO.
+ *
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] byte: Data to push.
+ */
+__attribute__((always_inline)) static inline void
+_send_byte(volatile uint8_t *dr, uint8_t byte)
+{
+	*dr = byte;
+}
+
+/**
+ * @brief Get byte from RX FIFO.
+ *
+ * Reading RX byte removes it from RX FIFO.
+ *
+ * @param[in] dr: Pointer to DR register.
+ * @return RX FIFO byte.
+ */
+__attribute__((always_inline)) static inline uint8_t
+rcv_byte(volatile uint8_t *dr)
+{
+	return *dr;
+}
+
+/**
+ * @brief Check transmission is currently in progress.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @retval 1: Transmission is in progress.
+ * @retval 0: Controller is idle or off.
+ */
+__attribute__((always_inline)) static inline int
+tx_in_progress(volatile uint8_t *sr)
+{
+	return (*sr ^ DW_SPI_STATUS_TFE) & (DW_SPI_STATUS_BUSY | DW_SPI_STATUS_TFE);
+}
+
+/**
+ * @brief Wait for controller to finish previous transaction.
+ *
+ * @param[in] sr: Pointer to SR register.
+ */
+__attribute__((always_inline)) static inline void
+wait_tx_finish(volatile uint8_t *sr)
+{
+	while (tx_in_progress(sr))
+		;
+}
+
+/**
+ * @brief Wait for room in TX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ */
+__attribute__((always_inline)) static inline void
+wait_tx_available(volatile uint8_t *sr)
+{
+	while (!(*sr & DW_SPI_STATUS_TFNF))
+		;
+}
+
+/**
+ * @brief Check for data available in RX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @retval 1: Data available.
+ * @retval 0: No data available.
+ */
+__attribute__((always_inline)) static inline int
+rx_available(volatile uint8_t *sr)
+{
+	return *sr & DW_SPI_STATUS_RFNE;
+}
+
+/**
+ * @brief Wait for data in RX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ */
+__attribute__((always_inline)) static inline void
+wait_rx_available(volatile uint8_t *sr)
+{
+	while (!rx_available(sr))
+		;
+}
+
+/**
+ * @brief Flush RX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ */
+__attribute__((always_inline)) static inline void
+flush_rx(volatile uint8_t *sr, volatile uint8_t *dr)
+{
+	while (*sr & DW_SPI_STATUS_RFNE)
+		*dr;
+}
+
+/**
+ * @brief Append variable number of bytes to TX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] word: Data to append.
+ * @param[in] bytes: Number of bytes to append.
+ */
+__attribute__((always_inline)) static inline void
+_send_bytes(volatile uint8_t *sr, volatile uint8_t *dr, uint32_t word,
+			int bytes)
+{
+	for (register int i = bytes - 1; i >= 0; i--) {
+		wait_tx_available(sr);
+		_send_byte(dr, (word >> (i * 8)) & 0xff);
+	}
+}
+
+/**
+ * @brief Append 8 bit value to TX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] word: Data to push.
+ */
+__attribute__((always_inline)) static inline void
+send_u8(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t byte)
+{
+	wait_tx_available(sr);
+	_send_byte(dr, byte);
+}
+
+/**
+ * @brief Append 24 bit value to TX FIFO.
+ *
+ * Used to send Flash addresses in 24 bit mode.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] word: Data to push.
+ */
+__attribute__((always_inline)) static inline void
+send_u24(volatile uint8_t *sr, volatile uint8_t *dr, uint32_t word)
+{
+	_send_bytes(sr, dr, word, 3);
+}
+
+/**
+ * @brief Append 32 bit value to TX FIFO.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] word: Data to push.
+ */
+__attribute__((always_inline)) static inline void
+send_u32(volatile uint8_t *sr, volatile uint8_t *dr, uint32_t word)
+{
+	_send_bytes(sr, dr, word, 4);
+}
+
+/**
+ * @brief Read chip status register.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] stat_cmd: Read status command.
+ * @return Chip status.
+ */
+__attribute__((always_inline)) static inline uint8_t
+read_status(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t stat_cmd)
+{
+	wait_tx_finish(sr);
+	flush_rx(sr, dr);
+	/*
+	 * Don't bother with wait_tx_available() as TX FIFO is empty
+	 * and we only send two bytes.
+	 */
+	_send_byte(dr, stat_cmd);
+	_send_byte(dr, 0); // Dummy write to push out read data.
+	wait_rx_available(sr);
+	rcv_byte(dr); // Dummy read to skip command byte.
+	wait_rx_available(sr);
+	return rcv_byte(dr);
+}
+
+/**
+ * @brief Enable Flash chip write.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] we_cmd: Write enable command.
+ */
+__attribute__((always_inline)) static inline void
+write_enable(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t we_cmd)
+{
+	wait_tx_finish(sr);
+	_send_byte(dr, we_cmd);
+}
+
+/**
+ * @brief Erase Flash sector.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] erase_cmd: Erase sector cmd.
+ * @param[in] address: Sector address.
+ * @param[in] four_byte_mode: Device is in 32 bit mode flag.
+ */
+__attribute__((always_inline)) static inline void
+erase_sector(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t erase_cmd,
+			 uint32_t address, uint8_t four_byte_mode)
+{
+	wait_tx_finish(sr);
+	_send_byte(dr, erase_cmd);
+	if (four_byte_mode)
+		send_u32(sr, dr, address);
+	else
+		send_u24(sr, dr, address);
+}
+
+/**
+ * @brief Wait for write enable flag.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] stat_cmd: Read status command.
+ * @param[in] we_mask: Write enable status mask.
+ */
+__attribute__((always_inline)) static inline void
+wait_write_enable(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t stat_cmd,
+				  uint8_t we_mask)
+{
+	while (!(read_status(sr, dr, stat_cmd) & we_mask))
+		;
+}
+
+/**
+ * @brief Wait while flash is busy.
+ *
+ * @param[in] sr: Pointer to SR register.
+ * @param[in] dr: Pointer to DR register.
+ * @param[in] stat_cmd: Read status command.
+ * @param[in] busy_mask: Flash busy mask.
+ */
+__attribute__((always_inline)) static inline void
+wait_busy(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t stat_cmd,
+		  uint8_t busy_mask)
+{
+	while (read_status(sr, dr, stat_cmd) & busy_mask)
+		;
+}
+
+#endif // _DW_SPI_H_

contrib/loaders/flash/dw-spi/mipsel-linux-gnu-check_fill.inc

@@ -0,0 +1,39 @@
+  0x0b, 0x00, 0x82, 0x88, 0x1f, 0x00, 0x8a, 0x88, 0x0f, 0x00, 0x83, 0x88,
+  0x17, 0x00, 0x86, 0x88, 0x08, 0x00, 0x82, 0x98, 0x1c, 0x00, 0x8a, 0x98,
+  0x0c, 0x00, 0x83, 0x98, 0x14, 0x00, 0x86, 0x98, 0x25, 0x38, 0x80, 0x00,
+  0x54, 0x00, 0x40, 0x10, 0xf8, 0xff, 0x09, 0x24, 0x00, 0x00, 0x64, 0x90,
+  0x05, 0x00, 0x84, 0x30, 0x04, 0x00, 0x84, 0x38, 0xfc, 0xff, 0x80, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
+  0x07, 0x00, 0x40, 0x50, 0x25, 0x00, 0xe5, 0x90, 0x00, 0x00, 0xc2, 0x90,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfc, 0xff, 0x40, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x25, 0x00, 0xe5, 0x90, 0x00, 0x00, 0x62, 0x90,
+  0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0xc5, 0xa0, 0x26, 0x00, 0xe2, 0x90, 0x45, 0x00, 0x40, 0x10,
+  0x03, 0x00, 0xe8, 0x88, 0x00, 0x00, 0xe8, 0x98, 0x18, 0x00, 0x05, 0x24,
+  0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10,
+  0x06, 0x10, 0xa8, 0x00, 0xff, 0x00, 0x42, 0x30, 0xf8, 0xff, 0xa5, 0x24,
+  0x00, 0x00, 0xc2, 0xa0, 0xf8, 0xff, 0xa9, 0x14, 0x05, 0x00, 0x0b, 0x24,
+  0x07, 0x00, 0xe8, 0x88, 0x04, 0x00, 0xe8, 0x98, 0x1e, 0x00, 0x00, 0x11,
+  0x25, 0x28, 0x00, 0x01, 0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30,
+  0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xa0,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0x06, 0x00, 0x40, 0x50,
+  0xff, 0xff, 0xa5, 0x24, 0x00, 0x00, 0xc2, 0x90, 0x25, 0x00, 0x60, 0x51,
+  0x24, 0x00, 0xec, 0x90, 0xff, 0xff, 0x6b, 0x25, 0xff, 0xff, 0xa5, 0x24,
+  0xf1, 0xff, 0xa0, 0x14, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x00, 0x51,
+  0x01, 0x00, 0x04, 0x24, 0x24, 0x00, 0xe5, 0x90, 0x00, 0x00, 0x62, 0x90,
+  0x08, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0xc2, 0x90, 0xff, 0x00, 0x42, 0x30, 0x04, 0x00, 0xa2, 0x14,
+  0xff, 0xff, 0x08, 0x25, 0xf7, 0xff, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00,
+  0x01, 0x00, 0x04, 0x24, 0x00, 0x00, 0x44, 0xa1, 0x0b, 0x00, 0xe2, 0x88,
+  0x01, 0x00, 0x4a, 0x25, 0x08, 0x00, 0xe2, 0x98, 0xff, 0xff, 0x42, 0x24,
+  0x0b, 0x00, 0xe2, 0xa8, 0x08, 0x00, 0xe2, 0xb8, 0x03, 0x00, 0xe4, 0x88,
+  0x07, 0x00, 0xe5, 0x88, 0x00, 0x00, 0xe4, 0x98, 0x04, 0x00, 0xe5, 0x98,
+  0x21, 0x20, 0x85, 0x00, 0x03, 0x00, 0xe4, 0xa8, 0xae, 0xff, 0x40, 0x14,
+  0x00, 0x00, 0xe4, 0xb8, 0x3f, 0x00, 0x00, 0x70, 0x08, 0x00, 0xe0, 0x03,
+  0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x42, 0x30, 0xed, 0xff, 0x82, 0x55,
+  0x00, 0x00, 0x44, 0xa1, 0xd9, 0xff, 0x00, 0x10, 0xff, 0xff, 0x08, 0x25,
+  0x00, 0x00, 0xe8, 0x98, 0x10, 0x00, 0x05, 0x24, 0x00, 0x00, 0x62, 0x90,
+  0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x06, 0x10, 0xa8, 0x00,
+  0xff, 0x00, 0x42, 0x30, 0xf8, 0xff, 0xa5, 0x24, 0x00, 0x00, 0xc2, 0xa0,
+  0xf8, 0xff, 0xa9, 0x14, 0x04, 0x00, 0x0b, 0x24, 0xbc, 0xff, 0x00, 0x10,
+  0x07, 0x00, 0xe8, 0x88

contrib/loaders/flash/dw-spi/mipsel-linux-gnu-erase.inc

@@ -0,0 +1,39 @@
+  0x0b, 0x00, 0x88, 0x88, 0x25, 0x28, 0x80, 0x00, 0x03, 0x00, 0x86, 0x88,
+  0x0f, 0x00, 0x82, 0x88, 0x17, 0x00, 0x84, 0x88, 0x08, 0x00, 0xa8, 0x98,
+  0x00, 0x00, 0xa6, 0x98, 0x0c, 0x00, 0xa2, 0x98, 0x5f, 0x00, 0x00, 0x11,
+  0x14, 0x00, 0xa4, 0x98, 0xf8, 0xff, 0x07, 0x24, 0x1d, 0x00, 0xa9, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x05, 0x00, 0x63, 0x30, 0x04, 0x00, 0x63, 0x38,
+  0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0xa0,
+  0x1c, 0x00, 0xaa, 0x90, 0x1f, 0x00, 0xa9, 0x90, 0x00, 0x00, 0x43, 0x90,
+  0x05, 0x00, 0x63, 0x30, 0x04, 0x00, 0x63, 0x38, 0xfc, 0xff, 0x60, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30,
+  0x06, 0x00, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30, 0xfc, 0xff, 0x60, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8a, 0xa0, 0x00, 0x00, 0x80, 0xa0,
+  0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90, 0x00, 0x00, 0x43, 0x90,
+  0x08, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x83, 0x90, 0x24, 0x18, 0x23, 0x01, 0xe4, 0xff, 0x60, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0xaa, 0x90, 0x21, 0x00, 0xa9, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x05, 0x00, 0x63, 0x30, 0x04, 0x00, 0x63, 0x38,
+  0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8a, 0xa0,
+  0x31, 0x00, 0x20, 0x11, 0x10, 0x00, 0x09, 0x24, 0x18, 0x00, 0x09, 0x24,
+  0x00, 0x00, 0x43, 0x90, 0x02, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10,
+  0x06, 0x18, 0x26, 0x01, 0xff, 0x00, 0x63, 0x30, 0xf8, 0xff, 0x29, 0x25,
+  0xf9, 0xff, 0x27, 0x15, 0x00, 0x00, 0x83, 0xa0, 0x1c, 0x00, 0xaa, 0x90,
+  0x20, 0x00, 0xa9, 0x90, 0x00, 0x00, 0x43, 0x90, 0x05, 0x00, 0x63, 0x30,
+  0x04, 0x00, 0x63, 0x38, 0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30, 0x06, 0x00, 0x60, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90, 0x00, 0x00, 0x43, 0x90,
+  0x08, 0x00, 0x63, 0x30, 0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x8a, 0xa0, 0x00, 0x00, 0x80, 0xa0, 0x00, 0x00, 0x43, 0x90,
+  0x08, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x83, 0x90, 0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30,
+  0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90,
+  0x24, 0x18, 0x23, 0x01, 0xe4, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00,
+  0x07, 0x00, 0xa3, 0x88, 0xff, 0xff, 0x08, 0x25, 0x04, 0x00, 0xa3, 0x98,
+  0xa4, 0xff, 0x00, 0x15, 0x21, 0x30, 0xc3, 0x00, 0x3f, 0x00, 0x00, 0x70,
+  0x08, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x90,
+  0x02, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10, 0x06, 0x18, 0x26, 0x01,
+  0xff, 0x00, 0x63, 0x30, 0xf8, 0xff, 0x29, 0x25, 0xf9, 0xff, 0x27, 0x15,
+  0x00, 0x00, 0x83, 0xa0, 0xd1, 0xff, 0x00, 0x10, 0x1c, 0x00, 0xaa, 0x90

contrib/loaders/flash/dw-spi/mipsel-linux-gnu-program.inc

@@ -0,0 +1,51 @@
+  0x13, 0x00, 0x88, 0x88, 0x25, 0x30, 0x80, 0x00, 0x0b, 0x00, 0x85, 0x88,
+  0x17, 0x00, 0x82, 0x88, 0x1f, 0x00, 0x84, 0x88, 0x10, 0x00, 0xc8, 0x98,
+  0x08, 0x00, 0xc5, 0x98, 0x14, 0x00, 0xc2, 0x98, 0x1c, 0x00, 0xc4, 0x98,
+  0x78, 0x00, 0x00, 0x11, 0xf8, 0xff, 0x07, 0x24, 0x25, 0x00, 0xc9, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x05, 0x00, 0x63, 0x30, 0x04, 0x00, 0x63, 0x38,
+  0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0xa0,
+  0x24, 0x00, 0xca, 0x90, 0x27, 0x00, 0xc9, 0x90, 0x00, 0x00, 0x43, 0x90,
+  0x05, 0x00, 0x63, 0x30, 0x04, 0x00, 0x63, 0x38, 0xfc, 0xff, 0x60, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30,
+  0x06, 0x00, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30, 0xfc, 0xff, 0x60, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8a, 0xa0, 0x00, 0x00, 0x80, 0xa0,
+  0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90, 0x00, 0x00, 0x43, 0x90,
+  0x08, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x83, 0x90, 0x24, 0x18, 0x23, 0x01, 0xe4, 0xff, 0x60, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x90, 0x05, 0x00, 0x63, 0x30,
+  0x04, 0x00, 0x63, 0x38, 0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00,
+  0x26, 0x00, 0xc9, 0x90, 0x00, 0x00, 0x43, 0x90, 0x02, 0x00, 0x63, 0x30,
+  0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0xa0,
+  0x29, 0x00, 0xc3, 0x90, 0x47, 0x00, 0x60, 0x10, 0x03, 0x00, 0xca, 0x88,
+  0x00, 0x00, 0xca, 0x98, 0x18, 0x00, 0x09, 0x24, 0x00, 0x00, 0x43, 0x90,
+  0x02, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10, 0x06, 0x18, 0x2a, 0x01,
+  0xff, 0x00, 0x63, 0x30, 0xf8, 0xff, 0x29, 0x25, 0x00, 0x00, 0x83, 0xa0,
+  0xf8, 0xff, 0x27, 0x15, 0x25, 0x58, 0x00, 0x01, 0x07, 0x00, 0xc3, 0x88,
+  0x04, 0x00, 0xc3, 0x98, 0x2b, 0x48, 0x03, 0x01, 0x0a, 0x58, 0x69, 0x00,
+  0x0d, 0x00, 0x60, 0x11, 0x21, 0x50, 0xab, 0x00, 0x00, 0x00, 0xa9, 0x90,
+  0x01, 0x00, 0xa5, 0x24, 0x00, 0x00, 0x43, 0x90, 0x02, 0x00, 0x63, 0x30,
+  0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0xa0,
+  0xf9, 0xff, 0xaa, 0x54, 0x00, 0x00, 0xa9, 0x90, 0x07, 0x00, 0xc3, 0x88,
+  0x23, 0x40, 0x0b, 0x01, 0x04, 0x00, 0xc3, 0x98, 0x03, 0x00, 0xc9, 0x88,
+  0x00, 0x00, 0xc9, 0x98, 0x21, 0x18, 0x23, 0x01, 0x03, 0x00, 0xc3, 0xa8,
+  0x00, 0x00, 0xc3, 0xb8, 0x24, 0x00, 0xca, 0x90, 0x28, 0x00, 0xc9, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x05, 0x00, 0x63, 0x30, 0x04, 0x00, 0x63, 0x38,
+  0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0x90,
+  0x08, 0x00, 0x63, 0x30, 0x06, 0x00, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x83, 0x90, 0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30,
+  0xfc, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8a, 0xa0,
+  0x00, 0x00, 0x80, 0xa0, 0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30,
+  0xfd, 0xff, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90,
+  0x00, 0x00, 0x43, 0x90, 0x08, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x90, 0x24, 0x18, 0x23, 0x01,
+  0xe4, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x8b, 0xff, 0x00, 0x55,
+  0x25, 0x00, 0xc9, 0x90, 0x3f, 0x00, 0x00, 0x70, 0x08, 0x00, 0xe0, 0x03,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xca, 0x98, 0x10, 0x00, 0x09, 0x24,
+  0x00, 0x00, 0x43, 0x90, 0x02, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10,
+  0x06, 0x18, 0x2a, 0x01, 0xff, 0x00, 0x63, 0x30, 0xf8, 0xff, 0x29, 0x25,
+  0x00, 0x00, 0x83, 0xa0, 0xf8, 0xff, 0x27, 0x15, 0x25, 0x58, 0x00, 0x01,
+  0x07, 0x00, 0xc3, 0x88, 0x04, 0x00, 0xc3, 0x98, 0x2b, 0x48, 0x03, 0x01,
+  0x0a, 0x58, 0x69, 0x00, 0xbb, 0xff, 0x60, 0x15, 0x21, 0x50, 0xab, 0x00,
+  0xc6, 0xff, 0x00, 0x10, 0x03, 0x00, 0xc9, 0x88

contrib/loaders/flash/dw-spi/mipsel-linux-gnu-read.inc

@@ -0,0 +1,33 @@
+  0x0f, 0x00, 0x87, 0x88, 0x07, 0x00, 0x88, 0x88, 0x13, 0x00, 0x83, 0x88,
+  0x1b, 0x00, 0x85, 0x88, 0x0c, 0x00, 0x87, 0x98, 0x04, 0x00, 0x88, 0x98,
+  0x10, 0x00, 0x83, 0x98, 0x18, 0x00, 0x85, 0x98, 0x00, 0x00, 0x62, 0x90,
+  0x05, 0x00, 0x42, 0x30, 0x04, 0x00, 0x42, 0x38, 0xfc, 0xff, 0x40, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
+  0x07, 0x00, 0x40, 0x50, 0x20, 0x00, 0x86, 0x90, 0x00, 0x00, 0xa2, 0x90,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfc, 0xff, 0x40, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x86, 0x90, 0x00, 0x00, 0x62, 0x90,
+  0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0xa6, 0xa0, 0x21, 0x00, 0x82, 0x90, 0x35, 0x00, 0x40, 0x10,
+  0x03, 0x00, 0x82, 0x88, 0x18, 0x00, 0x06, 0x24, 0xf8, 0xff, 0x09, 0x24,
+  0x00, 0x00, 0x82, 0x98, 0x25, 0x20, 0x40, 0x00, 0x00, 0x00, 0x62, 0x90,
+  0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x06, 0x10, 0xc4, 0x00,
+  0xff, 0x00, 0x42, 0x30, 0xf8, 0xff, 0xc6, 0x24, 0xf9, 0xff, 0xc9, 0x14,
+  0x00, 0x00, 0xa2, 0xa0, 0x05, 0x00, 0x06, 0x24, 0x23, 0x00, 0xe0, 0x10,
+  0x25, 0x20, 0xe0, 0x00, 0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30,
+  0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xa0,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0x06, 0x00, 0x40, 0x50,
+  0xff, 0xff, 0x84, 0x24, 0x00, 0x00, 0xa2, 0x90, 0x14, 0x00, 0xc0, 0x50,
+  0x00, 0x00, 0x02, 0xa1, 0xff, 0xff, 0xc6, 0x24, 0xff, 0xff, 0x84, 0x24,
+  0xf1, 0xff, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0xe0, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
+  0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa2, 0x90,
+  0x03, 0x00, 0xc0, 0x50, 0xff, 0xff, 0xe7, 0x24, 0xf8, 0xff, 0x00, 0x10,
+  0xff, 0xff, 0xc6, 0x24, 0x06, 0x00, 0xe0, 0x10, 0x00, 0x00, 0x02, 0xa1,
+  0xf4, 0xff, 0x00, 0x10, 0x01, 0x00, 0x08, 0x25, 0xff, 0xff, 0xe7, 0x24,
+  0xec, 0xff, 0x00, 0x10, 0x01, 0x00, 0x08, 0x25, 0x3f, 0x00, 0x00, 0x70,
+  0x08, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x06, 0x24,
+  0xf8, 0xff, 0x09, 0x24, 0x00, 0x00, 0x82, 0x98, 0x25, 0x20, 0x40, 0x00,
+  0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10,
+  0x06, 0x10, 0xc4, 0x00, 0xff, 0x00, 0x42, 0x30, 0xf8, 0xff, 0xc6, 0x24,
+  0xf9, 0xff, 0xc9, 0x14, 0x00, 0x00, 0xa2, 0xa0, 0xcc, 0xff, 0x00, 0x10,
+  0x04, 0x00, 0x06, 0x24

contrib/loaders/flash/dw-spi/mipsel-linux-gnu-transaction.inc

@@ -0,0 +1,21 @@
+  0x03, 0x00, 0x85, 0x88, 0x0b, 0x00, 0x88, 0x88, 0x0f, 0x00, 0x83, 0x88,
+  0x17, 0x00, 0x86, 0x88, 0x00, 0x00, 0x85, 0x98, 0x08, 0x00, 0x88, 0x98,
+  0x0c, 0x00, 0x83, 0x98, 0x14, 0x00, 0x86, 0x98, 0x00, 0x00, 0x62, 0x90,
+  0x05, 0x00, 0x42, 0x30, 0x04, 0x00, 0x42, 0x38, 0xfc, 0xff, 0x40, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
+  0x06, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0x90,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfc, 0xff, 0x40, 0x14,
+  0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00,
+  0x25, 0x38, 0xa0, 0x00, 0x21, 0x40, 0x05, 0x01, 0x00, 0x00, 0xa9, 0x90,
+  0x01, 0x00, 0xa5, 0x24, 0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30,
+  0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc9, 0xa0,
+  0x1c, 0x00, 0x82, 0x90, 0x08, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0x04, 0x00, 0x40, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0x90, 0x01, 0x00, 0xe7, 0x24,
+  0xff, 0xff, 0xe2, 0xa0, 0xef, 0xff, 0xa8, 0x54, 0x00, 0x00, 0xa9, 0x90,
+  0x1c, 0x00, 0x82, 0x90, 0x0c, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x2b, 0x10, 0xe8, 0x00, 0x09, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0x90, 0x01, 0x00, 0xe7, 0x24,
+  0xf9, 0xff, 0x07, 0x15, 0xff, 0xff, 0xe2, 0xa0, 0x3f, 0x00, 0x00, 0x70,
+  0x08, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00

contrib/loaders/flash/fespi/riscv_fespi.c

@@ -103,7 +103,7 @@ static void fespi_disable_hw_mode(volatile uint32_t *ctrl_base);
 static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base);
 static int fespi_wip(volatile uint32_t *ctrl_base);
 static int fespi_write_buffer(volatile uint32_t *ctrl_base,
-		const uint8_t *buffer, unsigned offset, unsigned len,
+		const uint8_t *buffer, unsigned int offset, unsigned int len,
 		uint32_t flash_info);
 
 /* Can set bits 3:0 in result. */
@@ -113,7 +113,7 @@ static int fespi_write_buffer(volatile uint32_t *ctrl_base,
  *               after pprog_cmd
  */
 int flash_fespi(volatile uint32_t *ctrl_base, uint32_t page_size,
-		const uint8_t *buffer, unsigned offset, uint32_t count,
+		const uint8_t *buffer, unsigned int offset, uint32_t count,
 		uint32_t flash_info)
 {
 	int result;
@@ -163,12 +163,12 @@ err:
 	return result;
 }
 
-static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned address)
+static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned int address)
 {
 	return ctrl_base[address / 4];
 }
 
-static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned address, uint32_t value)
+static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned int address, uint32_t value)
 {
 	ctrl_base[address / 4] = value;
 }
@@ -188,7 +188,7 @@ static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base)
 /* Can set bits 7:4 in result. */
 static int fespi_txwm_wait(volatile uint32_t *ctrl_base)
 {
-	unsigned timeout = TIMEOUT;
+	unsigned int timeout = TIMEOUT;
 
 	while (timeout--) {
 		uint32_t ip = fespi_read_reg(ctrl_base, FESPI_REG_IP);
@@ -209,7 +209,7 @@ static void fespi_set_dir(volatile uint32_t *ctrl_base, bool dir)
 /* Can set bits 11:8 in result. */
 static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in)
 {
-	unsigned timeout = TIMEOUT;
+	unsigned int timeout = TIMEOUT;
 
 	while (timeout--) {
 		uint32_t txfifo = fespi_read_reg(ctrl_base, FESPI_REG_TXFIFO);
@@ -224,7 +224,7 @@ static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in)
 /* Can set bits 15:12 in result. */
 static int fespi_rx(volatile uint32_t *ctrl_base, uint8_t *out)
 {
-	unsigned timeout = TIMEOUT;
+	unsigned int timeout = TIMEOUT;
 
 	while (timeout--) {
 		uint32_t value = fespi_read_reg(ctrl_base, FESPI_REG_RXFIFO);
@@ -252,7 +252,7 @@ static int fespi_wip(volatile uint32_t *ctrl_base)
 	if (result != ERROR_OK)
 		return result | ERROR_STACK(0x20000);
 
-	unsigned timeout = TIMEOUT;
+	unsigned int timeout = TIMEOUT;
 	while (timeout--) {
 		result = fespi_tx(ctrl_base, 0);
 		if (result != ERROR_OK)
@@ -273,7 +273,7 @@ static int fespi_wip(volatile uint32_t *ctrl_base)
 
 /* Can set bits 23:20 in result. */
 static int fespi_write_buffer(volatile uint32_t *ctrl_base,
-		const uint8_t *buffer, unsigned offset, unsigned len,
+		const uint8_t *buffer, unsigned int offset, unsigned int len,
 		uint32_t flash_info)
 {
 	int result = fespi_tx(ctrl_base, SPIFLASH_WRITE_ENABLE);
@@ -304,7 +304,7 @@ static int fespi_write_buffer(volatile uint32_t *ctrl_base,
 	if (result != ERROR_OK)
 		return result | ERROR_STACK(0x600000);
 
-	for (unsigned i = 0; i < len; i++) {
+	for (unsigned int i = 0; i < len; i++) {
 		result = fespi_tx(ctrl_base, buffer[i]);
 		if (result != ERROR_OK)
 			return result | ERROR_STACK(0x700000);

contrib/rtos-helpers/uCOS-III-openocd.c

@@ -1,4 +1,13 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-License-Identifier: Apache-2.0
+
+/*
+ * The original version of this file did not reported any license nor
+ * copyright, but the author clearly stated that:
+ * "This file should be linked along with the [uC/OS-III user's] project
+ *  to enable RTOS support for uC/OS-III."
+ * Such statement implies the willing to have this file's license compatible
+ * with the license Apache 2.0 of uC/OS-III.
+ */
 
 /*
  * uC/OS-III does not provide a fixed layout for OS_TCB, which makes it

doc/Makefile.am

@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 info_TEXINFOS += %D%/openocd.texi
 %C%_openocd_TEXINFOS = %D%/fdl.texi
 

doc/manual/jtag/drivers/remote_bitbang.txt

@@ -77,7 +77,12 @@ The read responses are encoded in ASCII as either digit 0 or 1.
 If the use_remote_sleep option is set to 'yes', two additional requests may
 be sent:
 
-	D - Sleep for 1 millisecond
+	Z - Sleep for 1 millisecond
-	d - Sleep for 1 microsecond
+	z - Sleep for 1 microsecond
+
+NOTE: Previously these were specified as 'D' and 'd', which conflicts with the
+"SWD write 0 0" command defined above. Adapters that implement Dd for remote
+sleep must be updated to work with Zz.
+
 
  */

doc/manual/style.txt

@@ -97,6 +97,21 @@ OpenOCD project.
       x = 0;
   }
   @endcode
+- on <tt> if </tt> statements where the condition is split among multiple
+  lines, increase the indentation of the condition to prevent it to match
+  to the indentation of the <tt> then </tt> block due to length of 'if ('
+  being same of the TAB width of 4 characters. Use:
+  @code
+  if (CMD_ARGC < 3
+          || CMD_ARGC > 8)
+      return ERROR_COMMAND_SYNTAX_ERROR;
+  @endcode
+  instead of:
+  @code
+  if (CMD_ARGC < 3 ||
+      CMD_ARGC > 8)
+      return ERROR_COMMAND_SYNTAX_ERROR;
+  @endcode
 
 Finally, try to avoid lines of code that are longer than 72-80 columns:
 
@@ -210,6 +225,21 @@ if (!buf) {
 }
 @endcode
 
+@section stylelogging Logging
+
+Logging is intended to provide human-readable information to users.
+Do not confuse logging with the output of commands.
+The latter is intended for the result of a command and should be able to be processed by Tcl scripts.
+
+ - Use one of the following functions to generate log messages, never use `printf()` or similar functions.
+   - Use `LOG_ERROR()` to provide information in case an operation failed in an unrecoverable way. For example, if necessary memory cannot be allocated.
+   - Use `LOG_WARNING()` to inform the user of about an unexpected behavior that can be handled and the intended operation is still be performed. For example, in case a command is deprecated but is nevertheless executed.
+   - Use `LOG_INFO()` to provide insightful or necessary information to the user. For example, features or capabilities of a discovered target.
+   - Use `LOG_DEBUG()` to provide information for troubleshooting. For example, detailed information which makes it easier to debug a specific operation. Try to avoid flooding the log with frequently generated messages. For example, do not use LOG_DEBUG() in operations used for polling the target. Use LOG_DEBUG_IO() for such frequent messages.
+   - Use `LOG_DEBUG_IO()` to provide I/O related information for troubleshooting. For example, details about the communication between OpenOCD and a debug adapter.
+ - If the log message is related to a target, use the corresponding `LOG_TARGET_xxx()` functions.
+ - Do not use a period or exclamation mark at the end of a message.
+
  */
 /** @page styledoxygen Doxygen Style Guide
 

doc/openocd.1

@@ -1,24 +1,21 @@
-.TH "OPENOCD" "1" "November 24, 2009"
+.TH "OPENOCD" "1" "June 18, 2024"
 .SH "NAME"
 openocd \- A free and open on\-chip debugging, in\-system programming and
-boundary\-scan testing tool for ARM and MIPS systems
+boundary\-scan testing tool for microcontrollers and other embedded devices
 .SH "SYNOPSIS"
-.B openocd \fR[\fB\-fsdlcphv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-pipe\fR] [\fB\-\-help\fR] [\fB\-\-version\fR]
+.B openocd \fR[\fB\-fsdlchv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-help\fR] [\fB\-\-version\fR]
 .SH "DESCRIPTION"
 .B OpenOCD
 is an on\-chip debugging, in\-system programming and boundary\-scan
-testing tool for various ARM and MIPS systems.
+testing tool for various microcontrollers and other embedded devices.
 .PP
-The debugger uses an IEEE 1149\-1 compliant JTAG TAP bus master to access
+Various different types of debug adapters as well as transport protocols like
-on\-chip debug functionality available on ARM based microcontrollers or
+JTAG and SWD are supported by OpenOCD, please check the \fIopenocd\fR info page
-system-on-chip solutions. For MIPS systems the EJTAG interface is supported.
+for the complete list.
 .PP
 User interaction is realized through a telnet command line interface,
 a gdb (the GNU debugger) remote protocol server, and a simplified RPC
 connection that can be used to interface with OpenOCD's Jim Tcl engine.
-.PP
-OpenOCD supports various different types of JTAG interfaces/programmers,
-please check the \fIopenocd\fR info page for the complete list.
 .SH "OPTIONS"
 .TP
 .B "\-f, \-\-file <filename>"
@@ -68,8 +65,6 @@ Note that you will need to explicitly invoke
 .I init
 if the command requires access to a target or flash.
 .TP
-.B "\-p, \-\-pipe"
-Use pipes when talking to gdb.
 .TP
 .B "\-h, \-\-help"
 Show a help text and exit.
@@ -82,8 +77,6 @@ Please report any bugs on the mailing list at
 .SH "LICENCE"
 .B OpenOCD
 is covered by the GNU General Public License (GPL), version 2 or later.
-.SH "SEE ALSO"
-.BR jtag (1)
 .PP
 The full documentation for
 .B openocd

jimtcl

@@ -1 +1 @@
-Subproject commit 1933e5457b9512d39ebbe11ed32578aada149f49
+Subproject commit f160866171457474f7c4d6ccda70f9b77524407e

src/Makefile.am

@@ -17,8 +17,12 @@ bin_PROGRAMS += %D%/openocd
 if INTERNAL_JIMTCL
 %C%_openocd_LDADD += $(top_builddir)/jimtcl/libjim.a
 else
+if HAVE_JIMTCL_PKG_CONFIG
+%C%_openocd_LDADD += $(JIMTCL_LIBS)
+else
 %C%_openocd_LDADD += -ljim
 endif
+endif
 
 %C%_libopenocd_la_CPPFLAGS =
 

src/flash/common.c

@@ -11,14 +11,14 @@
 #include "common.h"
 #include <helper/log.h>
 
-unsigned get_flash_name_index(const char *name)
+unsigned int get_flash_name_index(const char *name)
 {
 	const char *name_index = strrchr(name, '.');
 	if (!name_index)
 		return 0;
 	if (name_index[1] < '0' || name_index[1] > '9')
 		return ~0U;
-	unsigned requested;
+	unsigned int requested;
 	int retval = parse_uint(name_index + 1, &requested);
 	/* detect parsing error by forcing past end of bank list */
 	return (retval == ERROR_OK) ? requested : ~0U;
@@ -26,7 +26,7 @@ unsigned get_flash_name_index(const char *name)
 
 bool flash_driver_name_matches(const char *name, const char *expected)
 {
-	unsigned blen = strlen(name);
+	unsigned int blen = strlen(name);
 	/* only match up to the length of the driver name... */
 	if (strncmp(name, expected, blen) != 0)
 		return false;

src/flash/common.h

@@ -17,7 +17,7 @@
  * name provides a suffix but it does not parse as an unsigned integer,
  * the routine returns ~0U.  This will prevent further matching.
  */
-unsigned get_flash_name_index(const char *name);
+unsigned int get_flash_name_index(const char *name);
 /**
  * Attempt to match the @c expected name with the @c name of a driver.
  * @param name The name of the driver (from the bank's device structure).

src/flash/nand/arm_io.c

@@ -31,12 +31,12 @@
  * @return Success or failure of the operation
  */
 static int arm_code_to_working_area(struct target *target,
-	const uint32_t *code, unsigned code_size,
+	const uint32_t *code, unsigned int code_size,
-	unsigned additional, struct working_area **area)
+	unsigned int additional, struct working_area **area)
 {
 	uint8_t code_buf[code_size];
 	int retval;
-	unsigned size = code_size + additional;
+	unsigned int size = code_size + additional;
 
 	/* REVISIT this assumes size doesn't ever change.
 	 * That's usually correct; but there are boards with

src/flash/nand/arm_io.h

@@ -27,7 +27,7 @@ struct arm_nand_data {
 	struct working_area *copy_area;
 
 	/** The chunk size is the page size or ECC chunk. */
-	unsigned chunk_size;
+	unsigned int chunk_size;
 
 	/** Where data is read from or written to. */
 	uint32_t data;

src/flash/nand/at91sam9.c

@@ -389,9 +389,8 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
 				uint32_t bit = parity & 0x0F;
 
 				data[word] ^= (0x1) << bit;
-				LOG_INFO("Data word %d, bit %d corrected.",
+				LOG_INFO("Data word %" PRIu32 ", bit %" PRIu32 " corrected.",
-					(unsigned) word,
+					word, bit);
-					(unsigned) bit);
 			}
 		}
 
@@ -533,7 +532,7 @@ COMMAND_HANDLER(handle_at91sam9_cle_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, address_line;
+	unsigned int num, address_line;
 
 	if (CMD_ARGC != 2) {
 		command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
@@ -563,7 +562,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, address_line;
+	unsigned int num, address_line;
 
 	if (CMD_ARGC != 2)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -591,7 +590,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, base_pioc, pin_num;
+	unsigned int num, base_pioc, pin_num;
 
 	if (CMD_ARGC != 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -622,7 +621,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, base_pioc, pin_num;
+	unsigned int num, base_pioc, pin_num;
 
 	if (CMD_ARGC != 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;

src/flash/nand/core.c

@@ -165,8 +165,8 @@ static struct nand_ecclayout nand_oob_8 = {
  */
 static struct nand_device *get_nand_device_by_name(const char *name)
 {
-	unsigned requested = get_flash_name_index(name);
+	unsigned int requested = get_flash_name_index(name);
-	unsigned found = 0;
+	unsigned int found = 0;
 
 	struct nand_device *nand;
 	for (nand = nand_devices; nand; nand = nand->next) {
@@ -194,7 +194,7 @@ struct nand_device *get_nand_device_by_num(int num)
 	return NULL;
 }
 
-COMMAND_HELPER(nand_command_get_device, unsigned name_index,
+COMMAND_HELPER(nand_command_get_device, unsigned int name_index,
 	struct nand_device **nand)
 {
 	const char *str = CMD_ARGV[name_index];
@@ -202,7 +202,7 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 	if (*nand)
 		return ERROR_OK;
 
-	unsigned num;
+	unsigned int num;
 	COMMAND_PARSE_NUMBER(uint, str, num);
 	*nand = get_nand_device_by_num(num);
 	if (!*nand) {

src/flash/nand/core.h

@@ -209,7 +209,7 @@ int nand_correct_data(struct nand_device *nand, u_char *dat,
 int nand_register_commands(struct command_context *cmd_ctx);
 
 /** helper for parsing a nand device command argument string */
-COMMAND_HELPER(nand_command_get_device, unsigned name_index,
+COMMAND_HELPER(nand_command_get_device, unsigned int name_index,
 	struct nand_device **nand);
 
 

src/flash/nand/davinci.c

@@ -379,7 +379,7 @@ static int davinci_writepage_tail(struct nand_device *nand,
 static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
 	uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 {
-	unsigned oob_offset;
+	unsigned int oob_offset;
 	struct davinci_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
 	const uint32_t fcr_addr = info->aemif + NANDFCR;

src/flash/nand/driver.c

@@ -33,7 +33,7 @@ static struct nand_flash_controller *nand_flash_controllers[] = {
 
 struct nand_flash_controller *nand_driver_find_by_name(const char *name)
 {
-	for (unsigned i = 0; nand_flash_controllers[i]; i++) {
+	for (unsigned int i = 0; nand_flash_controllers[i]; i++) {
 		struct nand_flash_controller *controller = nand_flash_controllers[i];
 		if (strcmp(name, controller->name) == 0)
 			return controller;
@@ -42,7 +42,7 @@ struct nand_flash_controller *nand_driver_find_by_name(const char *name)
 }
 int nand_driver_walk(nand_driver_walker_t f, void *x)
 {
-	for (unsigned i = 0; nand_flash_controllers[i]; i++) {
+	for (unsigned int i = 0; nand_flash_controllers[i]; i++) {
 		int retval = (*f)(nand_flash_controllers[i], x);
 		if (retval != ERROR_OK)
 			return retval;

src/flash/nand/fileio.c

@@ -107,7 +107,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
 {
 	nand_fileio_init(state);
 
-	unsigned minargs = need_size ? 4 : 3;
+	unsigned int minargs = need_size ? 4 : 3;
 	if (minargs > CMD_ARGC)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
@@ -131,7 +131,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
 	}
 
 	if (minargs < CMD_ARGC) {
-		for (unsigned i = minargs; i < CMD_ARGC; i++) {
+		for (unsigned int i = minargs; i < CMD_ARGC; i++) {
 			if (!strcmp(CMD_ARGV[i], "oob_raw"))
 				state->oob_format |= NAND_OOB_RAW;
 			else if (!strcmp(CMD_ARGV[i], "oob_only"))

src/flash/nand/lpc3180.c

@@ -890,8 +890,7 @@ static int lpc3180_read_page(struct nand_device *nand,
 
 			if (mlc_isr & 0x8) {
 				if (mlc_isr & 0x40) {
-					LOG_ERROR("uncorrectable error detected: 0x%2.2x",
+					LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
-						(unsigned)mlc_isr);
 					free(page_buffer);
 					free(oob_buffer);
 					return ERROR_NAND_OPERATION_FAILED;
@@ -1275,7 +1274,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
 	if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned num;
+	unsigned int num;
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	struct nand_device *nand = get_nand_device_by_num(num);
 	if (!nand) {

src/flash/nand/lpc32xx.c

@@ -1386,8 +1386,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 
 		if (mlc_isr & 0x8) {
 			if (mlc_isr & 0x40) {
-				LOG_ERROR("uncorrectable error detected: "
+				LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
-					"0x%2.2x", (unsigned)mlc_isr);
 				return ERROR_NAND_OPERATION_FAILED;
 			}
 
@@ -1743,7 +1742,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
 	if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned num;
+	unsigned int num;
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	struct nand_device *nand = get_nand_device_by_num(num);
 	if (!nand) {

src/flash/nand/mx3.h

@@ -86,10 +86,10 @@ enum mx_nf_finalize_action {
 };
 
 struct mx3_nf_flags {
-	unsigned target_little_endian:1;
+	unsigned int target_little_endian:1;
-	unsigned nand_readonly:1;
+	unsigned int nand_readonly:1;
-	unsigned one_kb_sram:1;
+	unsigned int one_kb_sram:1;
-	unsigned hw_ecc_enabled:1;
+	unsigned int hw_ecc_enabled:1;
 };
 
 struct mx3_nf_controller {

src/flash/nand/mxc.h

@@ -138,11 +138,11 @@ enum mxc_nf_finalize_action {
 };
 
 struct mxc_nf_flags {
-	unsigned target_little_endian:1;
+	unsigned int target_little_endian:1;
-	unsigned nand_readonly:1;
+	unsigned int nand_readonly:1;
-	unsigned one_kb_sram:1;
+	unsigned int one_kb_sram:1;
-	unsigned hw_ecc_enabled:1;
+	unsigned int hw_ecc_enabled:1;
-	unsigned biswap_enabled:1;
+	unsigned int biswap_enabled:1;
 };
 
 struct mxc_nf_controller {

src/flash/nor/Makefile.am

@@ -26,8 +26,10 @@ NOR_DRIVERS = \
 	%D%/cc26xx.c \
 	%D%/cfi.c \
 	%D%/dsp5680xx_flash.c \
+	%D%/dw-spi.c \
 	%D%/efm32.c \
 	%D%/em357.c \
+	%D%/eneispif.c \
 	%D%/esirisc_flash.c \
 	%D%/faux.c \
 	%D%/fespi.c \
@@ -88,6 +90,7 @@ NORHEADERS = \
 	%D%/cc26xx.h \
 	%D%/cfi.h \
 	%D%/driver.h \
+	%D%/dw-spi-helper.h \
 	%D%/imp.h \
 	%D%/non_cfi.h \
 	%D%/ocl.h \

src/flash/nor/aducm360.c

@@ -79,7 +79,7 @@ static int aducm360_build_sector_list(struct flash_bank *bank)
 	/* sector size is 512 */
 	bank->num_sectors = bank->size / FLASH_SECTOR_SIZE;
 	bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-	for (unsigned i = 0; i < bank->num_sectors; ++i) {
+	for (unsigned int i = 0; i < bank->num_sectors; ++i) {
 		bank->sectors[i].offset = offset;
 		bank->sectors[i].size = FLASH_SECTOR_SIZE;
 		offset += bank->sectors[i].size;

src/flash/nor/ambiqmicro.c

@@ -124,7 +124,7 @@ FLASH_BANK_COMMAND_HANDLER(ambiqmicro_flash_bank_command)
 	if (CMD_ARGC < 6)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	ambiqmicro_info = calloc(sizeof(struct ambiqmicro_flash_bank), 1);
+	ambiqmicro_info = calloc(1, sizeof(struct ambiqmicro_flash_bank));
 
 	bank->driver_priv = ambiqmicro_info;
 

src/flash/nor/at91sam3.c

@@ -154,15 +154,15 @@ struct sam3_bank_private {
 	struct sam3_chip *chip;
 	/* so we can find the original bank pointer */
 	struct flash_bank *bank;
-	unsigned bank_number;
+	unsigned int bank_number;
 	uint32_t controller_address;
 	uint32_t base_address;
 	uint32_t flash_wait_states;
 	bool present;
-	unsigned size_bytes;
+	unsigned int size_bytes;
-	unsigned nsectors;
+	unsigned int nsectors;
-	unsigned sector_size;
+	unsigned int sector_size;
-	unsigned page_size;
+	unsigned int page_size;
 };
 
 struct sam3_chip_details {
@@ -176,12 +176,12 @@ struct sam3_chip_details {
 	uint32_t chipid_cidr;
 	const char *name;
 
-	unsigned n_gpnvms;
+	unsigned int n_gpnvms;
 #define SAM3_N_NVM_BITS 3
-	unsigned gpnvm[SAM3_N_NVM_BITS];
+	unsigned int gpnvm[SAM3_N_NVM_BITS];
-	unsigned total_flash_size;
+	unsigned int total_flash_size;
-	unsigned total_sram_size;
+	unsigned int total_sram_size;
-	unsigned n_banks;
+	unsigned int n_banks;
 #define SAM3_MAX_FLASH_BANKS 2
 	/* these are "initialized" from the global const data */
 	struct sam3_bank_private bank[SAM3_MAX_FLASH_BANKS];
@@ -2029,7 +2029,7 @@ static int efc_get_result(struct sam3_bank_private *private, uint32_t *v)
 }
 
 static int efc_start_command(struct sam3_bank_private *private,
-	unsigned command, unsigned argument)
+	unsigned int command, unsigned int argument)
 {
 	uint32_t n, v;
 	int r;
@@ -2051,7 +2051,7 @@ do_retry:
 		case AT91C_EFC_FCMD_CLB:
 			n = (private->size_bytes / private->page_size);
 			if (argument >= n)
-				LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
+				LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
 			break;
 
 		case AT91C_EFC_FCMD_SFB:
@@ -2124,8 +2124,8 @@ do_retry:
  * @param status   - put command status bits here
  */
 static int efc_perform_command(struct sam3_bank_private *private,
-	unsigned command,
+	unsigned int command,
-	unsigned argument,
+	unsigned int argument,
 	uint32_t *status)
 {
 
@@ -2220,7 +2220,7 @@ static int flashd_erase_entire_bank(struct sam3_bank_private *private)
  * @param puthere  - result stored here.
  */
 /* ------------------------------------------------------------------------------ */
-static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, unsigned *puthere)
+static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm, unsigned int *puthere)
 {
 	uint32_t v;
 	int r;
@@ -2261,10 +2261,10 @@ static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, u
  * @param gpnvm GPNVM index.
  * @returns 0 if successful; otherwise returns an error code.
  */
-static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
+static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	LOG_DEBUG("Here");
 	if (private->bank_number != 0) {
@@ -2293,10 +2293,10 @@ static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
  * @param private info about the bank
  * @param gpnvm GPNVM index.
  */
-static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
+static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	if (private->bank_number != 0) {
 		LOG_ERROR("GPNVM only works with Bank0");
@@ -2346,8 +2346,8 @@ static int flashd_get_lock_bits(struct sam3_bank_private *private, uint32_t *v)
  */
 
 static int flashd_unlock(struct sam3_bank_private *private,
-	unsigned start_sector,
+	unsigned int start_sector,
-	unsigned end_sector)
+	unsigned int end_sector)
 {
 	int r;
 	uint32_t status;
@@ -2376,8 +2376,8 @@ static int flashd_unlock(struct sam3_bank_private *private,
  * @param end_sector   - last sector (inclusive) to lock
  */
 static int flashd_lock(struct sam3_bank_private *private,
-	unsigned start_sector,
+	unsigned int start_sector,
-	unsigned end_sector)
+	unsigned int end_sector)
 {
 	uint32_t status;
 	uint32_t pg;
@@ -2405,8 +2405,8 @@ static int flashd_lock(struct sam3_bank_private *private,
 static uint32_t sam3_reg_fieldname(struct sam3_chip *chip,
 	const char *regname,
 	uint32_t value,
-	unsigned shift,
+	unsigned int shift,
-	unsigned width)
+	unsigned int width)
 {
 	uint32_t v;
 	int hwidth, dwidth;
@@ -2491,7 +2491,7 @@ static const char *const sramsize[] = {
 
 };
 
-static const struct archnames { unsigned value; const char *name; } archnames[] = {
+static const struct archnames { unsigned int value; const char *name; } archnames[] = {
 	{ 0x19,  "AT91SAM9xx Series"                                            },
 	{ 0x29,  "AT91SAM9XExx Series"                                          },
 	{ 0x34,  "AT91x34 Series"                                                       },
@@ -2867,8 +2867,8 @@ static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here)
 
 	r = target_read_u32(chip->target, reg->address, goes_here);
 	if (r != ERROR_OK) {
-		LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
+		LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Err: %d",
-			reg->name, (unsigned)(reg->address), r);
+			reg->name, reg->address, r);
 	}
 	return r;
 }
@@ -2883,8 +2883,8 @@ static int sam3_read_all_regs(struct sam3_chip *chip)
 		r = sam3_read_this_reg(chip,
 				sam3_get_reg_ptr(&(chip->cfg), reg));
 		if (r != ERROR_OK) {
-			LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
+			LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Error: %d",
-				reg->name, ((unsigned)(reg->address)), r);
+				reg->name, reg->address, r);
 			return r;
 		}
 		reg++;
@@ -2951,7 +2951,7 @@ static int sam3_protect_check(struct flash_bank *bank)
 {
 	int r;
 	uint32_t v = 0;
-	unsigned x;
+	unsigned int x;
 	struct sam3_bank_private *private;
 
 	LOG_DEBUG("Begin");
@@ -3071,7 +3071,7 @@ static int sam3_get_details(struct sam3_bank_private *private)
 	const struct sam3_chip_details *details;
 	struct sam3_chip *chip;
 	struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS];
-	unsigned x;
+	unsigned int x;
 
 	LOG_DEBUG("Begin");
 	details = all_sam3_details;
@@ -3264,7 +3264,7 @@ static int sam3_protect(struct flash_bank *bank, int set, unsigned int first,
 
 }
 
-static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, uint8_t *buf)
+static int sam3_page_read(struct sam3_bank_private *private, unsigned int pagenum, uint8_t *buf)
 {
 	uint32_t adr;
 	int r;
@@ -3283,7 +3283,7 @@ static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, u
 	return r;
 }
 
-static int sam3_page_write(struct sam3_bank_private *private, unsigned pagenum, const uint8_t *buf)
+static int sam3_page_write(struct sam3_bank_private *private, unsigned int pagenum, const uint8_t *buf)
 {
 	uint32_t adr;
 	uint32_t status;
@@ -3347,10 +3347,10 @@ static int sam3_write(struct flash_bank *bank,
 	uint32_t count)
 {
 	int n;
-	unsigned page_cur;
+	unsigned int page_cur;
-	unsigned page_end;
+	unsigned int page_end;
 	int r;
-	unsigned page_offset;
+	unsigned int page_offset;
 	struct sam3_bank_private *private;
 	uint8_t *pagebuffer;
 
@@ -3497,7 +3497,7 @@ COMMAND_HANDLER(sam3_handle_info_command)
 	if (!chip)
 		return ERROR_OK;
 
-	unsigned x;
+	unsigned int x;
 	int r;
 
 	/* bank0 must exist before we can do anything */
@@ -3549,7 +3549,7 @@ need_define:
 
 COMMAND_HANDLER(sam3_handle_gpnvm_command)
 {
-	unsigned x, v;
+	unsigned int x, v;
 	int r, who;
 	struct sam3_chip *chip;
 

src/flash/nor/at91sam4.c

@@ -134,15 +134,15 @@ struct sam4_bank_private {
 	struct sam4_chip *chip;
 	/* so we can find the original bank pointer */
 	struct flash_bank *bank;
-	unsigned bank_number;
+	unsigned int bank_number;
 	uint32_t controller_address;
 	uint32_t base_address;
 	uint32_t flash_wait_states;
 	bool present;
-	unsigned size_bytes;
+	unsigned int size_bytes;
-	unsigned nsectors;
+	unsigned int nsectors;
-	unsigned sector_size;
+	unsigned int sector_size;
-	unsigned page_size;
+	unsigned int page_size;
 };
 
 struct sam4_chip_details {
@@ -156,12 +156,12 @@ struct sam4_chip_details {
 	uint32_t chipid_cidr;
 	const char *name;
 
-	unsigned n_gpnvms;
+	unsigned int n_gpnvms;
 #define SAM4_N_NVM_BITS 3
-	unsigned gpnvm[SAM4_N_NVM_BITS];
+	unsigned int gpnvm[SAM4_N_NVM_BITS];
-	unsigned total_flash_size;
+	unsigned int total_flash_size;
-	unsigned total_sram_size;
+	unsigned int total_sram_size;
-	unsigned n_banks;
+	unsigned int n_banks;
 #define SAM4_MAX_FLASH_BANKS 2
 	/* these are "initialized" from the global const data */
 	struct sam4_bank_private bank[SAM4_MAX_FLASH_BANKS];
@@ -1479,7 +1479,7 @@ static int efc_get_result(struct sam4_bank_private *private, uint32_t *v)
 }
 
 static int efc_start_command(struct sam4_bank_private *private,
-	unsigned command, unsigned argument)
+	unsigned int command, unsigned int argument)
 {
 	uint32_t n, v;
 	int r;
@@ -1501,7 +1501,7 @@ do_retry:
 		case AT91C_EFC_FCMD_CLB:
 			n = (private->size_bytes / private->page_size);
 			if (argument >= n)
-				LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
+				LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
 			break;
 
 		case AT91C_EFC_FCMD_SFB:
@@ -1574,8 +1574,8 @@ do_retry:
  * @param status   - put command status bits here
  */
 static int efc_perform_command(struct sam4_bank_private *private,
-	unsigned command,
+	unsigned int command,
-	unsigned argument,
+	unsigned int argument,
 	uint32_t *status)
 {
 
@@ -1716,7 +1716,7 @@ static int flashd_erase_pages(struct sam4_bank_private *private,
  * @param puthere  - result stored here.
  */
 /* ------------------------------------------------------------------------------ */
-static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, unsigned *puthere)
+static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm, unsigned int *puthere)
 {
 	uint32_t v;
 	int r;
@@ -1757,10 +1757,10 @@ static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, u
  * @param gpnvm GPNVM index.
  * @returns 0 if successful; otherwise returns an error code.
  */
-static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm)
+static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	LOG_DEBUG("Here");
 	if (private->bank_number != 0) {
@@ -1789,10 +1789,10 @@ static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm)
  * @param private info about the bank
  * @param gpnvm GPNVM index.
  */
-static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned gpnvm)
+static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	if (private->bank_number != 0) {
 		LOG_ERROR("GPNVM only works with Bank0");
@@ -1846,8 +1846,8 @@ static int flashd_get_lock_bits(struct sam4_bank_private *private, uint32_t *v)
  */
 
 static int flashd_unlock(struct sam4_bank_private *private,
-	unsigned start_sector,
+	unsigned int start_sector,
-	unsigned end_sector)
+	unsigned int end_sector)
 {
 	int r;
 	uint32_t status;
@@ -1876,8 +1876,8 @@ static int flashd_unlock(struct sam4_bank_private *private,
  * @param end_sector   - last sector (inclusive) to lock
  */
 static int flashd_lock(struct sam4_bank_private *private,
-	unsigned start_sector,
+	unsigned int start_sector,
-	unsigned end_sector)
+	unsigned int end_sector)
 {
 	uint32_t status;
 	uint32_t pg;
@@ -1905,8 +1905,8 @@ static int flashd_lock(struct sam4_bank_private *private,
 static uint32_t sam4_reg_fieldname(struct sam4_chip *chip,
 	const char *regname,
 	uint32_t value,
-	unsigned shift,
+	unsigned int shift,
-	unsigned width)
+	unsigned int width)
 {
 	uint32_t v;
 	int hwidth, dwidth;
@@ -1991,7 +1991,7 @@ static const char *const sramsize[] = {
 
 };
 
-static const struct archnames { unsigned value; const char *name; } archnames[] = {
+static const struct archnames { unsigned int value; const char *name; } archnames[] = {
 	{ 0x19,  "AT91SAM9xx Series"                                            },
 	{ 0x29,  "AT91SAM9XExx Series"                                          },
 	{ 0x34,  "AT91x34 Series"                                                       },
@@ -2374,8 +2374,8 @@ static int sam4_read_this_reg(struct sam4_chip *chip, uint32_t *goes_here)
 
 	r = target_read_u32(chip->target, reg->address, goes_here);
 	if (r != ERROR_OK) {
-		LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d",
+		LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Err: %d",
-			reg->name, (unsigned)(reg->address), r);
+			reg->name, reg->address, r);
 	}
 	return r;
 }
@@ -2390,8 +2390,8 @@ static int sam4_read_all_regs(struct sam4_chip *chip)
 		r = sam4_read_this_reg(chip,
 				sam4_get_reg_ptr(&(chip->cfg), reg));
 		if (r != ERROR_OK) {
-			LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d",
+			LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Error: %d",
-				reg->name, ((unsigned)(reg->address)), r);
+				reg->name, reg->address, r);
 			return r;
 		}
 		reg++;
@@ -2444,7 +2444,7 @@ static int sam4_protect_check(struct flash_bank *bank)
 {
 	int r;
 	uint32_t v[4] = {0};
-	unsigned x;
+	unsigned int x;
 	struct sam4_bank_private *private;
 
 	LOG_DEBUG("Begin");
@@ -2557,7 +2557,7 @@ static int sam4_get_details(struct sam4_bank_private *private)
 	const struct sam4_chip_details *details;
 	struct sam4_chip *chip;
 	struct flash_bank *saved_banks[SAM4_MAX_FLASH_BANKS];
-	unsigned x;
+	unsigned int x;
 
 	LOG_DEBUG("Begin");
 	details = all_sam4_details;
@@ -2796,7 +2796,7 @@ static int sam4_protect(struct flash_bank *bank, int set, unsigned int first,
 
 }
 
-static int sam4_page_read(struct sam4_bank_private *private, unsigned pagenum, uint8_t *buf)
+static int sam4_page_read(struct sam4_bank_private *private, unsigned int pagenum, uint8_t *buf)
 {
 	uint32_t adr;
 	int r;
@@ -2841,7 +2841,7 @@ static int sam4_set_wait(struct sam4_bank_private *private)
 	return r;
 }
 
-static int sam4_page_write(struct sam4_bank_private *private, unsigned pagenum, const uint8_t *buf)
+static int sam4_page_write(struct sam4_bank_private *private, unsigned int pagenum, const uint8_t *buf)
 {
 	uint32_t adr;
 	uint32_t status;
@@ -2891,10 +2891,10 @@ static int sam4_write(struct flash_bank *bank,
 	uint32_t count)
 {
 	int n;
-	unsigned page_cur;
+	unsigned int page_cur;
-	unsigned page_end;
+	unsigned int page_end;
 	int r;
-	unsigned page_offset;
+	unsigned int page_offset;
 	struct sam4_bank_private *private;
 	uint8_t *pagebuffer;
 
@@ -3045,7 +3045,7 @@ COMMAND_HANDLER(sam4_handle_info_command)
 	if (!chip)
 		return ERROR_OK;
 
-	unsigned x;
+	unsigned int x;
 	int r;
 
 	/* bank0 must exist before we can do anything */
@@ -3097,7 +3097,7 @@ need_define:
 
 COMMAND_HANDLER(sam4_handle_gpnvm_command)
 {
-	unsigned x, v;
+	unsigned int x, v;
 	int r, who;
 	struct sam4_chip *chip;
 

src/flash/nor/at91sam7.c

@@ -560,7 +560,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
 		if (bnk > 0) {
 			if (!t_bank->next) {
 				/* create a new flash bank element */
-				struct flash_bank *fb = calloc(sizeof(struct flash_bank), 1);
+				struct flash_bank *fb = calloc(1, sizeof(struct flash_bank));
 				if (!fb) {
 					LOG_ERROR("No memory for flash bank");
 					return ERROR_FAIL;
@@ -748,7 +748,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
 		if (bnk > 0) {
 			if (!t_bank->next) {
 				/* create a new bank element */
-				struct flash_bank *fb = calloc(sizeof(struct flash_bank), 1);
+				struct flash_bank *fb = calloc(1, sizeof(struct flash_bank));
 				if (!fb) {
 					LOG_ERROR("No memory for flash bank");
 					return ERROR_FAIL;

src/flash/nor/at91samd.c

@@ -365,7 +365,7 @@ static const struct samd_family *samd_find_family(uint32_t id)
 	uint8_t family = SAMD_GET_FAMILY(id);
 	uint8_t series = SAMD_GET_SERIES(id);
 
-	for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(samd_families); i++) {
 		if (samd_families[i].processor == processor &&
 			samd_families[i].series == series &&
 			samd_families[i].family == family)
@@ -387,7 +387,7 @@ static const struct samd_part *samd_find_part(uint32_t id)
 	if (!family)
 		return NULL;
 
-	for (unsigned i = 0; i < family->num_parts; i++) {
+	for (unsigned int i = 0; i < family->num_parts; i++) {
 		if (family->parts[i].id == devsel)
 			return &family->parts[i];
 	}

src/flash/nor/ath79.c

@@ -513,7 +513,7 @@ static int ath79_erase(struct flash_bank *bank, unsigned int first,
 	if (ath79_info->dev->erase_cmd == 0x00)
 		return ERROR_FLASH_OPER_UNSUPPORTED;
 
-	for (unsigned sector = first; sector <= last; sector++) {
+	for (unsigned int sector = first; sector <= last; sector++) {
 		if (bank->sectors[sector].is_protected) {
 			LOG_ERROR("Flash sector %u protected", sector);
 			return ERROR_FAIL;

src/flash/nor/atsame5.c

@@ -85,6 +85,9 @@
 #define SAME_SERIES_51		0x01
 #define SAME_SERIES_53		0x03
 #define SAME_SERIES_54		0x04
+#define PIC32CXSG_SERIES_41	0x07
+#define PIC32CXSG_SERIES_60	0x00
+#define PIC32CXSG_SERIES_61	0x02
 
 /* Device ID macros */
 #define SAMD_GET_PROCESSOR(id) (id >> 28)
@@ -148,6 +151,27 @@ static const struct samd_part same54_parts[] = {
 	{ 0x03, "SAME54N19A", 512, 192 },
 };
 
+/* See PIC32CX SG41/SG60/SG61 Family Silicon Errata and Datasheet Clarifications
+ * DS80000985G */
+/* Known PIC32CX-SG41 parts. */
+static const struct samd_part pic32cxsg41_parts[] = {
+	{ 0x00, "PIC32CX1025SG41128", 1024, 256 },
+	{ 0x01, "PIC32CX1025SG41100", 1024, 256 },
+	{ 0x02, "PIC32CX1025SG41064", 1024, 256 },
+};
+
+/* Known PIC32CX-SG60 parts. */
+static const struct samd_part pic32cxsg60_parts[] = {
+	{ 0x00, "PIC32CX1025SG60128", 1024, 256 },
+	{ 0x01, "PIC32CX1025SG60100", 1024, 256 },
+};
+
+/* Known PIC32CX-SG61 parts. */
+static const struct samd_part pic32cxsg61_parts[] = {
+	{ 0x00, "PIC32CX1025SG61128", 1024, 256 },
+	{ 0x01, "PIC32CX1025SG61100", 1024, 256 },
+};
+
 /* Each family of parts contains a parts table in the DEVSEL field of DID.  The
  * processor ID, family ID, and series ID are used to determine which exact
  * family this is and then we can use the corresponding table. */
@@ -169,6 +193,12 @@ static const struct samd_family samd_families[] = {
 		same53_parts, ARRAY_SIZE(same53_parts) },
 	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, SAME_SERIES_54,
 		same54_parts, ARRAY_SIZE(same54_parts) },
+	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_41,
+		pic32cxsg41_parts, ARRAY_SIZE(pic32cxsg41_parts) },
+	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_60,
+		pic32cxsg60_parts, ARRAY_SIZE(pic32cxsg60_parts) },
+	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_61,
+		pic32cxsg61_parts, ARRAY_SIZE(pic32cxsg61_parts) },
 };
 
 struct samd_info {
@@ -194,7 +224,7 @@ static const struct samd_family *samd_find_family(uint32_t id)
 	uint8_t family = SAMD_GET_FAMILY(id);
 	uint8_t series = SAMD_GET_SERIES(id);
 
-	for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(samd_families); i++) {
 		if (samd_families[i].processor == processor &&
 			samd_families[i].series == series &&
 			samd_families[i].family == family)
@@ -216,7 +246,7 @@ static const struct samd_part *samd_find_part(uint32_t id)
 	if (!family)
 		return NULL;
 
-	for (unsigned i = 0; i < family->num_parts; i++) {
+	for (unsigned int i = 0; i < family->num_parts; i++) {
 		if (family->parts[i].id == devsel)
 			return &family->parts[i];
 	}

src/flash/nor/atsamv.c

@@ -55,8 +55,8 @@
 
 struct samv_flash_bank {
 	bool      probed;
-	unsigned size_bytes;
+	unsigned int size_bytes;
-	unsigned gpnvm[SAMV_NUM_GPNVM_BITS];
+	unsigned int gpnvm[SAMV_NUM_GPNVM_BITS];
 };
 
 /* The actual sector size of the SAMV7 flash memory is 128K bytes.
@@ -82,7 +82,7 @@ static int samv_efc_get_result(struct target *target, uint32_t *v)
 }
 
 static int samv_efc_start_command(struct target *target,
-		unsigned command, unsigned argument)
+		unsigned int command, unsigned int argument)
 {
 	uint32_t v;
 	samv_efc_get_status(target, &v);
@@ -100,7 +100,7 @@ static int samv_efc_start_command(struct target *target,
 }
 
 static int samv_efc_perform_command(struct target *target,
-		unsigned command, unsigned argument, uint32_t *status)
+		unsigned int command, unsigned int argument, uint32_t *status)
 {
 	int r;
 	uint32_t v;
@@ -166,7 +166,7 @@ static int samv_erase_pages(struct target *target,
 			first_page | erase_pages, status);
 }
 
-static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out)
+static int samv_get_gpnvm(struct target *target, unsigned int gpnvm, unsigned int *out)
 {
 	uint32_t v;
 	int r;
@@ -190,10 +190,10 @@ static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out)
 	return r;
 }
 
-static int samv_clear_gpnvm(struct target *target, unsigned gpnvm)
+static int samv_clear_gpnvm(struct target *target, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
 		LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
@@ -209,10 +209,10 @@ static int samv_clear_gpnvm(struct target *target, unsigned gpnvm)
 	return r;
 }
 
-static int samv_set_gpnvm(struct target *target, unsigned gpnvm)
+static int samv_set_gpnvm(struct target *target, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 	if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
 		LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
 		return ERROR_FAIL;
@@ -231,7 +231,7 @@ static int samv_set_gpnvm(struct target *target, unsigned gpnvm)
 }
 
 static int samv_flash_unlock(struct target *target,
-		unsigned start_sector, unsigned end_sector)
+		unsigned int start_sector, unsigned int end_sector)
 {
 	int r;
 	uint32_t status;
@@ -251,7 +251,7 @@ static int samv_flash_unlock(struct target *target,
 }
 
 static int samv_flash_lock(struct target *target,
-		unsigned start_sector, unsigned end_sector)
+		unsigned int start_sector, unsigned int end_sector)
 {
 	uint32_t status;
 	uint32_t pg;
@@ -419,7 +419,7 @@ static int samv_protect(struct flash_bank *bank, int set, unsigned int first,
 }
 
 static int samv_page_read(struct target *target,
-		unsigned page_num, uint8_t *buf)
+		unsigned int page_num, uint8_t *buf)
 {
 	uint32_t addr = SAMV_FLASH_BASE + page_num * SAMV_PAGE_SIZE;
 	int r = target_read_memory(target, addr, 4, SAMV_PAGE_SIZE / 4, buf);
@@ -430,7 +430,7 @@ static int samv_page_read(struct target *target,
 }
 
 static int samv_page_write(struct target *target,
-		unsigned pagenum, const uint8_t *buf)
+		unsigned int pagenum, const uint8_t *buf)
 {
 	uint32_t status;
 	const uint32_t addr = SAMV_FLASH_BASE + pagenum * SAMV_PAGE_SIZE;
@@ -618,7 +618,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command)
 			return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	unsigned v = 0;
+	unsigned int v = 0;
 	if (!strcmp("show", CMD_ARGV[0])) {
 		if (who == -1) {
 showall:

src/flash/nor/cfi.c

@@ -806,7 +806,7 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **
 	}
 	bank->driver_priv = cfi_info;
 
-	for (unsigned i = 6; i < argc; i++) {
+	for (unsigned int i = 6; i < argc; i++) {
 		if (strcmp(argv[i], "x16_as_x8") == 0)
 			cfi_info->x16_as_x8 = true;
 		else if (strcmp(argv[i], "data_swap") == 0)
@@ -2219,8 +2219,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
 	uint8_t current_word[CFI_MAX_BUS_WIDTH];
 	int retval;
 
-	LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
+	LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32, count, offset);
-		(int)count, (unsigned)offset);
 
 	if (bank->target->state != TARGET_HALTED) {
 		LOG_ERROR("Target not halted");

src/flash/nor/cfi.h

@@ -58,10 +58,10 @@ struct cfi_flash_bank {
 	void *alt_ext;
 
 	/* calculated timeouts */
-	unsigned word_write_timeout;
+	unsigned int word_write_timeout;
-	unsigned buf_write_timeout;
+	unsigned int buf_write_timeout;
-	unsigned block_erase_timeout;
+	unsigned int block_erase_timeout;
-	unsigned chip_erase_timeout;
+	unsigned int chip_erase_timeout;
 
 	/* memory accessors */
 	int (*write_mem)(struct flash_bank *bank, target_addr_t addr,

src/flash/nor/core.c

@@ -164,7 +164,7 @@ int default_flash_verify(struct flash_bank *bank,
 void flash_bank_add(struct flash_bank *bank)
 {
 	/* put flash bank in linked list */
-	unsigned bank_num = 0;
+	unsigned int bank_num = 0;
 	if (flash_banks) {
 		/* find last flash bank */
 		struct flash_bank *p = flash_banks;
@@ -242,8 +242,8 @@ void flash_free_all_banks(void)
 
 struct flash_bank *get_flash_bank_by_name_noprobe(const char *name)
 {
-	unsigned requested = get_flash_name_index(name);
+	unsigned int requested = get_flash_name_index(name);
-	unsigned found = 0;
+	unsigned int found = 0;
 
 	struct flash_bank *bank;
 	for (bank = flash_banks; bank; bank = bank->next) {

src/flash/nor/core.h

@@ -32,18 +32,18 @@ struct flash_sector {
 	uint32_t size;
 	/**
 	 * Indication of erasure status: 0 = not erased, 1 = erased,
-	 * other = unknown.  Set by @c flash_driver_s::erase_check only.
+	 * other = unknown.  Set by @c flash_driver::erase_check only.
 	 *
 	 * This information must be considered stale immediately.
-	 * Don't set it in flash_driver_s::erase or a device mass_erase
+	 * Don't set it in flash_driver::erase or a device mass_erase
-	 * Don't clear it in flash_driver_s::write
+	 * Don't clear it in flash_driver::write
 	 * The flag is not used in a protection block
 	 */
 	int is_erased;
 	/**
 	 * Indication of protection status: 0 = unprotected/unlocked,
 	 * 1 = protected/locked, other = unknown.  Set by
-	 * @c flash_driver_s::protect_check.
+	 * @c flash_driver::protect_check.
 	 *
 	 * This information must be considered stale immediately.
 	 * A million things could make it stale: power cycle,
@@ -67,7 +67,7 @@ struct flash_sector {
  * a major interface.
  *
  * This structure will be passed as a parameter to the callbacks in the
- * flash_driver_s structure, some of which may modify the contents of
+ * flash_driver structure, some of which may modify the contents of
  * this structure of the area of flash that it defines.  Driver writers
  * may use the @c driver_priv member to store additional data on a
  * per-bank basis, if required.
@@ -250,7 +250,7 @@ int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank);
  * @param bank On output, contains a pointer to the bank or NULL.
  * @returns ERROR_OK on success, or an error indicating the problem.
  */
-COMMAND_HELPER(flash_command_get_bank, unsigned name_index,
+COMMAND_HELPER(flash_command_get_bank, unsigned int name_index,
 		struct flash_bank **bank);
 /**
  * Retrieves @a bank from a command argument, reporting errors parsing

src/flash/nor/driver.h

@@ -29,7 +29,7 @@ struct flash_bank;
  * flash bank DRIVERNAME ...parameters...
  * @endcode
  *
- * OpenOCD will search for the driver with a @c flash_driver_s::name
+ * OpenOCD will search for the driver with a @c flash_driver::name
  * that matches @c DRIVERNAME.
  *
  * The flash subsystem calls some of the other drivers routines a using
@@ -170,7 +170,7 @@ struct flash_driver {
 	/**
 	 * Check the erasure status of a flash bank.
 	 * When called, the driver routine must perform the required
-	 * checks and then set the @c flash_sector_s::is_erased field
+	 * checks and then set the @c flash_sector::is_erased field
 	 * for each of the flash banks's sectors.
 	 *
 	 * @param bank The bank to check
@@ -182,7 +182,7 @@ struct flash_driver {
 	 * Determine if the specific bank is "protected" or not.
 	 * When called, the driver routine must must perform the
 	 * required protection check(s) and then set the @c
-	 * flash_sector_s::is_protected field for each of the flash
+	 * flash_sector::is_protected field for each of the flash
 	 * bank's sectors.
 	 *
 	 * If protection is not implemented, set method to NULL
@@ -204,7 +204,7 @@ struct flash_driver {
 	int (*info)(struct flash_bank *bank, struct command_invocation *cmd);
 
 	/**
-	 * A more gentle flavor of flash_driver_s::probe, performing
+	 * A more gentle flavor of flash_driver::probe, performing
 	 * setup with less noise.  Generally, driver routines should test
 	 * to see if the bank has already been probed; if it has, the
 	 * driver probably should not perform its probe a second time.
@@ -254,8 +254,10 @@ extern const struct flash_driver cc26xx_flash;
 extern const struct flash_driver cc3220sf_flash;
 extern const struct flash_driver cfi_flash;
 extern const struct flash_driver dsp5680xx_flash;
+extern const struct flash_driver dw_spi_flash;
 extern const struct flash_driver efm32_flash;
 extern const struct flash_driver em357_flash;
+extern const struct flash_driver eneispif_flash;
 extern const struct flash_driver esirisc_flash;
 extern const struct flash_driver faux_flash;
 extern const struct flash_driver fespi_flash;

src/flash/nor/drivers.c

@@ -31,8 +31,10 @@ static const struct flash_driver * const flash_drivers[] = {
 	&cc26xx_flash,
 	&cfi_flash,
 	&dsp5680xx_flash,
+	&dw_spi_flash,
 	&efm32_flash,
 	&em357_flash,
+	&eneispif_flash,
 	&esirisc_flash,
 	&faux_flash,
 	&fm3_flash,
@@ -90,7 +92,7 @@ static const struct flash_driver * const flash_drivers[] = {
 
 const struct flash_driver *flash_driver_find_by_name(const char *name)
 {
-	for (unsigned i = 0; flash_drivers[i]; i++) {
+	for (unsigned int i = 0; flash_drivers[i]; i++) {
 		if (strcmp(name, flash_drivers[i]->name) == 0)
 			return flash_drivers[i];
 	}

src/flash/nor/dw-spi-helper.h

@@ -0,0 +1,102 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/**
+ * @file
+ * Driver for SPI NOR flash chips connected via DesignWare SPI Core.
+ *
+ * In order to avoid using stack, all helper function arguments are packed
+ * into a single struct, passed by pointer.
+ *
+ * Pointers are represented by 64 bit integers to make structs compatible
+ * with 64 bit targets.
+ *
+ * This file contains helper function argument structures.
+ */
+
+#ifndef OPENOCD_FLASH_NOR_DW_SPI_HELPER_H
+#define OPENOCD_FLASH_NOR_DW_SPI_HELPER_H
+
+#include <stdint.h>
+
+/**
+ * @brief Arguments for transaction helper function.
+ */
+struct dw_spi_transaction {
+	uint64_t buffer;
+	///< Pointer to data buffer to send over SPI.
+	///< Return values are stored in place of output data when
+	///< dw_spi_transaction::read_flag is 1.
+	uint32_t size; ///< Size of dw_spi_transaction::buffer.
+	uint64_t status_reg; ///< Pointer to SR register.
+	uint64_t data_reg; ///< Pointer to DR register.
+	uint8_t read_flag;
+	///< When 1, store RX FIFO data to dw_spi_transaction::buffer.
+} __attribute__((packed));
+
+/**
+ * @brief Arguments for check_fill helper function.
+ */
+struct dw_spi_check_fill {
+	uint32_t address; ///< Starting address. Sector aligned.
+	uint32_t sector_size; ///< Sector size.
+	uint32_t sector_count; ///< Number of sectors to check.
+	uint64_t status_reg; ///< Pointer to SR register.
+	uint64_t data_reg; ///< Pointer to DR register.
+	uint64_t fill_status_array;
+	///< Pointer to array describing sectors fill status.
+	///< 1 if filled, 0 if not filled.
+	uint8_t pattern; ///< Fill pattern.
+	uint8_t read_cmd; ///< Read data command.
+	uint8_t four_byte_mode; ///< Four byte addressing mode flag.
+} __attribute__((packed));
+
+/**
+ * @brief Arguments for erase helper function.
+ */
+struct dw_spi_erase {
+	uint32_t address; ///< First sector address. Sector aligned.
+	uint32_t sector_size; ///< Sector size.
+	uint32_t sector_count; ///< Number of sectors to erase.
+	uint64_t status_reg; ///< Pointer to SR register.
+	uint64_t data_reg; ///< Pointer to DR register.
+	uint8_t read_status_cmd; ///< Read status command.
+	uint8_t write_enable_cmd; ///< Write enable command.
+	uint8_t erase_sector_cmd; ///< Erase sector command.
+	uint8_t write_enable_mask; ///< Write enable mask.
+	uint8_t busy_mask; ///< Busy mask.
+	uint8_t four_byte_mode; ///< Four byte addressing mode flag.
+} __attribute__((packed));
+
+/**
+ * @brief Arguments for program helper function.
+ */
+struct dw_spi_program {
+	uint32_t address;
+	///< First page address. Page aligned when write is crossing
+	///< the page boundary.
+	uint32_t page_size; ///< Page size.
+	uint64_t buffer; ///< Data buffer pointer.
+	uint32_t buffer_size; ///< Size of dw_spi_program::buffer.
+	uint64_t status_reg; ///< Pointer to SR register.
+	uint64_t data_reg; ///< Pointer to DR register.
+	uint8_t read_status_cmd; ///< Read status command.
+	uint8_t write_enable_cmd; ///< Write enable command.
+	uint8_t program_cmd; ///< Program command.
+	uint8_t write_enable_mask; ///< Write enable mask.
+	uint8_t busy_mask; ///< Busy mask.
+	uint8_t four_byte_mode; ///< Four byte addressing mode flag.
+} __attribute__((packed));
+
+/**
+ * @brief Arguments for read helper function.
+ */
+struct dw_spi_read {
+	uint32_t address; ///< First sector address.
+	uint64_t buffer; ///< Data buffer pointer.
+	uint32_t buffer_size; ///< Size of dw_spi_read::buffer.
+	uint64_t status_reg; ///< Pointer to SR register.
+	uint64_t data_reg; ///< Pointer to DR register.
+	uint8_t read_cmd; ///< Read data command.
+	uint8_t four_byte_mode; ///< Four byte addressing mode flag.
+} __attribute__((packed));
+
+#endif /* OPENOCD_FLASH_NOR_DW_SPI_HELPER_H */

src/flash/nor/eneispif.c

@@ -0,0 +1,433 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (c) 2024 ENE Technology Inc.
+ * steven@ene.com.tw
+*/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/time_support.h>
+#include <helper/bits.h>
+#include <target/target.h>
+#include <flash/nor/core.h>
+#include <flash/nor/driver.h>
+#include <flash/nor/spi.h>
+
+#define ISPICFG  0x0000
+#define ISPISTS  0x0004
+#define ISPIADDR 0x0008
+#define ISPICMD  0x000C
+#define ISPIDAT  0x0100
+
+#define ISPISTS_BUSY  BIT(0)
+#define STATUS1_QE    BIT(1)
+
+#define CFG_READ  0x372
+#define CFG_WRITE 0x371
+
+#define ISPI_CTRL_BASE 0x50101000
+
+/*                name         read qread  page  erase chip  device_id   page   erase  flash
+ *                             _cmd _cmd   _prog _cmd* _erase            size   size*  size
+ *                                         _cmd        _cmd
+ */
+struct flash_device ene_flash_device =
+	FLASH_ID("ISPI flash", 0x03, 0x00, 0x02, 0x20, 0x60, 0x00132085, 0x100, 0x1000, 0x80000);
+
+struct eneispif_flash_bank {
+	bool probed;
+	target_addr_t ctrl_base;
+	uint32_t dev_id;
+	const struct flash_device *dev;
+};
+
+FLASH_BANK_COMMAND_HANDLER(eneispif_flash_bank_command)
+{
+	struct eneispif_flash_bank *eneispif_info;
+
+	LOG_DEBUG("%s", __func__);
+
+	if (CMD_ARGC < 6)
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	eneispif_info = malloc(sizeof(struct eneispif_flash_bank));
+	if (!eneispif_info) {
+		LOG_ERROR("not enough memory");
+		return ERROR_FAIL;
+	}
+
+	bank->driver_priv = eneispif_info;
+	eneispif_info->probed = false;
+	eneispif_info->ctrl_base = ISPI_CTRL_BASE;
+	if (CMD_ARGC >= 7) {
+		COMMAND_PARSE_ADDRESS(CMD_ARGV[6], eneispif_info->ctrl_base);
+		LOG_INFO("ASSUMING ISPI device at ctrl_base = " TARGET_ADDR_FMT,
+			 eneispif_info->ctrl_base);
+	}
+
+	return ERROR_OK;
+}
+
+static int eneispif_read_reg(struct flash_bank *bank, uint32_t *value, target_addr_t address)
+{
+	struct target *target = bank->target;
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+
+	int result = target_read_u32(target, eneispif_info->ctrl_base + address, value);
+	if (result != ERROR_OK) {
+		LOG_ERROR("%s error at " TARGET_ADDR_FMT, __func__,
+			  eneispif_info->ctrl_base + address);
+		return result;
+	}
+	LOG_DEBUG("Read address " TARGET_ADDR_FMT " = 0x%" PRIx32,
+		  eneispif_info->ctrl_base + address, *value);
+	return ERROR_OK;
+}
+
+static int eneispif_write_reg(struct flash_bank *bank, target_addr_t address, uint32_t value)
+{
+	struct target *target = bank->target;
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+
+	LOG_DEBUG("Write address " TARGET_ADDR_FMT " = 0x%" PRIx32,
+		  eneispif_info->ctrl_base + address, value);
+	int result = target_write_u32(target, eneispif_info->ctrl_base + address, value);
+	if (result != ERROR_OK) {
+		LOG_ERROR("%s error writing 0x%" PRIx32 " to " TARGET_ADDR_FMT, __func__,
+			  value, eneispif_info->ctrl_base + address);
+		return result;
+	}
+	return ERROR_OK;
+}
+
+static int eneispif_wait(struct flash_bank *bank)
+{
+	int64_t start = timeval_ms();
+
+	while (1) {
+		uint32_t status;
+
+		if (eneispif_read_reg(bank, &status, ISPISTS) != ERROR_OK)
+			return ERROR_FAIL;
+
+		if (!(status & ISPISTS_BUSY))
+			break;
+
+		int64_t now = timeval_ms();
+		if (now - start > 1000) {
+			LOG_ERROR("Busy more than 1000ms.");
+			return ERROR_TARGET_TIMEOUT;
+		}
+	}
+
+	return ERROR_OK;
+}
+
+static int eneispi_erase_sector(struct flash_bank *bank, int sector)
+{
+	int retval = ERROR_OK;
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+	uint32_t offset;
+	uint32_t conf;
+
+	retval = eneispif_read_reg(bank, &conf, ISPICFG);
+	if (retval != ERROR_OK)
+		return retval;
+
+	offset = bank->sectors[sector].offset;
+	retval = eneispif_write_reg(bank, ISPIADDR, offset); /* Address */
+	if (retval != ERROR_OK)
+		goto done;
+
+	eneispif_write_reg(bank, ISPICFG, CFG_WRITE);       /* Cmmmand enable */
+	eneispif_write_reg(bank, ISPICMD, SPIFLASH_WRITE_ENABLE); /* Write enable */
+	retval = eneispif_write_reg(bank, ISPICMD, eneispif_info->dev->erase_cmd); /* Erase page */
+	if (retval != ERROR_OK)
+		goto done;
+
+	retval = eneispif_wait(bank);
+	if (retval != ERROR_OK)
+		goto done;
+
+done:
+	eneispif_write_reg(bank, ISPICFG, conf); /* restore */
+	return retval;
+}
+
+static int eneispif_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
+{
+	struct target *target = bank->target;
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+	int retval = ERROR_OK;
+
+	LOG_DEBUG("%s: from sector %u to sector %u", __func__, first, last);
+
+	if (target->state != TARGET_HALTED) {
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+
+	if (last < first || last >= bank->num_sectors) {
+		LOG_ERROR("Flash sector invalid");
+		return ERROR_FLASH_SECTOR_INVALID;
+	}
+
+	if (!(eneispif_info->probed)) {
+		LOG_ERROR("Flash bank not probed");
+		return ERROR_FLASH_BANK_NOT_PROBED;
+	}
+
+	for (unsigned int sector = first; sector <= last; sector++) {
+		if (bank->sectors[sector].is_protected) {
+			LOG_ERROR("Flash sector %u protected", sector);
+			return ERROR_FAIL;
+		}
+	}
+
+	if (eneispif_info->dev->erase_cmd == 0x00)
+		return ERROR_FLASH_OPER_UNSUPPORTED;
+
+	for (unsigned int sector = first; sector <= last; sector++) {
+		retval = eneispi_erase_sector(bank, sector);
+		if (retval != ERROR_OK)
+			break;
+	}
+
+	return retval;
+}
+
+static int eneispif_protect(struct flash_bank *bank, int set, unsigned int first, unsigned int last)
+{
+	for (unsigned int sector = first; sector <= last; sector++)
+		bank->sectors[sector].is_protected = set;
+
+	return ERROR_OK;
+}
+
+static int eneispif_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset,
+			  uint32_t count)
+{
+	struct target *target = bank->target;
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+	uint32_t page_size;
+	uint32_t conf;
+	int retval = ERROR_OK;
+
+	LOG_DEBUG("bank->size=0x%x offset=0x%08" PRIx32 " count=0x%08" PRIx32, bank->size, offset,
+		  count);
+
+	if (target->state != TARGET_HALTED) {
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+
+	if (offset + count > eneispif_info->dev->size_in_bytes) {
+		LOG_WARNING("Write past end of flash. Extra data discarded.");
+		count = eneispif_info->dev->size_in_bytes - offset;
+	}
+
+	/* Check sector protection */
+	for (unsigned int sector = 0; sector < bank->num_sectors; sector++) {
+		/* Start offset in or before this sector? */
+		/* End offset in or behind this sector? */
+		if ((offset < (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
+		    ((offset + count - 1) >= bank->sectors[sector].offset) &&
+		    bank->sectors[sector].is_protected) {
+			LOG_ERROR("Flash sector %u protected", sector);
+			return ERROR_FAIL;
+		}
+	}
+
+	retval = eneispif_read_reg(bank, &conf, ISPICFG);
+	if (retval != ERROR_OK)
+		return retval;
+
+	eneispif_write_reg(bank, ISPICFG, CFG_WRITE); // Cmmmand enable
+
+	/* If no valid page_size, use reasonable default. */
+	page_size =
+		eneispif_info->dev->pagesize ? eneispif_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
+	uint32_t page_offset = offset % page_size;
+
+	while (count > 0) {
+		uint32_t cur_count;
+
+		/* clip block at page boundary */
+		if (page_offset + count > page_size)
+			cur_count = page_size - page_offset;
+		else
+			cur_count = count;
+
+		eneispif_write_reg(bank, ISPICMD, SPIFLASH_WRITE_ENABLE); /* Write enable */
+		target_write_buffer(target, eneispif_info->ctrl_base + ISPIDAT, cur_count, buffer);
+		eneispif_write_reg(bank, ISPIADDR, offset);
+		retval = eneispif_write_reg(bank, ISPICMD,
+					    (cur_count << 16) | eneispif_info->dev->pprog_cmd);
+		if (retval != ERROR_OK)
+			goto err;
+
+		page_offset = 0;
+		buffer += cur_count;
+		offset += cur_count;
+		count -= cur_count;
+		retval = eneispif_wait(bank);
+		if (retval != ERROR_OK)
+			goto err;
+	}
+
+err:
+	eneispif_write_reg(bank, ISPICFG, conf); /* restore */
+	return retval;
+}
+
+/* Return ID of flash device */
+/* On exit, SW mode is kept */
+static int eneispif_read_flash_id(struct flash_bank *bank, uint32_t *id)
+{
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+	struct target *target = bank->target;
+	int retval;
+	uint32_t conf, value;
+	uint8_t buffer[4];
+
+	if (target->state != TARGET_HALTED) {
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+
+	retval = eneispif_read_reg(bank, &conf, ISPICFG);
+	if (retval != ERROR_OK)
+		return retval;
+
+	LOG_DEBUG("ISPCFG = (0x%08" PRIx32 ")", conf);
+
+	/* read ID from Receive Register */
+	eneispif_write_reg(bank, ISPICFG, CFG_WRITE); /* Cmmmand enable */
+	retval = eneispif_write_reg(bank, ISPICMD, (3 << 16) | SPIFLASH_READ_ID);
+	if (retval != ERROR_OK)
+		goto done;
+
+	retval = eneispif_wait(bank);
+	if (retval != ERROR_OK)
+		goto done;
+
+	retval = target_read_buffer(target, eneispif_info->ctrl_base + ISPIDAT, 3, buffer);
+	if (retval != ERROR_OK)
+		goto done;
+	value = (buffer[2] << 16) | (buffer[1] << 8) | buffer[0];
+	LOG_DEBUG("ISPDAT = (0x%08" PRIx32 ")", value);
+
+	*id = value;
+done:
+	eneispif_write_reg(bank, ISPICFG, conf); // restore
+	return retval;
+}
+
+static int eneispif_probe(struct flash_bank *bank)
+{
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+	struct flash_sector *sectors;
+	uint32_t id;
+	int retval;
+	uint32_t sectorsize;
+
+	if (eneispif_info->probed)
+		free(bank->sectors);
+
+	eneispif_info->probed = false;
+
+	LOG_INFO("Assuming ISPI flash at address " TARGET_ADDR_FMT
+		 " with controller at " TARGET_ADDR_FMT,
+		 bank->base, eneispif_info->ctrl_base);
+
+	eneispif_write_reg(bank, ISPICFG, CFG_READ); /* RAM map enable */
+
+	retval = eneispif_read_flash_id(bank, &id);
+	if (retval != ERROR_OK)
+		return retval;
+
+	eneispif_info->dev_id = id;
+	eneispif_info->dev = &ene_flash_device;
+
+	LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")", eneispif_info->dev->name,
+		 eneispif_info->dev_id);
+
+	/* Set correct size value */
+	bank->size = eneispif_info->dev->size_in_bytes;
+
+	if (bank->size <= (1UL << 16))
+		LOG_WARNING("device needs 2-byte addresses - not implemented");
+
+	/* if no sectors, treat whole bank as single sector */
+	sectorsize = eneispif_info->dev->sectorsize ? eneispif_info->dev->sectorsize
+						    : eneispif_info->dev->size_in_bytes;
+
+	/* create and fill sectors array */
+	bank->num_sectors = eneispif_info->dev->size_in_bytes / sectorsize;
+	sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
+	if (!sectors) {
+		LOG_ERROR("not enough memory");
+		return ERROR_FAIL;
+	}
+
+	for (unsigned int sector = 0; sector < bank->num_sectors; sector++) {
+		sectors[sector].offset = sector * sectorsize;
+		sectors[sector].size = sectorsize;
+		sectors[sector].is_erased = -1;
+		sectors[sector].is_protected = 0;
+	}
+
+	bank->sectors = sectors;
+	eneispif_info->probed = true;
+	return ERROR_OK;
+}
+
+static int eneispif_auto_probe(struct flash_bank *bank)
+{
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+	if (eneispif_info->probed)
+		return ERROR_OK;
+	return eneispif_probe(bank);
+}
+
+static int eneispif_protect_check(struct flash_bank *bank)
+{
+	/* Nothing to do. Protection is only handled in SW. */
+	return ERROR_OK;
+}
+
+static int get_eneispif_info(struct flash_bank *bank, struct command_invocation *cmd)
+{
+	struct eneispif_flash_bank *eneispif_info = bank->driver_priv;
+
+	if (!(eneispif_info->probed)) {
+		command_print(cmd, "ENE ISPI flash bank not probed yet.");
+		return ERROR_OK;
+	}
+
+	command_print(cmd,
+			"ENE ISPI flash information:\n"
+			"  Device \'%s\' (ID 0x%08" PRIx32 ")",
+			eneispif_info->dev->name, eneispif_info->dev_id);
+
+	return ERROR_OK;
+}
+
+const struct flash_driver eneispif_flash = {
+	.name = "eneispif",
+	.usage = "flash bank <name> 'eneispif' <base_address> <size> 0 0 <target> <ctrl_base>",
+	.flash_bank_command = eneispif_flash_bank_command,
+	.erase = eneispif_erase,
+	.protect = eneispif_protect,
+	.write = eneispif_write,
+	.read = default_flash_read,
+	.probe = eneispif_probe,
+	.auto_probe = eneispif_auto_probe,
+	.erase_check = default_flash_blank_check,
+	.protect_check = eneispif_protect_check,
+	.info = get_eneispif_info,
+	.free_driver_priv = default_flash_free_driver_priv,
+};

src/flash/nor/fespi.c

@@ -531,7 +531,7 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
 		bin_size = sizeof(riscv64_bin);
 	}
 
-	unsigned data_wa_size = 0;
+	unsigned int data_wa_size = 0;
 	if (target_alloc_working_area(target, bin_size, &algorithm_wa) == ERROR_OK) {
 		retval = target_write_buffer(target, algorithm_wa->address,
 				bin_size, bin);

src/flash/nor/fm4.c

@@ -107,7 +107,7 @@ static int fm4_flash_erase(struct flash_bank *bank, unsigned int first,
 	struct working_area *workarea;
 	struct reg_param reg_params[4];
 	struct armv7m_algorithm armv7m_algo;
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t erase_sector_code[] = {
 #include "../../../contrib/loaders/flash/fm4/erase.inc"
@@ -207,7 +207,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 	struct armv7m_algorithm armv7m_algo;
 	uint32_t halfword_count = DIV_ROUND_UP(byte_count, 2);
 	uint32_t result;
-	unsigned i;
+	unsigned int i;
 	int retval, retval2 = ERROR_OK;
 	const uint8_t write_block_code[] = {
 #include "../../../contrib/loaders/flash/fm4/write.inc"

src/flash/nor/kinetis.c

@@ -256,7 +256,7 @@
 struct kinetis_flash_bank {
 	struct kinetis_chip *k_chip;
 	bool probed;
-	unsigned bank_number;		/* bank number in particular chip */
+	unsigned int bank_number;	/* bank number in particular chip */
 	struct flash_bank *bank;
 
 	uint32_t sector_size;
@@ -285,9 +285,9 @@ struct kinetis_chip {
 	uint32_t fcfg2_maxaddr0_shifted;
 	uint32_t fcfg2_maxaddr1_shifted;
 
-	unsigned num_pflash_blocks, num_nvm_blocks;
+	unsigned int num_pflash_blocks, num_nvm_blocks;
-	unsigned pflash_sector_size, nvm_sector_size;
+	unsigned int pflash_sector_size, nvm_sector_size;
-	unsigned max_flash_prog_size;
+	unsigned int max_flash_prog_size;
 
 	uint32_t pflash_base;
 	uint32_t pflash_size;
@@ -337,7 +337,7 @@ struct kinetis_chip {
 
 	char name[40];
 
-	unsigned num_banks;
+	unsigned int num_banks;
 	struct kinetis_flash_bank banks[KINETIS_MAX_BANKS];
 };
 
@@ -425,7 +425,7 @@ static int kinetis_probe_chip_s32k(struct kinetis_chip *k_chip);
 static int kinetis_auto_probe(struct flash_bank *bank);
 
 
-static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
+static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
 {
 	LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 
@@ -453,7 +453,7 @@ static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint3
 	return ERROR_OK;
 }
 
-static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
+static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
 {
 	struct adiv5_ap *ap = dap_get_ap(dap, MDM_AP);
 	if (!ap) {
@@ -479,7 +479,7 @@ static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32
 	return ERROR_OK;
 }
 
-static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg,
+static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg,
 			uint32_t mask, uint32_t value, uint32_t timeout_ms)
 {
 	uint32_t val;
@@ -930,7 +930,7 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
 	k_chip = kinetis_get_chip(target);
 
 	if (!k_chip) {
-		k_chip = calloc(sizeof(struct kinetis_chip), 1);
+		k_chip = calloc(1, sizeof(struct kinetis_chip));
 		if (!k_chip) {
 			LOG_ERROR("No memory");
 			return ERROR_FAIL;
@@ -977,7 +977,7 @@ static void kinetis_free_driver_priv(struct flash_bank *bank)
 
 static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
 {
-	unsigned num_blocks;
+	unsigned int num_blocks;
 	struct kinetis_flash_bank *k_bank;
 	struct flash_bank *bank;
 	char base_name[69], name[87], num[11];
@@ -1031,13 +1031,14 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
 					 bank_idx - k_chip->num_pflash_blocks);
 		}
 
-		bank = calloc(sizeof(struct flash_bank), 1);
+		bank = calloc(1, sizeof(struct flash_bank));
 		if (!bank)
 			return ERROR_FAIL;
 
 		bank->target = k_chip->target;
 		bank->driver = &kinetis_flash;
 		bank->default_padded_value = bank->erased_value = 0xff;
+		bank->minimal_write_gap = FLASH_WRITE_GAP_SECTOR;
 
 		snprintf(name, sizeof(name), "%s.%s%s",
 			 base_name, class, num);
@@ -1462,7 +1463,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf)
 	uint32_t fprot = 0xffffffff;
 	uint8_t fsec = 0xfe;		 /* set MCU unsecure */
 	uint8_t fdprot = 0xff;
-	unsigned num_blocks;
+	unsigned int num_blocks;
 	uint32_t pflash_bit;
 	uint8_t dflash_bit;
 	struct flash_bank *bank_iter;
@@ -1488,7 +1489,22 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf)
 
 		kinetis_auto_probe(bank_iter);
 
-		assert(bank_iter->prot_blocks);
+		if (bank_iter->num_prot_blocks == 0) {
+			if (k_bank->flash_class == FC_PFLASH) {
+				LOG_ERROR("BUG: PFLASH bank %u has no protection blocks",
+						  bank_idx);
+			} else {
+				LOG_DEBUG("skipping FLEX_NVM bank %u with no prot blocks (EE bkp only)",
+						  bank_idx);
+			}
+			continue;
+		}
+
+		if (!bank_iter->prot_blocks) {
+			LOG_ERROR("BUG: bank %u has NULL protection blocks array",
+					  bank_idx);
+			continue;
+		}
 
 		if (k_bank->flash_class == FC_PFLASH) {
 			for (unsigned int i = 0; i < bank_iter->num_prot_blocks; i++) {
@@ -2268,12 +2284,12 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
 	uint32_t ee_size = 0;
 	uint32_t pflash_size_k, nvm_size_k, dflash_size_k;
 	uint32_t pflash_size_m;
-	unsigned num_blocks = 0;
+	unsigned int num_blocks = 0;
-	unsigned maxaddr_shift = 13;
+	unsigned int maxaddr_shift = 13;
 	struct target *target = k_chip->target;
 
-	unsigned familyid = 0, subfamid = 0;
+	unsigned int familyid = 0, subfamid = 0;
-	unsigned cpu_mhz = 120;
+	unsigned int cpu_mhz = 120;
 	bool use_nvm_marking = false;
 	char flash_marking[12], nvm_marking[2];
 	char name[40];
@@ -2894,7 +2910,7 @@ static int kinetis_probe(struct flash_bank *bank)
 {
 	int result;
 	uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
-	unsigned num_blocks, first_nvm_bank;
+	unsigned int num_blocks, first_nvm_bank;
 	uint32_t size_k;
 	struct kinetis_flash_bank *k_bank = bank->driver_priv;
 	struct kinetis_chip *k_chip;
@@ -2939,7 +2955,7 @@ static int kinetis_probe(struct flash_bank *bank)
 
 	} else if (k_bank->bank_number < num_blocks) {
 		/* nvm, banks start at address 0x10000000 */
-		unsigned nvm_ord = k_bank->bank_number - first_nvm_bank;
+		unsigned int nvm_ord = k_bank->bank_number - first_nvm_bank;
 		uint32_t limit;
 
 		k_bank->flash_class = FC_FLEX_NVM;
@@ -3138,8 +3154,8 @@ static int kinetis_blank_check(struct flash_bank *bank)
 COMMAND_HANDLER(kinetis_nvm_partition)
 {
 	int result;
-	unsigned bank_idx;
+	unsigned int bank_idx;
-	unsigned num_blocks, first_nvm_bank;
+	unsigned int num_blocks, first_nvm_bank;
 	unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
 	enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
 	bool enable;

src/flash/nor/kinetis_ke.c

@@ -134,7 +134,7 @@ struct kinetis_ke_flash_bank {
 
 #define MDM_ACCESS_TIMEOUT	3000 /* iterations */
 
-static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
+static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
 {
 	LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 
@@ -161,7 +161,7 @@ static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, ui
 	return ERROR_OK;
 }
 
-static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
+static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
 {
 	struct adiv5_ap *ap = dap_get_ap(dap, 1);
 	if (!ap) {
@@ -187,7 +187,7 @@ static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uin
 	return ERROR_OK;
 }
 
-static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
+static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value)
 {
 	uint32_t val;
 	int retval;

src/flash/nor/lpc2000.c

@@ -272,7 +272,7 @@
 
 #define LPC11XX_REG_SECTORS	24
 
-typedef enum {
+enum lpc2000_variant {
 	LPC2000_V1,
 	LPC2000_V2,
 	LPC1700,
@@ -282,10 +282,10 @@ typedef enum {
 	LPC1500,
 	LPC54100,
 	LPC_AUTO,
-} lpc2000_variant;
+};
 
 struct lpc2000_flash_bank {
-	lpc2000_variant variant;
+	enum lpc2000_variant variant;
 	uint32_t cclk;
 	int cmd51_dst_boundary;
 	int calc_checksum;

src/flash/nor/max32xxx.c

@@ -87,7 +87,7 @@ FLASH_BANK_COMMAND_HANDLER(max32xxx_flash_bank_command)
 		return ERROR_FLASH_BANK_INVALID;
 	}
 
-	info = calloc(sizeof(struct max32xxx_flash_bank), 1);
+	info = calloc(1, sizeof(struct max32xxx_flash_bank));
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], info->flash_size);
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], info->flc_base);
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], info->sector_size);
@@ -202,14 +202,14 @@ static int max32xxx_protect_check(struct flash_bank *bank)
 		return ERROR_FLASH_BANK_NOT_PROBED;
 
 	if (!info->max326xx) {
-		for (unsigned i = 0; i < bank->num_sectors; i++)
+		for (unsigned int i = 0; i < bank->num_sectors; i++)
 			bank->sectors[i].is_protected = -1;
 
 		return ERROR_FLASH_OPER_UNSUPPORTED;
 	}
 
 	/* Check the protection */
-	for (unsigned i = 0; i < bank->num_sectors; i++) {
+	for (unsigned int i = 0; i < bank->num_sectors; i++) {
 		if (i%32 == 0)
 			target_read_u32(target, info->flc_base + FLSH_PROT + ((i/32)*4), &temp_reg);
 
@@ -360,7 +360,7 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
 	struct armv7m_algorithm armv7m_info;
 	int retval = ERROR_OK;
 	/* power of two, and multiple of word size */
-	static const unsigned buf_min = 128;
+	static const unsigned int buf_min = 128;
 
 	/* for small buffers it's faster not to download an algorithm */
 	if (wcount * 4 < buf_min)
@@ -388,8 +388,8 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 
-		LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
+		LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
-			target_name(target), (unsigned) buffer_size);
+			target_name(target), buffer_size);
 	}
 
 	target_write_buffer(target, write_algorithm->address, sizeof(write_code),
@@ -903,7 +903,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command)
 	}
 
 	LOG_WARNING("s:<sector number> a:<address> p:<protection bit>");
-	for (unsigned i = 0; i < bank->num_sectors; i += 4) {
+	for (unsigned int i = 0; i < bank->num_sectors; i += 4) {
 		LOG_WARNING("s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d",
 		(i+0), (i+0)*info->sector_size, bank->sectors[(i+0)].is_protected,
 		(i+1), (i+1)*info->sector_size, bank->sectors[(i+1)].is_protected,

src/flash/nor/msp432.c

@@ -937,7 +937,7 @@ static int msp432_probe(struct flash_bank *bank)
 
 	if (is_main && MSP432P4 == msp432_bank->family_type) {
 		/* Create the info flash bank needed by MSP432P4 variants */
-		struct flash_bank *info = calloc(sizeof(struct flash_bank), 1);
+		struct flash_bank *info = calloc(1, sizeof(struct flash_bank));
 		if (!info)
 			return ERROR_FAIL;
 

src/flash/nor/pic32mx.c

@@ -92,7 +92,7 @@ struct pic32mx_flash_bank {
  * DEVID values as per PIC32MX Flash Programming Specification Rev N
  */
 
-static const struct pic32mx_devs_s {
+static const struct pic32mx_devs {
 	uint32_t devid;
 	const char *name;
 } pic32mx_devs[] = {

src/flash/nor/psoc5lp.c

@@ -102,10 +102,10 @@
 
 struct psoc5lp_device {
 	uint32_t id;
-	unsigned fam;
+	unsigned int fam;
-	unsigned speed_mhz;
+	unsigned int speed_mhz;
-	unsigned flash_kb;
+	unsigned int flash_kb;
-	unsigned eeprom_kb;
+	unsigned int eeprom_kb;
 };
 
 /*
@@ -245,7 +245,7 @@ static int psoc5lp_find_device(struct target *target,
 	const struct psoc5lp_device **device)
 {
 	uint32_t device_id;
-	unsigned i;
+	unsigned int i;
 	int retval;
 
 	*device = NULL;
@@ -381,9 +381,9 @@ static int psoc5lp_spc_load_byte(struct target *target,
 }
 
 static int psoc5lp_spc_load_row(struct target *target,
-	uint8_t array_id, const uint8_t *data, unsigned row_size)
+	uint8_t array_id, const uint8_t *data, unsigned int row_size)
 {
-	unsigned i;
+	unsigned int i;
 	int retval;
 
 	retval = psoc5lp_spc_write_opcode(target, SPC_LOAD_ROW);
@@ -853,7 +853,7 @@ static int psoc5lp_eeprom_write(struct flash_bank *bank,
 {
 	struct target *target = bank->target;
 	uint8_t temp[2];
-	unsigned row;
+	unsigned int row;
 	int retval;
 
 	if (offset % EEPROM_ROW_SIZE != 0) {
@@ -1124,7 +1124,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
 	struct working_area *code_area, *even_row_area, *odd_row_area;
 	uint32_t row_size;
 	uint8_t temp[2], buf[12], ecc_bytes[ROW_ECC_SIZE];
-	unsigned array_id, row;
+	unsigned int array_id, row;
 	int i, retval;
 
 	if (offset + byte_count > bank->size) {
@@ -1183,7 +1183,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
 		     row < ROWS_PER_BLOCK && byte_count > 0; row++) {
 			bool even_row = (row % 2 == 0);
 			struct working_area *data_area = even_row ? even_row_area : odd_row_area;
-			unsigned len = MIN(ROW_SIZE, byte_count);
+			unsigned int len = MIN(ROW_SIZE, byte_count);
 
 			LOG_DEBUG("Writing load command for array %u row %u at " TARGET_ADDR_FMT,
 				array_id, row, data_area->address);
@@ -1307,8 +1307,8 @@ static int psoc5lp_protect_check(struct flash_bank *bank)
 {
 	struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv;
 	uint8_t row_data[ROW_SIZE];
-	const unsigned protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8;
+	const unsigned int protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8;
-	unsigned i, k, num_sectors;
+	unsigned int i, k, num_sectors;
 	int retval;
 
 	if (bank->target->state != TARGET_HALTED) {

src/flash/nor/psoc6.c

@@ -18,7 +18,6 @@
 #include "target/target.h"
 #include "target/cortex_m.h"
 #include "target/breakpoints.h"
-#include "target/target_type.h"
 #include "target/algorithm.h"
 
 /**************************************************************************************************
@@ -224,6 +223,8 @@ static int ipc_poll_lock_stat(struct target *target, uint32_t ipc_id, bool lock_
 {
 	int hr;
 	uint32_t reg_val;
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	bool is_cm0 = (armv7m->arm.arch == ARM_ARCH_V6M);
 
 	struct timeout to;
 	timeout_init(&to, IPC_TIMEOUT_MS);
@@ -245,7 +246,7 @@ static int ipc_poll_lock_stat(struct target *target, uint32_t ipc_id, bool lock_
 			return ERROR_OK;
 	}
 
-	if (target->coreid) {
+	if (!is_cm0) {
 		LOG_WARNING("SROM API calls via CM4 target are supported on single-core PSoC6 devices only. "
 			"Please perform all Flash-related operations via CM0+ target on dual-core devices.");
 	}
@@ -486,7 +487,7 @@ static int psoc6_get_info(struct flash_bank *bank, struct command_invocation *cm
 {
 	struct psoc6_target_info *psoc6_info = bank->driver_priv;
 
-	if (psoc6_info->is_probed == false)
+	if (!psoc6_info->is_probed)
 		return ERROR_FAIL;
 
 	int hr = get_silicon_id(bank->target, &psoc6_info->silicon_id, &psoc6_info->protection);
@@ -887,7 +888,8 @@ static int handle_reset_halt(struct target *target)
 {
 	int hr;
 	uint32_t reset_addr;
-	bool is_cm0 = (target->coreid == 0);
+	struct armv7m_common *armv7m = target_to_armv7m(target);
+	bool is_cm0 = (armv7m->arm.arch == ARM_ARCH_V6M);
 
 	/* Halt target device */
 	if (target->state != TARGET_HALTED) {

src/flash/nor/sfdp.c

@@ -12,7 +12,6 @@
 #include "spi.h"
 #include "sfdp.h"
 
-#define SFDP_MAGIC			0x50444653
 #define SFDP_ACCESS_PROT	0xFF
 #define SFDP_BASIC_FLASH	0xFF00
 #define SFDP_4BYTE_ADDR		0xFF84
@@ -100,11 +99,11 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev,
 		goto err;
 
 	for (k = 0; k < nph; k++) {
-		uint8_t words = (pheaders[k].revision >> 24) & 0xFF;
+		unsigned int words = (pheaders[k].revision >> 24) & 0xFF;
 		uint16_t id = (((pheaders[k].ptr) >> 16) & 0xFF00) | (pheaders[k].revision & 0xFF);
 		uint32_t ptr = pheaders[k].ptr & 0xFFFFFF;
 
-		LOG_DEBUG("pheader %d len=0x%02" PRIx8 " id=0x%04" PRIx16
+		LOG_DEBUG("pheader %d len=0x%02x id=0x%04" PRIx16
 			" ptr=0x%06" PRIx32, k, words, id, ptr);
 
 		/* retrieve parameter table */

src/flash/nor/sfdp.h

@@ -7,6 +7,8 @@
 #ifndef OPENOCD_FLASH_NOR_SFDP_H
 #define OPENOCD_FLASH_NOR_SFDP_H
 
+#define SFDP_MAGIC          0x50444653
+
 /* per JESD216D 'addr' is *byte* based but must be word aligned,
  * 'buffer' is word based, word aligned and always little-endian encoded,
  * in the flash, 'addr_len' is 3 or 4, 'dummy' ***usually*** 8
@@ -16,7 +18,7 @@
  *
  * buffer contents is supposed to be returned in ***host*** endianness */
 typedef int (*read_sfdp_block_t)(struct flash_bank *bank, uint32_t addr,
-	uint32_t words, uint32_t *buffer);
+	unsigned int words, uint32_t *buffer);
 
 extern int spi_sfdp(struct flash_bank *bank, struct flash_device *dev,
 	read_sfdp_block_t read_sfdp_block);

src/flash/nor/sim3x.c

@@ -859,7 +859,7 @@ static int sim3x_flash_info(struct flash_bank *bank, struct command_invocation *
  *  reg 3:2  - register
  *  reg 1:0  - no effect
  */
-static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
+static int ap_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
 {
 	LOG_DEBUG("DAP_REG[0x%02x] <- %08" PRIX32, reg, value);
 
@@ -886,7 +886,7 @@ static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value
 	return ERROR_OK;
 }
 
-static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
+static int ap_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
 {
 	struct adiv5_ap *ap = dap_get_ap(dap, SIM3X_AP);
 	if (!ap) {
@@ -912,7 +912,7 @@ static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *resul
 	return ERROR_OK;
 }
 
-static int ap_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value, int timeout)
+static int ap_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value, int timeout)
 {
 	uint32_t val;
 	int retval;

src/flash/nor/stellaris.c

@@ -453,7 +453,7 @@ FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
 	if (CMD_ARGC < 6)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	stellaris_info = calloc(sizeof(struct stellaris_flash_bank), 1);
+	stellaris_info = calloc(1, sizeof(struct stellaris_flash_bank));
 	bank->base = 0x0;
 	bank->driver_priv = stellaris_info;
 
@@ -530,7 +530,7 @@ static void stellaris_set_flash_timing(struct flash_bank *bank)
 	target_write_u32(target, SCB_BASE | USECRL, usecrl);
 }
 
-static const unsigned rcc_xtal[32] = {
+static const unsigned int rcc_xtal[32] = {
 	[0x00] = 1000000,		/* no pll */
 	[0x01] = 1843200,		/* no pll */
 	[0x02] = 2000000,		/* no pll */
@@ -569,7 +569,7 @@ static void stellaris_read_clock_info(struct flash_bank *bank)
 	struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
 	struct target *target = bank->target;
 	uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
-	unsigned xtal;
+	unsigned int xtal;
 	unsigned long mainfreq;
 
 	target_read_u32(target, SCB_BASE | RCC, &rcc);
@@ -1029,7 +1029,7 @@ static int stellaris_write_block(struct flash_bank *bank,
 	int retval = ERROR_OK;
 
 	/* power of two, and multiple of word size */
-	static const unsigned buf_min = 128;
+	static const unsigned int buf_min = 128;
 
 	/* for small buffers it's faster not to download an algorithm */
 	if (wcount * 4 < buf_min)
@@ -1056,8 +1056,8 @@ static int stellaris_write_block(struct flash_bank *bank,
 			target_free_working_area(target, write_algorithm);
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
-		LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
+		LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
-				target_name(target), (unsigned) buffer_size);
+				target_name(target), buffer_size);
 	}
 
 	target_write_buffer(target, write_algorithm->address,

src/flash/nor/stm32f2x.c

@@ -1020,7 +1020,7 @@ static int stm32x_probe(struct flash_bank *bank)
 		assert(num_sectors > 0);
 
 		bank->num_sectors = num_sectors;
-		bank->sectors = calloc(sizeof(struct flash_sector), num_sectors);
+		bank->sectors = calloc(num_sectors, sizeof(struct flash_sector));
 
 		if (stm32x_otp_is_f7(bank))
 			bank->size = STM32F7_OTP_SIZE;

src/flash/nor/stm32l4x.c

@@ -120,6 +120,18 @@
  * http://www.st.com/resource/en/reference_manual/dm00346336.pdf
  */
 
+/* STM32U0xxx series for reference.
+ *
+ * RM0503 (STM32U0xx)
+ * https://www.st.com/resource/en/reference_manual/rm0503-stm32u0-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
+ */
+
+/* STM32U5xxx series for reference.
+ *
+ * RM0456 (STM32U5xx)
+ * http://www.st.com/resource/en/reference_manual/dm00477635.pdf
+ */
+
 /* Erase time can be as high as 25ms, 10x this and assume it's toast... */
 
 #define FLASH_ERASE_TIMEOUT 250
@@ -272,7 +284,7 @@ struct stm32l4_wrp {
 };
 
 /* human readable list of families this drivers supports (sorted alphabetically) */
-static const char *device_families = "STM32C0/G0/G4/L4/L4+/L5/U5/WB/WL";
+static const char *device_families = "STM32C0/G0/G4/L4/L4+/L5/U0/U5/WB/WL";
 
 static const struct stm32l4_rev stm32l47_l48xx_revs[] = {
 	{ 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" }
@@ -291,6 +303,10 @@ static const struct stm32l4_rev stm32c03xx_revs[] = {
 	{ 0x1000, "A" }, { 0x1001, "Z" },
 };
 
+static const struct stm32l4_rev stm32c071xx_revs[] = {
+	{ 0x1001, "Z" },
+};
+
 static const struct stm32l4_rev stm32g05_g06xx_revs[] = {
 	{ 0x1000, "A" },
 };
@@ -319,6 +335,10 @@ static const struct stm32l4_rev stm32g0b_g0cxx_revs[] = {
 	{ 0x1000, "A" },
 };
 
+static const struct stm32l4_rev stm32u0xx_revs[] = {
+	{ 0x1000, "A" },
+};
+
 static const struct stm32l4_rev stm32g43_g44xx_revs[] = {
 	{ 0x1000, "A" }, { 0x2000, "B" }, { 0x2001, "Z" },
 };
@@ -344,9 +364,17 @@ static const struct stm32l4_rev stm32g49_g4axx_revs[] = {
 	{ 0x1000, "A" },
 };
 
+static const struct stm32l4_rev stm32u53_u54xx_revs[] = {
+	{ 0x1000, "A" }, { 0x1001, "Z" },
+};
+
 static const struct stm32l4_rev stm32u57_u58xx_revs[] = {
 	{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" },
-	{ 0x2001, "X" }, { 0x3000, "C" },
+	{ 0x2001, "X" }, { 0x3000, "C" }, { 0x3001, "W" },
+};
+
+static const struct stm32l4_rev stm32u59_u5axx_revs[] = {
+	{ 0x3001, "X" },
 };
 
 static const struct stm32l4_rev stm32wba5x_revs[] = {
@@ -418,6 +446,30 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
 	  .otp_base              = 0x1FFF7000,
 	  .otp_size              = 1024,
 	},
+	{
+	  .id                    = DEVID_STM32C071XX,
+	  .revs                  = stm32c071xx_revs,
+	  .num_revs              = ARRAY_SIZE(stm32c071xx_revs),
+	  .device_str            = "STM32C071xx",
+	  .max_flash_size_kb     = 128,
+	  .flags                 = F_NONE,
+	  .flash_regs_base       = 0x40022000,
+	  .fsize_addr            = 0x1FFF75A0,
+	  .otp_base              = 0x1FFF7000,
+	  .otp_size              = 1024,
+	},
+	{
+	  .id                    = DEVID_STM32U53_U54XX,
+	  .revs                  = stm32u53_u54xx_revs,
+	  .num_revs              = ARRAY_SIZE(stm32u53_u54xx_revs),
+	  .device_str            = "STM32U535/U545",
+	  .max_flash_size_kb     = 512,
+	  .flags                 = F_HAS_DUAL_BANK | F_QUAD_WORD_PROG | F_HAS_TZ | F_HAS_L5_FLASH_REGS,
+	  .flash_regs_base       = 0x40022000,
+	  .fsize_addr            = 0x0BFA07A0,
+	  .otp_base              = 0x0BFA0000,
+	  .otp_size              = 512,
+	},
 	{
 	  .id                    = DEVID_STM32G05_G06XX,
 	  .revs                  = stm32g05_g06xx_revs,
@@ -574,6 +626,42 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
 	  .otp_base              = 0x1FFF7000,
 	  .otp_size              = 1024,
 	},
+	{
+	  .id                    = DEVID_STM32U031XX,
+	  .revs                  = stm32u0xx_revs,
+	  .num_revs              = ARRAY_SIZE(stm32u0xx_revs),
+	  .device_str            = "STM32U031xx",
+	  .max_flash_size_kb     = 64,
+	  .flags                 = F_NONE,
+	  .flash_regs_base       = 0x40022000,
+	  .fsize_addr            = 0x1FFF3EA0,
+	  .otp_base              = 0x1FFF6800,
+	  .otp_size              = 1024,
+	},
+	{
+	  .id                    = DEVID_STM32U073_U083XX,
+	  .revs                  = stm32u0xx_revs,
+	  .num_revs              = ARRAY_SIZE(stm32u0xx_revs),
+	  .device_str            = "STM32U073/U083xx",
+	  .max_flash_size_kb     = 256,
+	  .flags                 = F_NONE,
+	  .flash_regs_base       = 0x40022000,
+	  .fsize_addr            = 0x1FFF6EA0,
+	  .otp_base              = 0x1FFF6800,
+	  .otp_size              = 1024,
+	},
+	{
+	  .id                    = DEVID_STM32U59_U5AXX,
+	  .revs                  = stm32u59_u5axx_revs,
+	  .num_revs              = ARRAY_SIZE(stm32u59_u5axx_revs),
+	  .device_str            = "STM32U59/U5Axx",
+	  .max_flash_size_kb     = 4096,
+	  .flags                 = F_HAS_DUAL_BANK | F_QUAD_WORD_PROG | F_HAS_TZ | F_HAS_L5_FLASH_REGS,
+	  .flash_regs_base       = 0x40022000,
+	  .fsize_addr            = 0x0BFA07A0,
+	  .otp_base              = 0x0BFA0000,
+	  .otp_size              = 512,
+	},
 	{
 	  .id                    = DEVID_STM32U57_U58XX,
 	  .revs                  = stm32u57_u58xx_revs,
@@ -679,7 +767,8 @@ struct range {
 };
 
 static void bitmap_to_ranges(unsigned long *bitmap, unsigned int nbits,
-		struct range *ranges, unsigned int *ranges_count) {
+		struct range *ranges, unsigned int *ranges_count)
+{
 	*ranges_count = 0;
 	bool last_bit = 0, cur_bit;
 	for (unsigned int i = 0; i < nbits; i++) {
@@ -1916,8 +2005,11 @@ static int stm32l4_probe(struct flash_bank *bank)
 	case DEVID_STM32L43_L44XX:
 	case DEVID_STM32C01XX:
 	case DEVID_STM32C03XX:
+	case DEVID_STM32C071XX:
 	case DEVID_STM32G05_G06XX:
 	case DEVID_STM32G07_G08XX:
+	case DEVID_STM32U031XX:
+	case DEVID_STM32U073_U083XX:
 	case DEVID_STM32L45_L46XX:
 	case DEVID_STM32L41_L42XX:
 	case DEVID_STM32G03_G04XX:
@@ -2000,10 +2092,22 @@ static int stm32l4_probe(struct flash_bank *bank)
 			stm32l4_info->bank1_sectors = num_pages / 2;
 		}
 		break;
+	case DEVID_STM32U53_U54XX:
 	case DEVID_STM32U57_U58XX:
-		/* if flash size is max (2M) the device is always dual bank
+	case DEVID_STM32U59_U5AXX:
-		 * otherwise check DUALBANK
+		/* according to RM0456 Rev 4, Chapter 7.3.1 and 7.9.13
+		 * U53x/U54x have 512K max flash size:
+		 *   512K variants are always in DUAL BANK mode
+		 *   256K and 128K variants can be in DUAL BANK mode if FLASH_OPTR:DUALBANK is set
+		 * U57x/U58x have 2M max flash size:
+		 *   2M variants are always in DUAL BANK mode
+		 *   1M variants can be in DUAL BANK mode if FLASH_OPTR:DUALBANK is set
+		 * U59x/U5Ax have 4M max flash size:
+		 *   4M variants are always in DUAL BANK mode
+		 *   2M variants can be in DUAL BANK mode if FLASH_OPTR:DUALBANK is set
+		 * Note: flash banks are always contiguous
 		 */
+
 		page_size_kb = 8;
 		num_pages = flash_size_kb / page_size_kb;
 		stm32l4_info->bank1_sectors = num_pages;
@@ -2572,7 +2676,7 @@ static const struct command_registration stm32l4_exec_command_handlers[] = {
 		.name = "option_write",
 		.handler = stm32l4_handle_option_write_command,
 		.mode = COMMAND_EXEC,
-		.usage = "bank_id reg_offset value mask",
+		.usage = "bank_id reg_offset value [mask]",
 		.help = "Write device option bit fields with provided value.",
 	},
 	{

src/flash/nor/stm32l4x.h

@@ -89,7 +89,9 @@
 #define DEVID_STM32L43_L44XX	0x435
 #define DEVID_STM32C01XX		0x443
 #define DEVID_STM32C03XX		0x453
+#define DEVID_STM32U53_U54XX	0x455
 #define DEVID_STM32G05_G06XX	0x456
+#define DEVID_STM32U031XX		0x459
 #define DEVID_STM32G07_G08XX	0x460
 #define DEVID_STM32L49_L4AXX	0x461
 #define DEVID_STM32L45_L46XX	0x462
@@ -102,8 +104,11 @@
 #define DEVID_STM32L4P_L4QXX	0x471
 #define DEVID_STM32L55_L56XX	0x472
 #define DEVID_STM32G49_G4AXX	0x479
+#define DEVID_STM32U59_U5AXX	0x481
 #define DEVID_STM32U57_U58XX	0x482
+#define DEVID_STM32U073_U083XX	0x489
 #define DEVID_STM32WBA5X		0x492
+#define DEVID_STM32C071XX		0x493
 #define DEVID_STM32WB1XX		0x494
 #define DEVID_STM32WB5XX		0x495
 #define DEVID_STM32WB3XX		0x496

src/flash/nor/stmqspi.c

@@ -1807,7 +1807,7 @@ err:
 
 /* Read SFDP parameter block */
 static int read_sfdp_block(struct flash_bank *bank, uint32_t addr,
-	uint32_t words, uint32_t *buffer)
+	unsigned int words, uint32_t *buffer)
 {
 	struct target *target = bank->target;
 	struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
@@ -1848,7 +1848,7 @@ static int read_sfdp_block(struct flash_bank *bank, uint32_t addr,
 		}
 	}
 
-	LOG_DEBUG("%s: addr=0x%08" PRIx32 " words=0x%08" PRIx32 " dummy=%u",
+	LOG_DEBUG("%s: addr=0x%08" PRIx32 " words=0x%08x dummy=%u",
 		__func__, addr, words, *dummy);
 
 	/* Abort any previous operation */

src/flash/nor/str9xpec.c

@@ -68,7 +68,7 @@ static int str9xpec_erase_area(struct flash_bank *bank, unsigned int first,
 static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector);
 static int str9xpec_write_options(struct flash_bank *bank);
 
-static int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
+static int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, enum tap_state end_state)
 {
 	if (!tap)
 		return ERROR_TARGET_INVALID;

src/flash/nor/tcl.c

@@ -36,7 +36,7 @@ COMMAND_HELPER(flash_command_get_bank_probe_optional, unsigned int name_index,
 	if (*bank)
 		return ERROR_OK;
 
-	unsigned bank_num;
+	unsigned int bank_num;
 	COMMAND_PARSE_NUMBER(uint, name, bank_num);
 
 	if (do_probe) {
@@ -48,7 +48,7 @@ COMMAND_HELPER(flash_command_get_bank_probe_optional, unsigned int name_index,
 	}
 }
 
-COMMAND_HELPER(flash_command_get_bank, unsigned name_index,
+COMMAND_HELPER(flash_command_get_bank, unsigned int name_index,
 	struct flash_bank **bank)
 {
 	return CALL_COMMAND_HANDLER(flash_command_get_bank_probe_optional,
@@ -518,7 +518,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
 	uint64_t pattern;
 	uint32_t count;
 	struct target *target = get_current_target(CMD_CTX);
-	unsigned i;
+	unsigned int i;
 	uint32_t wordsize;
 	int retval;
 
@@ -1299,6 +1299,7 @@ COMMAND_HANDLER(handle_flash_bank_command)
 	if (retval != ERROR_OK) {
 		LOG_ERROR("'%s' driver rejected flash bank at " TARGET_ADDR_FMT
 				"; usage: %s", driver_name, c->base, driver->usage);
+		free(c->name);
 		free(c);
 		return retval;
 	}
@@ -1316,7 +1317,7 @@ COMMAND_HANDLER(handle_flash_banks_command)
 	if (CMD_ARGC != 0)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned n = 0;
+	unsigned int n = 0;
 	for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) {
 		command_print(CMD, "#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", "
 			"buswidth %u, chipwidth %u", p->bank_number,

src/flash/nor/tms470.c

@@ -16,7 +16,7 @@
  * ---------------------------------------------------------------------- */
 
 struct tms470_flash_bank {
-	unsigned ordinal;
+	unsigned int ordinal;
 
 	/* device identification register */
 	uint32_t device_ident_reg;
@@ -239,8 +239,8 @@ static int tms470_read_part_info(struct flash_bank *bank)
 			break;
 
 		default:
-			LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.",
+			LOG_WARNING("Could not identify part 0x%02" PRIx32 " as a member of the TMS470 family.",
-					(unsigned)part_number);
+					part_number);
 			return ERROR_FLASH_OPERATION_FAILED;
 	}
 
@@ -391,7 +391,7 @@ static int tms470_try_flash_keys(struct target *target, const uint32_t *key_set)
 	/* only perform the key match when 3VSTAT is clear */
 	target_read_u32(target, 0xFFE8BC0C, &fmmstat);
 	if (!(fmmstat & 0x08)) {
-		unsigned i;
+		unsigned int i;
 		uint32_t fmbptr, fmbac2, orig_fmregopt;
 
 		target_write_u32(target, 0xFFE8BC04, fmmstat & ~0x07);
@@ -455,7 +455,7 @@ static int tms470_unlock_flash(struct flash_bank *bank)
 {
 	struct target *target = bank->target;
 	const uint32_t *p_key_sets[5];
-	unsigned i, key_set_count;
+	unsigned int i, key_set_count;
 
 	if (keys_set) {
 		key_set_count = 5;

src/flash/nor/xcf.c

@@ -130,8 +130,8 @@ static struct xcf_status read_status(struct flash_bank *bank)
 	jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
 	jtag_execute_queue();
 
-	ret.isc_error   = ((irdata[0] >> 7) & 3) == 0b01;
+	ret.isc_error   = ((irdata[0] >> 7) & 3) == 1;
-	ret.prog_error  = ((irdata[0] >> 5) & 3) == 0b01;
+	ret.prog_error  = ((irdata[0] >> 5) & 3) == 1;
 	ret.prog_busy   = ((irdata[0] >> 4) & 1) == 0;
 	ret.isc_mode    = ((irdata[0] >> 3) & 1) == 1;
 
@@ -143,9 +143,9 @@ static int isc_enter(struct flash_bank *bank)
 
 	struct xcf_status status = read_status(bank);
 
-	if (true == status.isc_mode)
+	if (status.isc_mode)
 		return ERROR_OK;
-	else {
+
 	struct scan_field scan;
 
 	scan.check_mask = NULL;
@@ -165,7 +165,6 @@ static int isc_enter(struct flash_bank *bank)
 
 	return ERROR_OK;
 }
-}
 
 static int isc_leave(struct flash_bank *bank)
 {
@@ -174,7 +173,7 @@ static int isc_leave(struct flash_bank *bank)
 
 	if (!status.isc_mode)
 		return ERROR_OK;
-	else {
+
 	struct scan_field scan;
 
 	scan.check_mask = NULL;
@@ -195,7 +194,6 @@ static int isc_leave(struct flash_bank *bank)
 
 	return ERROR_OK;
 }
-}
 
 static int sector_state(uint8_t wrpt, int sector)
 {
@@ -528,7 +526,7 @@ static int isc_program_single_revision_btc(struct flash_bank *bank)
 {
 	uint8_t buf[4];
 	uint32_t btc = 0xFFFFFFFF;
-	btc &= ~0b1111;
+	btc &= ~0xF;
 	btc |= ((bank->num_sectors - 1) << 2);
 	btc &= ~(1 << 4);
 	h_u32_to_le(buf, btc);

src/flash/nor/xmc1xxx.c

@@ -84,7 +84,7 @@ static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first,
 	struct working_area *workarea;
 	struct reg_param reg_params[3];
 	struct armv7m_algorithm armv7m_algo;
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t erase_code[] = {
 #include "../../../contrib/loaders/flash/xmc1xxx/erase.inc"
@@ -159,7 +159,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank)
 	struct reg_param reg_params[3];
 	struct armv7m_algorithm armv7m_algo;
 	uint16_t val;
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t erase_check_code[] = {
 #include "../../../contrib/loaders/flash/xmc1xxx/erase_check.inc"
@@ -245,7 +245,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 	struct reg_param reg_params[4];
 	struct armv7m_algorithm armv7m_algo;
 	uint32_t block_count = DIV_ROUND_UP(byte_count, NVM_BLOCK_SIZE);
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t write_code[] = {
 #include "../../../contrib/loaders/flash/xmc1xxx/write.inc"

src/flash/startup.tcl

@@ -5,7 +5,7 @@
 #
 # program utility proc
 # usage: program filename
-# optional args: verify, reset, exit and address
+# optional args: preverify, verify, reset, exit and address
 #
 
 lappend _telnet_autocomplete_skip program_error
@@ -101,8 +101,8 @@ proc program {filename args} {
 	return
 }
 
-add_help_text program "write an image to flash, address is only required for binary images. verify, reset, exit are optional"
+add_help_text program "write an image to flash, address is only required for binary images. preverify, verify, reset, exit are optional"
-add_usage_text program "<filename> \[address\] \[pre-verify\] \[verify\] \[reset\] \[exit\]"
+add_usage_text program "<filename> \[address\] \[preverify\] \[verify\] \[reset\] \[exit\]"
 
 # stm32[f0x|f3x] uses the same flash driver as the stm32f1x
 proc stm32f0x args { eval stm32f1x $args }