Merge pull request #1136 from en-sc/en-sc/batch-logging
target/riscv: DMI logging improvements
This commit is contained in:
commit
27220e4c85
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@ -6,6 +6,7 @@
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#include "batch.h"
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#include "debug_defines.h"
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#include "debug_reg_printer.h"
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#include "riscv.h"
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#include "field_helpers.h"
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@ -131,15 +132,141 @@ static void add_idle_before_batch(const struct riscv_batch *batch, size_t start_
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}
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static int get_delay(const struct riscv_batch *batch, size_t scan_idx,
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const struct riscv_scan_delays *delays)
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const struct riscv_scan_delays *delays, bool resets_delays,
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size_t reset_delays_after)
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{
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assert(batch);
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assert(scan_idx < batch->used_scans);
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const bool delays_were_reset = resets_delays
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&& (scan_idx >= reset_delays_after);
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const enum riscv_scan_delay_class delay_class =
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batch->delay_classes[scan_idx];
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const unsigned int delay = riscv_scan_get_delay(delays, delay_class);
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assert(delay <= INT_MAX);
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return delay;
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return delays_were_reset ? 0 : delay;
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}
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static unsigned int decode_dmi(const struct riscv_batch *batch, char *text,
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uint32_t address, uint32_t data)
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{
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static const struct {
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uint32_t address;
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enum riscv_debug_reg_ordinal ordinal;
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} description[] = {
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{DM_DMCONTROL, DM_DMCONTROL_ORDINAL},
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{DM_DMSTATUS, DM_DMSTATUS_ORDINAL},
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{DM_ABSTRACTCS, DM_ABSTRACTCS_ORDINAL},
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{DM_COMMAND, DM_COMMAND_ORDINAL},
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{DM_SBCS, DM_SBCS_ORDINAL}
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};
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for (unsigned int i = 0; i < ARRAY_SIZE(description); i++) {
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if (riscv_get_dmi_address(batch->target, description[i].address)
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== address) {
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const riscv_debug_reg_ctx_t context = {
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.XLEN = { .value = 0, .is_set = false },
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.DXLEN = { .value = 0, .is_set = false },
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.abits = { .value = 0, .is_set = false },
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};
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return riscv_debug_reg_to_s(text, description[i].ordinal,
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context, data, RISCV_DEBUG_REG_HIDE_ALL_0);
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}
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}
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if (text)
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text[0] = '\0';
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return 0;
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}
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static void log_dmi_decoded(const struct riscv_batch *batch, bool write,
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uint32_t address, uint32_t data)
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{
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const size_t size = decode_dmi(batch, /* text */ NULL, address, data) + 1;
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char * const decoded = malloc(size);
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if (!decoded) {
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LOG_ERROR("Not enough memory to allocate %zu bytes.", size);
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return;
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}
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decode_dmi(batch, decoded, address, data);
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LOG_DEBUG("%s: %s", write ? "write" : "read", decoded);
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free(decoded);
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}
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static void log_batch(const struct riscv_batch *batch, size_t start_idx,
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const struct riscv_scan_delays *delays, bool resets_delays,
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size_t reset_delays_after)
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{
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if (debug_level < LOG_LVL_DEBUG)
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return;
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const unsigned int scan_bits = batch->fields->num_bits;
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assert(scan_bits == (unsigned int)riscv_get_dmi_scan_length(batch->target));
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const unsigned int abits = scan_bits - DTM_DMI_OP_LENGTH
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- DTM_DMI_DATA_LENGTH;
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/* Determine the "op" and "address" of the scan that preceded the first
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* executed scan.
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* FIXME: The code here assumes that there were no DMI operations between
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* the last execution of the batch and the current one.
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* Caching the info about the last executed DMI scan in "dm013_info_t"
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* would be a more robust solution.
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*/
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bool last_scan_was_read = false;
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uint32_t last_scan_address = -1 /* to silence maybe-uninitialized */;
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if (start_idx > 0) {
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const struct scan_field * const field = &batch->fields[start_idx - 1];
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assert(field->out_value);
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last_scan_was_read = buf_get_u32(field->out_value, DTM_DMI_OP_OFFSET,
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DTM_DMI_OP_LENGTH) == DTM_DMI_OP_READ;
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last_scan_address = buf_get_u32(field->out_value,
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DTM_DMI_ADDRESS_OFFSET, abits);
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}
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/* Decode and log every executed scan */
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for (size_t i = start_idx; i < batch->used_scans; ++i) {
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static const char * const op_string[] = {"-", "r", "w", "?"};
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const int delay = get_delay(batch, i, delays, resets_delays,
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reset_delays_after);
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const struct scan_field * const field = &batch->fields[i];
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assert(field->out_value);
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const unsigned int out_op = buf_get_u32(field->out_value,
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DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH);
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const uint32_t out_data = buf_get_u32(field->out_value,
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DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH);
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const uint32_t out_address = buf_get_u32(field->out_value,
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DTM_DMI_ADDRESS_OFFSET, abits);
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if (field->in_value) {
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static const char * const status_string[] = {
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"+", "?", "F", "b"
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};
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const unsigned int in_op = buf_get_u32(field->in_value,
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DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH);
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const uint32_t in_data = buf_get_u32(field->in_value,
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DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH);
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const uint32_t in_address = buf_get_u32(field->in_value,
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DTM_DMI_ADDRESS_OFFSET, abits);
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LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32
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" -> %s %08" PRIx32 " @%02" PRIx32 "; %di",
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field->num_bits, op_string[out_op], out_data, out_address,
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status_string[in_op], in_data, in_address, delay);
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if (last_scan_was_read && in_op == DTM_DMI_OP_SUCCESS)
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log_dmi_decoded(batch, /*write*/ false,
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last_scan_address, in_data);
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} else {
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LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32 " -> ?; %di",
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field->num_bits, op_string[out_op], out_data, out_address,
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delay);
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}
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if (out_op == DTM_DMI_OP_WRITE)
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log_dmi_decoded(batch, /*write*/ true, out_address,
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out_data);
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last_scan_was_read = out_op == DTM_DMI_OP_READ;
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last_scan_address = out_address;
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}
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}
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int riscv_batch_run_from(struct riscv_batch *batch, size_t start_idx,
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@ -147,6 +274,7 @@ int riscv_batch_run_from(struct riscv_batch *batch, size_t start_idx,
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size_t reset_delays_after)
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{
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assert(batch->used_scans);
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assert(start_idx < batch->used_scans);
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assert(batch->last_scan == RISCV_SCAN_TYPE_NOP);
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assert(!batch->was_run || riscv_batch_was_scan_busy(batch, start_idx));
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assert(start_idx == 0 || !riscv_batch_was_scan_busy(batch, start_idx - 1));
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@ -157,17 +285,16 @@ int riscv_batch_run_from(struct riscv_batch *batch, size_t start_idx,
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LOG_TARGET_DEBUG(batch->target, "Running batch of scans [%zu, %zu)",
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start_idx, batch->used_scans);
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unsigned int delay = 0 /* to silence maybe-uninitialized */;
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for (size_t i = start_idx; i < batch->used_scans; ++i) {
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if (bscan_tunnel_ir_width != 0)
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riscv_add_bscan_tunneled_scan(batch->target, batch->fields + i, batch->bscan_ctxt + i);
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else
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jtag_add_dr_scan(batch->target->tap, 1, batch->fields + i, TAP_IDLE);
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const bool delays_were_reset = resets_delays
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&& (i >= reset_delays_after);
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const int delay = get_delay(batch, i, delays);
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if (!delays_were_reset)
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delay = get_delay(batch, i, delays, resets_delays,
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reset_delays_after);
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if (delay > 0)
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jtag_add_runtest(delay, TAP_IDLE);
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}
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@ -188,13 +315,9 @@ int riscv_batch_run_from(struct riscv_batch *batch, size_t start_idx,
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}
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}
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for (size_t i = start_idx; i < batch->used_scans; ++i) {
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const int delay = get_delay(batch, i, delays);
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riscv_log_dmi_scan(batch->target, delay, batch->fields + i);
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}
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log_batch(batch, start_idx, delays, resets_delays, reset_delays_after);
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batch->was_run = true;
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batch->last_scan_delay = get_delay(batch, batch->used_scans - 1, delays);
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batch->last_scan_delay = delay;
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return ERROR_OK;
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}
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@ -228,10 +228,4 @@ size_t riscv_batch_available_scans(struct riscv_batch *batch);
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/* Return true iff the last scan in the batch returned DMI_OP_BUSY. */
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bool riscv_batch_was_batch_busy(const struct riscv_batch *batch);
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/* TODO: The function is defined in `riscv-013.c`. This is done to reduce the
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* diff of the commit. The intention is to move the function definition to
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* a separate module (e.g. `riscv013-jtag-dtm.c/h`) in another commit. */
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void riscv_log_dmi_scan(const struct target *target, int idle,
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const struct scan_field *field);
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#endif /* OPENOCD_TARGET_RISCV_BATCH_H */
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@ -349,84 +349,6 @@ static uint32_t set_dmcontrol_hartsel(uint32_t initial, int hart_index)
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return initial;
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}
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static unsigned int decode_dmi(const struct target *target, char *text, uint32_t address, uint32_t data)
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{
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static const struct {
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uint32_t address;
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enum riscv_debug_reg_ordinal ordinal;
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} description[] = {
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{DM_DMCONTROL, DM_DMCONTROL_ORDINAL},
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{DM_DMSTATUS, DM_DMSTATUS_ORDINAL},
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{DM_ABSTRACTCS, DM_ABSTRACTCS_ORDINAL},
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{DM_COMMAND, DM_COMMAND_ORDINAL},
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{DM_SBCS, DM_SBCS_ORDINAL}
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};
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for (unsigned i = 0; i < ARRAY_SIZE(description); i++) {
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if (riscv_get_dmi_address(target, description[i].address) == address) {
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const riscv_debug_reg_ctx_t context = {
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.XLEN = { .value = 0, .is_set = false },
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.DXLEN = { .value = 0, .is_set = false },
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.abits = { .value = 0, .is_set = false },
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};
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return riscv_debug_reg_to_s(text, description[i].ordinal,
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context, data, RISCV_DEBUG_REG_HIDE_ALL_0);
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}
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}
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if (text)
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text[0] = '\0';
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return 0;
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}
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/* TODO: Move this function to "batch.c" and make it static. */
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void riscv_log_dmi_scan(const struct target *target, int idle,
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const struct scan_field *field)
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{
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static const char * const op_string[] = {"-", "r", "w", "?"};
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static const char * const status_string[] = {"+", "?", "F", "b"};
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if (debug_level < LOG_LVL_DEBUG)
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return;
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assert(field->out_value);
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const uint64_t out = buf_get_u64(field->out_value, 0, field->num_bits);
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const unsigned int out_op = get_field(out, DTM_DMI_OP);
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const uint32_t out_data = get_field(out, DTM_DMI_DATA);
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const uint32_t out_address = out >> DTM_DMI_ADDRESS_OFFSET;
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if (field->in_value) {
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const uint64_t in = buf_get_u64(field->in_value, 0, field->num_bits);
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const unsigned int in_op = get_field(in, DTM_DMI_OP);
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const uint32_t in_data = get_field(in, DTM_DMI_DATA);
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const uint32_t in_address = in >> DTM_DMI_ADDRESS_OFFSET;
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LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32 " -> %s %08" PRIx32 " @%02" PRIx32 "; %di",
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field->num_bits, op_string[out_op], out_data, out_address,
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status_string[in_op], in_data, in_address, idle);
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if (in_op == DTM_DMI_OP_SUCCESS) {
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char in_decoded[decode_dmi(target, NULL, in_address, in_data) + 1];
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decode_dmi(target, in_decoded, in_address, in_data);
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/* FIXME: The current code assumes that the hardware
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* provides the read address in the dmi.address field
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* when returning the dmi.data. That is however not
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* required by the spec, and therefore not guaranteed.
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* See https://github.com/riscv-collab/riscv-openocd/issues/1043
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*/
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LOG_DEBUG("read: %s", in_decoded);
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}
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} else {
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LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32 " -> ?; %di",
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field->num_bits, op_string[out_op], out_data, out_address,
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idle);
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}
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if (out_op == DTM_DMI_OP_WRITE) {
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char out_decoded[decode_dmi(target, NULL, out_address, out_data) + 1];
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decode_dmi(target, out_decoded, out_address, out_data);
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LOG_DEBUG("write: %s", out_decoded);
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}
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}
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/*** Utility functions. ***/
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static void select_dmi(struct target *target)
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