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OpenOCD: fix code alignment 

Fix checkpatch errors:

	ERROR:TABSTOP: Statements should start on a tabstop

Change-Id: Ia771e7b7fa2cc4ef0be7f52b670525175555c8e4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8493
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
This commit is contained in:
Antonio Borneo 2024-09-16 11:31:37 +02:00
parent 537793bb24
commit 4214fca447
5 changed files with 14 additions and 14 deletions
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2
src/flash/nor/ocl.c
View File

@ -160,7 +160,7 @@ static int ocl_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer);
if (retval != ERROR_OK) {
free(dcc_buffer);
return retval;
return retval;
}
/* wait for response, fixed timeout of 1 s */

16
src/jtag/drivers/buspirate.c
View File

@ -1442,7 +1442,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
data);
switch (ack) {
case SWD_ACK_OK:
case SWD_ACK_OK:
if (parity != parity_u32(data)) {
LOG_DEBUG("Read data parity mismatch %x %x", parity, parity_u32(data));
queued_retval = ERROR_FAIL;
@ -1453,15 +1453,15 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
if (cmd & SWD_CMD_APNDP)
buspirate_swd_idle_clocks(ap_delay_clk);
return;
case SWD_ACK_WAIT:
case SWD_ACK_WAIT:
LOG_DEBUG("SWD_ACK_WAIT");
buspirate_swd_clear_sticky_errors();
return;
case SWD_ACK_FAULT:
case SWD_ACK_FAULT:
LOG_DEBUG("SWD_ACK_FAULT");
queued_retval = ack;
return;
default:
default:
LOG_DEBUG("No valid acknowledge: ack=%d", ack);
queued_retval = ack;
return;
@ -1500,19 +1500,19 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del
value);
switch (ack) {
case SWD_ACK_OK:
case SWD_ACK_OK:
if (cmd & SWD_CMD_APNDP)
buspirate_swd_idle_clocks(ap_delay_clk);
return;
case SWD_ACK_WAIT:
case SWD_ACK_WAIT:
LOG_DEBUG("SWD_ACK_WAIT");
buspirate_swd_clear_sticky_errors();
return;
case SWD_ACK_FAULT:
case SWD_ACK_FAULT:
LOG_DEBUG("SWD_ACK_FAULT");
queued_retval = ack;
return;
default:
default:
LOG_DEBUG("No valid acknowledge: ack=%d", ack);
queued_retval = ack;
return;

2
src/jtag/hla/hla_interface.c
View File

@ -348,7 +348,7 @@ static const struct command_registration hl_interface_subcommand_handlers[] = {
.help = "select which ST-Link backend to use",
.usage = "usb | tcp [port]",
},
{
{
.name = "command",
.handler = &interface_handle_hla_command,
.mode = COMMAND_EXEC,

6
src/target/mips32_pracc.c
View File

@ -212,7 +212,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
store_pending--;
} else { /* read/fetch access */
if (!final_check) { /* executing function code */
if (!final_check) { /* executing function code */
/* check address */
if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) {
LOG_DEBUG("reading at unexpected address %" PRIx32 ", expected %x",
@ -243,7 +243,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
if (code_count == ctx->code_count) /* last instruction, start final check */
final_check = 1;
} else { /* final check after function code shifted out */
} else { /* final check after function code shifted out */
/* check address */
if (ejtag_info->pa_addr == MIPS32_PRACC_TEXT) {
if (!pass) { /* first pass through pracc text */
@ -275,7 +275,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
}
instr = MIPS32_NOP; /* shift out NOPs instructions */
code_count++;
}
}
/* Send instruction out */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);

2
src/target/openrisc/or1k_du_adv.c
View File

@ -362,7 +362,7 @@ static int adbg_ctrl_read(struct or1k_jtag *jtag_info, uint32_t regidx,
default:
LOG_ERROR("Illegal debug chain selected (%i) while doing control read",
jtag_info->or1k_jtag_module_selected);
return ERROR_FAIL;
return ERROR_FAIL;
}
/* Zero MSB = op for module, not top-level debug unit */