diff --git a/src/flash/nor/ocl.c b/src/flash/nor/ocl.c
index e00c365ed..61af908f5 100644
--- a/src/flash/nor/ocl.c
+++ b/src/flash/nor/ocl.c
@@ -160,7 +160,7 @@ static int ocl_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 		retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer);
 		if (retval != ERROR_OK) {
 			free(dcc_buffer);
-		  return retval;
+			return retval;
 		}
 
 		/* wait for response, fixed timeout of 1 s */
diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c
index b01a79644..6f8df5ada 100644
--- a/src/jtag/drivers/buspirate.c
+++ b/src/jtag/drivers/buspirate.c
@@ -1442,7 +1442,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
 			data);
 
 	switch (ack) {
-	 case SWD_ACK_OK:
+	case SWD_ACK_OK:
 		if (parity != parity_u32(data)) {
 			LOG_DEBUG("Read data parity mismatch %x %x", parity, parity_u32(data));
 			queued_retval = ERROR_FAIL;
@@ -1453,15 +1453,15 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
 		if (cmd & SWD_CMD_APNDP)
 			buspirate_swd_idle_clocks(ap_delay_clk);
 		return;
-	 case SWD_ACK_WAIT:
+	case SWD_ACK_WAIT:
 		LOG_DEBUG("SWD_ACK_WAIT");
 		buspirate_swd_clear_sticky_errors();
 		return;
-	 case SWD_ACK_FAULT:
+	case SWD_ACK_FAULT:
 		LOG_DEBUG("SWD_ACK_FAULT");
 		queued_retval = ack;
 		return;
-	 default:
+	default:
 		LOG_DEBUG("No valid acknowledge: ack=%d", ack);
 		queued_retval = ack;
 		return;
@@ -1500,19 +1500,19 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del
 			value);
 
 	switch (ack) {
-	 case SWD_ACK_OK:
+	case SWD_ACK_OK:
 		if (cmd & SWD_CMD_APNDP)
 			buspirate_swd_idle_clocks(ap_delay_clk);
 		return;
-	 case SWD_ACK_WAIT:
+	case SWD_ACK_WAIT:
 		LOG_DEBUG("SWD_ACK_WAIT");
 		buspirate_swd_clear_sticky_errors();
 		return;
-	 case SWD_ACK_FAULT:
+	case SWD_ACK_FAULT:
 		LOG_DEBUG("SWD_ACK_FAULT");
 		queued_retval = ack;
 		return;
-	 default:
+	default:
 		LOG_DEBUG("No valid acknowledge: ack=%d", ack);
 		queued_retval = ack;
 		return;
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index c73f6c8d3..f284278dd 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -348,7 +348,7 @@ static const struct command_registration hl_interface_subcommand_handlers[] = {
 	 .help = "select which ST-Link backend to use",
 	 .usage = "usb | tcp [port]",
 	},
-	 {
+	{
 	 .name = "command",
 	 .handler = &interface_handle_hla_command,
 	 .mode = COMMAND_EXEC,
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 2d0bd641b..587e20d2b 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -212,7 +212,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
 			store_pending--;
 
 		} else {					/* read/fetch access */
-			 if (!final_check) {			/* executing function code */
+			if (!final_check) {			/* executing function code */
 				/* check address */
 				if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) {
 					LOG_DEBUG("reading at unexpected address %" PRIx32 ", expected %x",
@@ -243,7 +243,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
 				if (code_count == ctx->code_count)	/* last instruction, start final check */
 					final_check = 1;
 
-			 } else {	/* final check after function code shifted out */
+			} else {	/* final check after function code shifted out */
 					/* check address */
 				if (ejtag_info->pa_addr == MIPS32_PRACC_TEXT) {
 					if (!pass) {	/* first pass through pracc text */
@@ -275,7 +275,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
 					}
 				instr = MIPS32_NOP;	/* shift out NOPs instructions */
 				code_count++;
-			 }
+			}
 
 			/* Send instruction out */
 			mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c
index e4003a213..f401ea9fb 100644
--- a/src/target/openrisc/or1k_du_adv.c
+++ b/src/target/openrisc/or1k_du_adv.c
@@ -362,7 +362,7 @@ static int adbg_ctrl_read(struct or1k_jtag *jtag_info, uint32_t regidx,
 	default:
 		LOG_ERROR("Illegal debug chain selected (%i) while doing control read",
 			  jtag_info->or1k_jtag_module_selected);
-		 return ERROR_FAIL;
+		return ERROR_FAIL;
 	}
 
 	/* Zero MSB = op for module, not top-level debug unit */