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tcl: Replace 'gdb_' prefix with 'gdb' command group 

Change-Id: I0490b4c112c1a922bf77a4b37df2a630a8f6cea1
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8337
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This commit is contained in:
Marc Schink 2024-06-14 16:28:38 +02:00 committed by Antonio Borneo
parent 44cfdef0a4
commit b764fc2a4d
13 changed files with 14 additions and 14 deletions
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2
tcl/board/actux3.cfg
View File

@ -50,7 +50,7 @@ reset init
# setup to debug u-boot in flash
proc uboot_debug {} {
gdb_breakpoint_override hard
gdb breakpoint_override hard
xscale vector_catch 0xFF
xscale vector_table low 1 0xe59ff018

2
tcl/board/mini2440.cfg
View File

@ -128,7 +128,7 @@ reset_config trst_and_srst
# GDB Setup
#-------------------------------------------------------------------------
gdb_breakpoint_override hard
gdb breakpoint_override hard
#------------------------------------------------
# ARM SPECIFIC

2
tcl/board/mini6410.cfg
View File

@ -95,7 +95,7 @@ adapter srst delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
gdb_breakpoint_override hard
gdb breakpoint_override hard
targets
nand device $_CHIPNAME.flash s3c6400 $_CHIPNAME.cpu

2
tcl/board/or1k_generic.cfg
View File

@ -22,7 +22,7 @@ poll_period 1
adapter speed 3000
# Enable the target description feature
gdb_target_description enable
gdb target_description enable
# Add a new register in the cpu register list. This register will be
# included in the generated target descriptor file.

2
tcl/interface/vdebug.cfg
View File

@ -22,7 +22,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT
# example config listen on all interfaces, disable tcl/telnet server
bindto 0.0.0.0
#gdb_port 3333
#gdb port 3333
#telnet_port disabled
tcl_port disabled

2
tcl/target/esi32xx.cfg
View File

@ -35,4 +35,4 @@ reset_config none
# The default linker scripts provided by the eSi-RISC toolchain do not
# specify attributes on memory regions, which results in incorrect
# application of software breakpoints by GDB.
gdb_breakpoint_override hard
gdb breakpoint_override hard

2
tcl/target/esp_common.cfg
View File

@ -181,7 +181,7 @@ proc configure_esp_xtensa_default_settings { } {
$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
}
gdb_breakpoint_override hard
gdb breakpoint_override hard
if { [info exists _FLASH_VOLTAGE] } {
$_TARGETNAME_0 $_CHIPNAME flashbootstrap $_FLASH_VOLTAGE

2
tcl/target/omap4430.cfg
View File

@ -128,4 +128,4 @@ $_CHIPNAME.m30 configure -event reset-assert { }
$_CHIPNAME.m31 configure -event reset-assert { }
# Soft breakpoints don't currently work due to broken cache handling
gdb_breakpoint_override hard
gdb breakpoint_override hard

2
tcl/target/omap4460.cfg
View File

@ -128,4 +128,4 @@ $_CHIPNAME.m30 configure -event reset-assert { }
$_CHIPNAME.m31 configure -event reset-assert { }
# Soft breakpoints don't currently work due to broken cache handling
gdb_breakpoint_override hard
gdb breakpoint_override hard

2
tcl/target/omapl138.cfg
View File

@ -64,5 +64,5 @@ arm7_9 dcc_downloads enable
etm config $_TARGETNAME 16 normal full etb
etb config $_TARGETNAME $_CHIPNAME.etb
gdb_breakpoint_override hard
gdb breakpoint_override hard
arm7_9 dbgrq enable

2
tcl/target/rp2040.cfg
View File

@ -96,7 +96,7 @@ if { $_USE_CORE == 1 } {
set _FLASH_TARGET $_TARGETNAME_0
}
# Backup the work area. The flash probe runs an algorithm on the target CPU.
# The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
# The flash is probed during gdb connect if gdb memory_map is enabled (by default).
$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME rp2040_flash 0x10000000 0 0 0 $_FLASH_TARGET

4
tcl/target/u8500.cfg
View File

@ -144,7 +144,7 @@ proc enable_apetap {} {
tcl_port 5555
telnet_port 4444
gdb_port 3333
gdb port 3333
if { [info exists CHIPNAME] } {
global _CHIPNAME
@ -319,7 +319,7 @@ global _MAXSPEED
adapter speed $_MAXSPEED
gdb_breakpoint_override hard
gdb breakpoint_override hard
set mem inaccessible-by-default-off
jtag_ntrst_delay 100

2
tcl/target/xtensa.cfg
View File

@ -67,4 +67,4 @@ if { $_XTENSA_NUM_CORES == 1 } {
$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
}
gdb_report_register_access_error enable
gdb report_register_access_error enable