target: riscv: convert 'unsigned' to 'unsigned int'
Conversion done with checkpatch --fix-inplace -types UNSPECIFIED_INT Change-Id: I62fad88dd33716c24154d44c5a23ae2c0f7c4a4c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Antonio Borneo
parent
a4020f1a02
commit
89fb9211ec
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@ -194,26 +194,26 @@ static uint32_t fld(unsigned int dest, unsigned int base, uint16_t offset)
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return imm_i(offset) | inst_rs1(base) | inst_rd(dest) | MATCH_FLD;
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}
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static uint32_t fmv_x_w(unsigned dest, unsigned src) __attribute__ ((unused));
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static uint32_t fmv_x_w(unsigned dest, unsigned src)
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static uint32_t fmv_x_w(unsigned int dest, unsigned int src) __attribute__ ((unused));
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static uint32_t fmv_x_w(unsigned int dest, unsigned int src)
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{
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return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_X_W;
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}
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static uint32_t fmv_x_d(unsigned dest, unsigned src) __attribute__ ((unused));
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static uint32_t fmv_x_d(unsigned dest, unsigned src)
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static uint32_t fmv_x_d(unsigned int dest, unsigned int src) __attribute__ ((unused));
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static uint32_t fmv_x_d(unsigned int dest, unsigned int src)
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{
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return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_X_D;
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}
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static uint32_t fmv_w_x(unsigned dest, unsigned src) __attribute__ ((unused));
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static uint32_t fmv_w_x(unsigned dest, unsigned src)
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static uint32_t fmv_w_x(unsigned int dest, unsigned int src) __attribute__ ((unused));
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static uint32_t fmv_w_x(unsigned int dest, unsigned int src)
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{
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return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_W_X;
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}
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static uint32_t fmv_d_x(unsigned dest, unsigned src) __attribute__ ((unused));
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static uint32_t fmv_d_x(unsigned dest, unsigned src)
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static uint32_t fmv_d_x(unsigned int dest, unsigned int src) __attribute__ ((unused));
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static uint32_t fmv_d_x(unsigned int dest, unsigned int src)
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{
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return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_D_X;
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}
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@ -30,7 +30,7 @@ int riscv_program_init(struct riscv_program *p, struct target *target)
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int riscv_program_write(struct riscv_program *program)
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{
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for (unsigned i = 0; i < program->instruction_count; ++i) {
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for (unsigned int i = 0; i < program->instruction_count; ++i) {
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LOG_TARGET_DEBUG(program->target, "progbuf[%02x] = DASM(0x%08x)",
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i, program->progbuf[i]);
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if (riscv_write_progbuf(program->target, i, program->progbuf[i]) != ERROR_OK)
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@ -443,7 +443,7 @@ static uint64_t dbus_read(struct target *target, uint16_t address)
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* While somewhat nonintuitive, this is an efficient way to get the data.
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*/
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unsigned i = 0;
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unsigned int i = 0;
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do {
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status = dbus_scan(target, &address_in, &value, DBUS_OP_READ, address, 0);
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if (status == DBUS_STATUS_BUSY)
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@ -464,7 +464,7 @@ static uint64_t dbus_read(struct target *target, uint16_t address)
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static void dbus_write(struct target *target, uint16_t address, uint64_t value)
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{
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dbus_status_t status = DBUS_STATUS_BUSY;
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unsigned i = 0;
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unsigned int i = 0;
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while (status == DBUS_STATUS_BUSY && i++ < 256) {
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status = dbus_scan(target, NULL, NULL, DBUS_OP_WRITE, address, value);
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if (status == DBUS_STATUS_BUSY)
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@ -625,13 +625,13 @@ static void scans_add_read(scans_t *scans, slot_t slot, bool set_interrupt)
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}
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static uint32_t scans_get_u32(scans_t *scans, unsigned int index,
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unsigned first, unsigned num)
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unsigned int first, unsigned int num)
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{
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return buf_get_u32(scans->in + scans->scan_size * index, first, num);
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}
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static uint64_t scans_get_u64(scans_t *scans, unsigned int index,
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unsigned first, unsigned num)
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unsigned int first, unsigned int num)
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{
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return buf_get_u64(scans->in + scans->scan_size * index, first, num);
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}
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@ -663,7 +663,7 @@ static int read_bits(struct target *target, bits_t *result)
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riscv011_info_t *info = get_info(target);
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do {
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unsigned i = 0;
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unsigned int i = 0;
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do {
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status = dbus_scan(target, &address_in, &value, DBUS_OP_READ, 0, 0);
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if (status == DBUS_STATUS_BUSY) {
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@ -1257,7 +1257,7 @@ static int register_write(struct target *target, unsigned int number,
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int result = update_mstatus_actual(target);
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if (result != ERROR_OK)
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return result;
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unsigned i = 0;
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unsigned int i = 0;
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if ((info->mstatus_actual & MSTATUS_FS) == 0) {
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info->mstatus_actual = set_field(info->mstatus_actual, MSTATUS_FS, 1);
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cache_set_load(target, i++, S0, SLOT1);
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@ -1318,7 +1318,7 @@ int riscv011_get_register(struct target *target, riscv_reg_t *value,
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int result = update_mstatus_actual(target);
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if (result != ERROR_OK)
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return result;
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unsigned i = 0;
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unsigned int i = 0;
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if ((info->mstatus_actual & MSTATUS_FS) == 0) {
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info->mstatus_actual = set_field(info->mstatus_actual, MSTATUS_FS, 1);
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cache_set_load(target, i++, S0, SLOT1);
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@ -1522,7 +1522,7 @@ static int examine(struct target *target)
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/* 0x00000000 0x00000000:00000003 0x00000000:00000003:ffffffff:ffffffff */
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cache_set32(target, 4, sw(S1, ZERO, DEBUG_RAM_START + 4));
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cache_set_jump(target, 5);
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for (unsigned i = 6; i < info->dramsize; i++)
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for (unsigned int i = 6; i < info->dramsize; i++)
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cache_set32(target, i, i * 0x01020304);
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cache_write(target, 0, false);
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@ -1553,7 +1553,7 @@ static int examine(struct target *target)
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LOG_DEBUG("Discovered XLEN is %d", riscv_xlen(target));
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if (read_remote_csr(target, &r->misa, CSR_MISA) != ERROR_OK) {
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const unsigned old_csr_misa = 0xf10;
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const unsigned int old_csr_misa = 0xf10;
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LOG_WARNING("Failed to read misa at 0x%x; trying 0x%x.", CSR_MISA,
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old_csr_misa);
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if (read_remote_csr(target, &r->misa, old_csr_misa) != ERROR_OK) {
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@ -1632,7 +1632,7 @@ static riscv_error_t handle_halt_routine(struct target *target)
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unsigned int dbus_busy = 0;
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unsigned int interrupt_set = 0;
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unsigned result = 0;
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unsigned int result = 0;
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uint64_t value = 0;
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reg_cache_set(target, 0, 0);
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/* The first scan result is the result from something old we don't care
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@ -2004,7 +2004,7 @@ static int read_memory(struct target *target, target_addr_t address,
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cache_write(target, CACHE_NO_READ, false);
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riscv011_info_t *info = get_info(target);
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const unsigned max_batch_size = 256;
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const unsigned int max_batch_size = 256;
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scans_t *scans = scans_new(target, max_batch_size);
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if (!scans)
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return ERROR_FAIL;
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@ -2162,7 +2162,7 @@ static int write_memory(struct target *target, target_addr_t address,
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if (setup_write_memory(target, size) != ERROR_OK)
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return ERROR_FAIL;
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const unsigned max_batch_size = 256;
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const unsigned int max_batch_size = 256;
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scans_t *scans = scans_new(target, max_batch_size);
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if (!scans)
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return ERROR_FAIL;
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@ -150,11 +150,11 @@ typedef struct {
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typedef struct {
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/* The indexed used to address this hart in its DM. */
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unsigned index;
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unsigned int index;
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/* Number of address bits in the dbus register. */
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unsigned abits;
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unsigned int abits;
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/* Number of abstract command data registers. */
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unsigned datacount;
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unsigned int datacount;
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/* Number of words in the Program Buffer. */
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unsigned int progbufsize;
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/* Hart contains an implicit ebreak at the end of the program buffer. */
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@ -514,7 +514,7 @@ static int increase_ac_busy_delay(struct target *target)
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RISCV_DELAY_ABSTRACT_COMMAND);
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}
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static uint32_t __attribute__((unused)) abstract_register_size(unsigned width)
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static uint32_t __attribute__((unused)) abstract_register_size(unsigned int width)
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{
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switch (width) {
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case 32:
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@ -738,10 +738,10 @@ static void abstract_data_write_fill_batch(struct riscv_batch *batch,
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}
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/* TODO: reuse "abstract_data_write_fill_batch()" here*/
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static int write_abstract_arg(struct target *target, unsigned index,
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riscv_reg_t value, unsigned size_bits)
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static int write_abstract_arg(struct target *target, unsigned int index,
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riscv_reg_t value, unsigned int size_bits)
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{
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unsigned offset = index * size_bits / 32;
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unsigned int offset = index * size_bits / 32;
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switch (size_bits) {
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default:
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LOG_TARGET_ERROR(target, "Unsupported size: %d bits", size_bits);
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@ -759,7 +759,7 @@ static int write_abstract_arg(struct target *target, unsigned index,
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* @par size in bits
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*/
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uint32_t riscv013_access_register_command(struct target *target, uint32_t number,
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unsigned size, uint32_t flags)
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unsigned int size, uint32_t flags)
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{
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uint32_t command = set_field(0, DM_COMMAND_CMDTYPE, 0);
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switch (size) {
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@ -907,7 +907,7 @@ cleanup:
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* Sets the AAMSIZE field of a memory access abstract command based on
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* the width (bits).
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*/
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static uint32_t abstract_memory_size(unsigned width)
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static uint32_t abstract_memory_size(unsigned int width)
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{
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switch (width) {
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case 8:
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@ -1089,7 +1089,7 @@ typedef struct {
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static int scratch_reserve(struct target *target,
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scratch_mem_t *scratch,
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struct riscv_program *program,
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unsigned size_bytes)
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unsigned int size_bytes)
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{
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riscv_addr_t alignment = 1;
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while (alignment < size_bytes)
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@ -1121,7 +1121,7 @@ static int scratch_reserve(struct target *target,
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return ERROR_FAIL;
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/* Allow for ebreak at the end of the program. */
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unsigned program_size = (program->instruction_count + 1) * 4;
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unsigned int program_size = (program->instruction_count + 1) * 4;
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scratch->hart_address = (info->progbuf_address + program_size + alignment - 1) &
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~(alignment - 1);
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if ((info->progbuf_writable == YNM_YES) &&
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@ -1237,7 +1237,7 @@ static unsigned int register_size(struct target *target, enum gdb_regno number)
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return riscv_xlen(target);
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}
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static bool has_sufficient_progbuf(struct target *target, unsigned size)
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static bool has_sufficient_progbuf(struct target *target, unsigned int size)
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{
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RISCV013_INFO(info);
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return info->progbufsize + info->impebreak >= size;
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@ -2085,7 +2085,7 @@ static int riscv013_authdata_write(struct target *target, uint32_t value, unsign
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}
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/* Try to find out the widest memory access size depending on the selected memory access methods. */
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static unsigned riscv013_data_bits(struct target *target)
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static unsigned int riscv013_data_bits(struct target *target)
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{
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RISCV013_INFO(info);
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RISCV_INFO(r);
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@ -3022,7 +3022,7 @@ static int read_memory_bus_word(struct target *target, target_addr_t address,
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static target_addr_t sb_read_address(struct target *target)
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{
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RISCV013_INFO(info);
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unsigned sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
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unsigned int sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
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target_addr_t address = 0;
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uint32_t v;
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if (sbasize > 32) {
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@ -3296,7 +3296,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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continue;
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}
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unsigned error = get_field(sbcs_read, DM_SBCS_SBERROR);
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unsigned int error = get_field(sbcs_read, DM_SBCS_SBERROR);
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if (error == DM_SBCS_SBERROR_NONE) {
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next_address = end_address;
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} else {
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@ -3535,7 +3535,7 @@ read_memory_abstract(struct target *target, target_addr_t address,
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memset(buffer, 0, count * size);
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/* Convert the size (bytes) to width (bits) */
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unsigned width = size << 3;
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unsigned int width = size << 3;
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/* Create the command (physical address, postincrement, read) */
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uint32_t command = access_memory_command(target, false, width, use_aampostincrement, false);
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@ -3632,7 +3632,7 @@ write_memory_abstract(struct target *target, target_addr_t address,
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size, address);
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/* Convert the size (bytes) to width (bits) */
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unsigned width = size << 3;
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unsigned int width = size << 3;
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/* Create the command (physical address, postincrement, write) */
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uint32_t command = access_memory_command(target, false, width, use_aampostincrement, true);
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@ -5047,13 +5047,13 @@ static int select_prepped_harts(struct target *target)
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}
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assert(dm->hart_count);
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unsigned hawindow_count = (dm->hart_count + 31) / 32;
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unsigned int hawindow_count = (dm->hart_count + 31) / 32;
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uint32_t *hawindow = calloc(hawindow_count, sizeof(uint32_t));
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if (!hawindow)
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return ERROR_FAIL;
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target_list_t *entry;
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unsigned total_selected = 0;
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unsigned int total_selected = 0;
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unsigned int selected_index = 0;
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list_for_each_entry(entry, &dm->target_list, list) {
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struct target *t = entry->target;
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@ -5085,7 +5085,7 @@ static int select_prepped_harts(struct target *target)
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return ERROR_FAIL;
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}
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for (unsigned i = 0; i < hawindow_count; i++) {
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for (unsigned int i = 0; i < hawindow_count; i++) {
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if (dm_write(target, DM_HAWINDOWSEL, i) != ERROR_OK) {
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free(hawindow);
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return ERROR_FAIL;
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@ -3298,7 +3298,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
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GDB_REGNO_PC,
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GDB_REGNO_MSTATUS, GDB_REGNO_MEPC, GDB_REGNO_MCAUSE,
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};
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for (unsigned i = 0; i < ARRAY_SIZE(regnums); i++) {
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for (unsigned int i = 0; i < ARRAY_SIZE(regnums); i++) {
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enum gdb_regno regno = regnums[i];
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riscv_reg_t reg_value;
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if (riscv_reg_get(target, ®_value, regno) != ERROR_OK)
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@ -3393,8 +3393,8 @@ static int riscv_checksum_memory(struct target *target,
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static const uint8_t *crc_code;
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unsigned xlen = riscv_xlen(target);
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unsigned crc_code_size;
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unsigned int xlen = riscv_xlen(target);
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unsigned int crc_code_size;
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if (xlen == 32) {
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crc_code = riscv32_crc_code;
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crc_code_size = sizeof(riscv32_crc_code);
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@ -3957,8 +3957,8 @@ static int parse_ranges(struct list_head *ranges, const char *tcl_arg, const cha
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/* For backward compatibility, allow multiple parameters within one TCL argument, separated by ',' */
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char *arg = strtok(args, ",");
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while (arg) {
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unsigned low = 0;
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unsigned high = 0;
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unsigned int low = 0;
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unsigned int high = 0;
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char *name = NULL;
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char *dash = strchr(arg, '-');
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@ -5578,7 +5578,7 @@ static int riscv_step_rtos_hart(struct target *target)
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bool riscv_supports_extension(const struct target *target, char letter)
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{
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RISCV_INFO(r);
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unsigned num;
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unsigned int num;
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if (letter >= 'a' && letter <= 'z')
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num = letter - 'a';
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else if (letter >= 'A' && letter <= 'Z')
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@ -5588,7 +5588,7 @@ bool riscv_supports_extension(const struct target *target, char letter)
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return r->misa & BIT(num);
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}
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unsigned riscv_xlen(const struct target *target)
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unsigned int riscv_xlen(const struct target *target)
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{
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RISCV_INFO(r);
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return r->xlen;
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@ -245,7 +245,7 @@ struct riscv_info {
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int (*read_memory)(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer, uint32_t increment);
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unsigned (*data_bits)(struct target *target);
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unsigned int (*data_bits)(struct target *target);
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COMMAND_HELPER((*print_info), struct target *target);
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@ -320,15 +320,15 @@ typedef struct {
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typedef struct {
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const char *name;
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int level;
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unsigned va_bits;
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unsigned int va_bits;
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/* log2(PTESIZE) */
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unsigned pte_shift;
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unsigned vpn_shift[PG_MAX_LEVEL];
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unsigned vpn_mask[PG_MAX_LEVEL];
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unsigned pte_ppn_shift[PG_MAX_LEVEL];
|
||||
unsigned pte_ppn_mask[PG_MAX_LEVEL];
|
||||
unsigned pa_ppn_shift[PG_MAX_LEVEL];
|
||||
unsigned pa_ppn_mask[PG_MAX_LEVEL];
|
||||
unsigned int pte_shift;
|
||||
unsigned int vpn_shift[PG_MAX_LEVEL];
|
||||
unsigned int vpn_mask[PG_MAX_LEVEL];
|
||||
unsigned int pte_ppn_shift[PG_MAX_LEVEL];
|
||||
unsigned int pte_ppn_mask[PG_MAX_LEVEL];
|
||||
unsigned int pa_ppn_shift[PG_MAX_LEVEL];
|
||||
unsigned int pa_ppn_mask[PG_MAX_LEVEL];
|
||||
} virt2phys_info_t;
|
||||
|
||||
/* Wall-clock timeout for a command/access. Settable via RISC-V Target commands.*/
|
||||
|
|
@ -381,7 +381,7 @@ int riscv_openocd_step(
|
|||
bool riscv_supports_extension(const struct target *target, char letter);
|
||||
|
||||
/* Returns XLEN for the given (or current) hart. */
|
||||
unsigned riscv_xlen(const struct target *target);
|
||||
unsigned int riscv_xlen(const struct target *target);
|
||||
|
||||
/* Returns VLENB for the given (or current) hart. */
|
||||
unsigned int riscv_vlenb(const struct target *target);
|
||||
|
|
|
|||
Loading…
Reference in New Issue