From 89fb9211eca674372b10a4f841b255c7c98ae1d1 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sat, 12 Oct 2024 17:01:36 +0200 Subject: [PATCH] target: riscv: convert 'unsigned' to 'unsigned int' Conversion done with checkpatch --fix-inplace -types UNSPECIFIED_INT Change-Id: I62fad88dd33716c24154d44c5a23ae2c0f7c4a4c Signed-off-by: Antonio Borneo --- src/target/riscv/opcodes.h | 16 +++++++-------- src/target/riscv/program.c | 2 +- src/target/riscv/riscv-011.c | 24 +++++++++++----------- src/target/riscv/riscv-013.c | 40 ++++++++++++++++++------------------ src/target/riscv/riscv.c | 14 ++++++------- src/target/riscv/riscv.h | 20 +++++++++--------- 6 files changed, 58 insertions(+), 58 deletions(-) diff --git a/src/target/riscv/opcodes.h b/src/target/riscv/opcodes.h index 99ae90f34..1164bd628 100644 --- a/src/target/riscv/opcodes.h +++ b/src/target/riscv/opcodes.h @@ -194,26 +194,26 @@ static uint32_t fld(unsigned int dest, unsigned int base, uint16_t offset) return imm_i(offset) | inst_rs1(base) | inst_rd(dest) | MATCH_FLD; } -static uint32_t fmv_x_w(unsigned dest, unsigned src) __attribute__ ((unused)); -static uint32_t fmv_x_w(unsigned dest, unsigned src) +static uint32_t fmv_x_w(unsigned int dest, unsigned int src) __attribute__ ((unused)); +static uint32_t fmv_x_w(unsigned int dest, unsigned int src) { return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_X_W; } -static uint32_t fmv_x_d(unsigned dest, unsigned src) __attribute__ ((unused)); -static uint32_t fmv_x_d(unsigned dest, unsigned src) +static uint32_t fmv_x_d(unsigned int dest, unsigned int src) __attribute__ ((unused)); +static uint32_t fmv_x_d(unsigned int dest, unsigned int src) { return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_X_D; } -static uint32_t fmv_w_x(unsigned dest, unsigned src) __attribute__ ((unused)); -static uint32_t fmv_w_x(unsigned dest, unsigned src) +static uint32_t fmv_w_x(unsigned int dest, unsigned int src) __attribute__ ((unused)); +static uint32_t fmv_w_x(unsigned int dest, unsigned int src) { return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_W_X; } -static uint32_t fmv_d_x(unsigned dest, unsigned src) __attribute__ ((unused)); -static uint32_t fmv_d_x(unsigned dest, unsigned src) +static uint32_t fmv_d_x(unsigned int dest, unsigned int src) __attribute__ ((unused)); +static uint32_t fmv_d_x(unsigned int dest, unsigned int src) { return inst_rs1(src) | inst_rd(dest) | MATCH_FMV_D_X; } diff --git a/src/target/riscv/program.c b/src/target/riscv/program.c index 85c3d1606..6246d0038 100644 --- a/src/target/riscv/program.c +++ b/src/target/riscv/program.c @@ -30,7 +30,7 @@ int riscv_program_init(struct riscv_program *p, struct target *target) int riscv_program_write(struct riscv_program *program) { - for (unsigned i = 0; i < program->instruction_count; ++i) { + for (unsigned int i = 0; i < program->instruction_count; ++i) { LOG_TARGET_DEBUG(program->target, "progbuf[%02x] = DASM(0x%08x)", i, program->progbuf[i]); if (riscv_write_progbuf(program->target, i, program->progbuf[i]) != ERROR_OK) diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index 1da718212..0e635b3a6 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -443,7 +443,7 @@ static uint64_t dbus_read(struct target *target, uint16_t address) * While somewhat nonintuitive, this is an efficient way to get the data. */ - unsigned i = 0; + unsigned int i = 0; do { status = dbus_scan(target, &address_in, &value, DBUS_OP_READ, address, 0); if (status == DBUS_STATUS_BUSY) @@ -464,7 +464,7 @@ static uint64_t dbus_read(struct target *target, uint16_t address) static void dbus_write(struct target *target, uint16_t address, uint64_t value) { dbus_status_t status = DBUS_STATUS_BUSY; - unsigned i = 0; + unsigned int i = 0; while (status == DBUS_STATUS_BUSY && i++ < 256) { status = dbus_scan(target, NULL, NULL, DBUS_OP_WRITE, address, value); if (status == DBUS_STATUS_BUSY) @@ -625,13 +625,13 @@ static void scans_add_read(scans_t *scans, slot_t slot, bool set_interrupt) } static uint32_t scans_get_u32(scans_t *scans, unsigned int index, - unsigned first, unsigned num) + unsigned int first, unsigned int num) { return buf_get_u32(scans->in + scans->scan_size * index, first, num); } static uint64_t scans_get_u64(scans_t *scans, unsigned int index, - unsigned first, unsigned num) + unsigned int first, unsigned int num) { return buf_get_u64(scans->in + scans->scan_size * index, first, num); } @@ -663,7 +663,7 @@ static int read_bits(struct target *target, bits_t *result) riscv011_info_t *info = get_info(target); do { - unsigned i = 0; + unsigned int i = 0; do { status = dbus_scan(target, &address_in, &value, DBUS_OP_READ, 0, 0); if (status == DBUS_STATUS_BUSY) { @@ -1257,7 +1257,7 @@ static int register_write(struct target *target, unsigned int number, int result = update_mstatus_actual(target); if (result != ERROR_OK) return result; - unsigned i = 0; + unsigned int i = 0; if ((info->mstatus_actual & MSTATUS_FS) == 0) { info->mstatus_actual = set_field(info->mstatus_actual, MSTATUS_FS, 1); cache_set_load(target, i++, S0, SLOT1); @@ -1318,7 +1318,7 @@ int riscv011_get_register(struct target *target, riscv_reg_t *value, int result = update_mstatus_actual(target); if (result != ERROR_OK) return result; - unsigned i = 0; + unsigned int i = 0; if ((info->mstatus_actual & MSTATUS_FS) == 0) { info->mstatus_actual = set_field(info->mstatus_actual, MSTATUS_FS, 1); cache_set_load(target, i++, S0, SLOT1); @@ -1522,7 +1522,7 @@ static int examine(struct target *target) /* 0x00000000 0x00000000:00000003 0x00000000:00000003:ffffffff:ffffffff */ cache_set32(target, 4, sw(S1, ZERO, DEBUG_RAM_START + 4)); cache_set_jump(target, 5); - for (unsigned i = 6; i < info->dramsize; i++) + for (unsigned int i = 6; i < info->dramsize; i++) cache_set32(target, i, i * 0x01020304); cache_write(target, 0, false); @@ -1553,7 +1553,7 @@ static int examine(struct target *target) LOG_DEBUG("Discovered XLEN is %d", riscv_xlen(target)); if (read_remote_csr(target, &r->misa, CSR_MISA) != ERROR_OK) { - const unsigned old_csr_misa = 0xf10; + const unsigned int old_csr_misa = 0xf10; LOG_WARNING("Failed to read misa at 0x%x; trying 0x%x.", CSR_MISA, old_csr_misa); if (read_remote_csr(target, &r->misa, old_csr_misa) != ERROR_OK) { @@ -1632,7 +1632,7 @@ static riscv_error_t handle_halt_routine(struct target *target) unsigned int dbus_busy = 0; unsigned int interrupt_set = 0; - unsigned result = 0; + unsigned int result = 0; uint64_t value = 0; reg_cache_set(target, 0, 0); /* The first scan result is the result from something old we don't care @@ -2004,7 +2004,7 @@ static int read_memory(struct target *target, target_addr_t address, cache_write(target, CACHE_NO_READ, false); riscv011_info_t *info = get_info(target); - const unsigned max_batch_size = 256; + const unsigned int max_batch_size = 256; scans_t *scans = scans_new(target, max_batch_size); if (!scans) return ERROR_FAIL; @@ -2162,7 +2162,7 @@ static int write_memory(struct target *target, target_addr_t address, if (setup_write_memory(target, size) != ERROR_OK) return ERROR_FAIL; - const unsigned max_batch_size = 256; + const unsigned int max_batch_size = 256; scans_t *scans = scans_new(target, max_batch_size); if (!scans) return ERROR_FAIL; diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index f3dda0287..0c1a65832 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -150,11 +150,11 @@ typedef struct { typedef struct { /* The indexed used to address this hart in its DM. */ - unsigned index; + unsigned int index; /* Number of address bits in the dbus register. */ - unsigned abits; + unsigned int abits; /* Number of abstract command data registers. */ - unsigned datacount; + unsigned int datacount; /* Number of words in the Program Buffer. */ unsigned int progbufsize; /* Hart contains an implicit ebreak at the end of the program buffer. */ @@ -514,7 +514,7 @@ static int increase_ac_busy_delay(struct target *target) RISCV_DELAY_ABSTRACT_COMMAND); } -static uint32_t __attribute__((unused)) abstract_register_size(unsigned width) +static uint32_t __attribute__((unused)) abstract_register_size(unsigned int width) { switch (width) { case 32: @@ -738,10 +738,10 @@ static void abstract_data_write_fill_batch(struct riscv_batch *batch, } /* TODO: reuse "abstract_data_write_fill_batch()" here*/ -static int write_abstract_arg(struct target *target, unsigned index, - riscv_reg_t value, unsigned size_bits) +static int write_abstract_arg(struct target *target, unsigned int index, + riscv_reg_t value, unsigned int size_bits) { - unsigned offset = index * size_bits / 32; + unsigned int offset = index * size_bits / 32; switch (size_bits) { default: LOG_TARGET_ERROR(target, "Unsupported size: %d bits", size_bits); @@ -759,7 +759,7 @@ static int write_abstract_arg(struct target *target, unsigned index, * @par size in bits */ uint32_t riscv013_access_register_command(struct target *target, uint32_t number, - unsigned size, uint32_t flags) + unsigned int size, uint32_t flags) { uint32_t command = set_field(0, DM_COMMAND_CMDTYPE, 0); switch (size) { @@ -907,7 +907,7 @@ cleanup: * Sets the AAMSIZE field of a memory access abstract command based on * the width (bits). */ -static uint32_t abstract_memory_size(unsigned width) +static uint32_t abstract_memory_size(unsigned int width) { switch (width) { case 8: @@ -1089,7 +1089,7 @@ typedef struct { static int scratch_reserve(struct target *target, scratch_mem_t *scratch, struct riscv_program *program, - unsigned size_bytes) + unsigned int size_bytes) { riscv_addr_t alignment = 1; while (alignment < size_bytes) @@ -1121,7 +1121,7 @@ static int scratch_reserve(struct target *target, return ERROR_FAIL; /* Allow for ebreak at the end of the program. */ - unsigned program_size = (program->instruction_count + 1) * 4; + unsigned int program_size = (program->instruction_count + 1) * 4; scratch->hart_address = (info->progbuf_address + program_size + alignment - 1) & ~(alignment - 1); if ((info->progbuf_writable == YNM_YES) && @@ -1237,7 +1237,7 @@ static unsigned int register_size(struct target *target, enum gdb_regno number) return riscv_xlen(target); } -static bool has_sufficient_progbuf(struct target *target, unsigned size) +static bool has_sufficient_progbuf(struct target *target, unsigned int size) { RISCV013_INFO(info); return info->progbufsize + info->impebreak >= size; @@ -2085,7 +2085,7 @@ static int riscv013_authdata_write(struct target *target, uint32_t value, unsign } /* Try to find out the widest memory access size depending on the selected memory access methods. */ -static unsigned riscv013_data_bits(struct target *target) +static unsigned int riscv013_data_bits(struct target *target) { RISCV013_INFO(info); RISCV_INFO(r); @@ -3022,7 +3022,7 @@ static int read_memory_bus_word(struct target *target, target_addr_t address, static target_addr_t sb_read_address(struct target *target) { RISCV013_INFO(info); - unsigned sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE); + unsigned int sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE); target_addr_t address = 0; uint32_t v; if (sbasize > 32) { @@ -3296,7 +3296,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address, continue; } - unsigned error = get_field(sbcs_read, DM_SBCS_SBERROR); + unsigned int error = get_field(sbcs_read, DM_SBCS_SBERROR); if (error == DM_SBCS_SBERROR_NONE) { next_address = end_address; } else { @@ -3535,7 +3535,7 @@ read_memory_abstract(struct target *target, target_addr_t address, memset(buffer, 0, count * size); /* Convert the size (bytes) to width (bits) */ - unsigned width = size << 3; + unsigned int width = size << 3; /* Create the command (physical address, postincrement, read) */ uint32_t command = access_memory_command(target, false, width, use_aampostincrement, false); @@ -3632,7 +3632,7 @@ write_memory_abstract(struct target *target, target_addr_t address, size, address); /* Convert the size (bytes) to width (bits) */ - unsigned width = size << 3; + unsigned int width = size << 3; /* Create the command (physical address, postincrement, write) */ uint32_t command = access_memory_command(target, false, width, use_aampostincrement, true); @@ -5047,13 +5047,13 @@ static int select_prepped_harts(struct target *target) } assert(dm->hart_count); - unsigned hawindow_count = (dm->hart_count + 31) / 32; + unsigned int hawindow_count = (dm->hart_count + 31) / 32; uint32_t *hawindow = calloc(hawindow_count, sizeof(uint32_t)); if (!hawindow) return ERROR_FAIL; target_list_t *entry; - unsigned total_selected = 0; + unsigned int total_selected = 0; unsigned int selected_index = 0; list_for_each_entry(entry, &dm->target_list, list) { struct target *t = entry->target; @@ -5085,7 +5085,7 @@ static int select_prepped_harts(struct target *target) return ERROR_FAIL; } - for (unsigned i = 0; i < hawindow_count; i++) { + for (unsigned int i = 0; i < hawindow_count; i++) { if (dm_write(target, DM_HAWINDOWSEL, i) != ERROR_OK) { free(hawindow); return ERROR_FAIL; diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 59717fd14..a8d0ef80b 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3298,7 +3298,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params, GDB_REGNO_PC, GDB_REGNO_MSTATUS, GDB_REGNO_MEPC, GDB_REGNO_MCAUSE, }; - for (unsigned i = 0; i < ARRAY_SIZE(regnums); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(regnums); i++) { enum gdb_regno regno = regnums[i]; riscv_reg_t reg_value; if (riscv_reg_get(target, ®_value, regno) != ERROR_OK) @@ -3393,8 +3393,8 @@ static int riscv_checksum_memory(struct target *target, static const uint8_t *crc_code; - unsigned xlen = riscv_xlen(target); - unsigned crc_code_size; + unsigned int xlen = riscv_xlen(target); + unsigned int crc_code_size; if (xlen == 32) { crc_code = riscv32_crc_code; crc_code_size = sizeof(riscv32_crc_code); @@ -3957,8 +3957,8 @@ static int parse_ranges(struct list_head *ranges, const char *tcl_arg, const cha /* For backward compatibility, allow multiple parameters within one TCL argument, separated by ',' */ char *arg = strtok(args, ","); while (arg) { - unsigned low = 0; - unsigned high = 0; + unsigned int low = 0; + unsigned int high = 0; char *name = NULL; char *dash = strchr(arg, '-'); @@ -5578,7 +5578,7 @@ static int riscv_step_rtos_hart(struct target *target) bool riscv_supports_extension(const struct target *target, char letter) { RISCV_INFO(r); - unsigned num; + unsigned int num; if (letter >= 'a' && letter <= 'z') num = letter - 'a'; else if (letter >= 'A' && letter <= 'Z') @@ -5588,7 +5588,7 @@ bool riscv_supports_extension(const struct target *target, char letter) return r->misa & BIT(num); } -unsigned riscv_xlen(const struct target *target) +unsigned int riscv_xlen(const struct target *target) { RISCV_INFO(r); return r->xlen; diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index 4ac10fa76..33afdcd13 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -245,7 +245,7 @@ struct riscv_info { int (*read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer, uint32_t increment); - unsigned (*data_bits)(struct target *target); + unsigned int (*data_bits)(struct target *target); COMMAND_HELPER((*print_info), struct target *target); @@ -320,15 +320,15 @@ typedef struct { typedef struct { const char *name; int level; - unsigned va_bits; + unsigned int va_bits; /* log2(PTESIZE) */ - unsigned pte_shift; - unsigned vpn_shift[PG_MAX_LEVEL]; - unsigned vpn_mask[PG_MAX_LEVEL]; - unsigned pte_ppn_shift[PG_MAX_LEVEL]; - unsigned pte_ppn_mask[PG_MAX_LEVEL]; - unsigned pa_ppn_shift[PG_MAX_LEVEL]; - unsigned pa_ppn_mask[PG_MAX_LEVEL]; + unsigned int pte_shift; + unsigned int vpn_shift[PG_MAX_LEVEL]; + unsigned int vpn_mask[PG_MAX_LEVEL]; + unsigned int pte_ppn_shift[PG_MAX_LEVEL]; + unsigned int pte_ppn_mask[PG_MAX_LEVEL]; + unsigned int pa_ppn_shift[PG_MAX_LEVEL]; + unsigned int pa_ppn_mask[PG_MAX_LEVEL]; } virt2phys_info_t; /* Wall-clock timeout for a command/access. Settable via RISC-V Target commands.*/ @@ -381,7 +381,7 @@ int riscv_openocd_step( bool riscv_supports_extension(const struct target *target, char letter); /* Returns XLEN for the given (or current) hart. */ -unsigned riscv_xlen(const struct target *target); +unsigned int riscv_xlen(const struct target *target); /* Returns VLENB for the given (or current) hart. */ unsigned int riscv_vlenb(const struct target *target);