target/riscv: set appropriate memory access result codes
Set appropriate memory access result codes Checkpatch-ignore: MACRO_ARG_PRECEDENCE, MULTISTATEMENT_MACRO_USE_DO_WHILE Checkpatch-ignore: TRAILING_SEMICOLON Change-Id: Ib73b5a041e5f15aef150b80fdd45f107de19d3a6 Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
This commit is contained in:
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56b7830d65
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7335759845
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@ -3490,11 +3490,39 @@ typedef enum {
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SKIPPED, "skipped (dm target select failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED, \
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SKIPPED, "skipped (fence execution failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_SYSBUS_ACCESS_FAILED, \
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SKIPPED, "skipped (sysbus access failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_REG_SAVE_FAILED, \
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SKIPPED, "skipped (register save failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_UNKNOWN_SYSBUS_VERSION, \
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SKIPPED, "skipped (unknown sysbus version)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_PROGRAM_WRITE_FAILED, \
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SKIPPED, "skipped (program write failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED, \
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SKIPPED, "skipped (progbuf fill failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_WRITE_ABSTRACT_ARG_FAILED, \
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SKIPPED, "skipped (abstract command argument write failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_SKIPPED_PRIV_MOD_FAILED, \
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SKIPPED, "skipped (privilege modification failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED, FAILED, "failed") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_DM_ACCESS_FAILED, \
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FAILED, "failed (DM register access failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PRIV_MOD_FAILED, \
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FAILED, "failed (privilege modification failed)")
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FAILED, "failed (privilege modification failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_REG_READ_FAILED, \
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FAILED, "failed (register read failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PROGBUF_STARTUP_FAILED, \
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FAILED, "failed (progbuf startup failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PROGBUF_INNER_FAILED, \
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FAILED, "failed (progbuf inner failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_PROGBUF_TEARDOWN_FAILED, \
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FAILED, "failed (progbuf teardown failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_EXECUTE_ABSTRACT_FAILED, \
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FAILED, "failed (execute abstract failed)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_NO_FORWARD_PROGRESS, \
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FAILED, "failed (no forward progress)") \
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MEM_ACCESS_RESULT_HANDLER(MEM_ACCESS_FAILED_FENCE_EXEC_FAILED, \
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FAILED, "failed (fence execution failed)") \
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#define MEM_ACCESS_RESULT_HANDLER(name, kind, msg) name,
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@ -4203,7 +4231,7 @@ static int read_word_from_dm_data_regs(struct target *target,
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return result;
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}
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static int read_word_from_s1(struct target *target,
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static mem_access_result_t read_word_from_s1(struct target *target,
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const riscv_mem_access_args_t args, uint32_t index)
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{
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assert(riscv_mem_access_is_read(args));
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@ -4211,9 +4239,9 @@ static int read_word_from_s1(struct target *target,
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uint64_t value;
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if (register_read_direct(target, &value, GDB_REGNO_S1) != ERROR_OK)
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return ERROR_FAIL;
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return MEM_ACCESS_FAILED_REG_READ_FAILED;
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set_buffer_and_log_read(args, index, value);
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return ERROR_OK;
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return MEM_ACCESS_OK;
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}
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static int read_memory_progbuf_inner_fill_progbuf(struct target *target,
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@ -4256,18 +4284,19 @@ static int read_memory_progbuf_inner_fill_progbuf(struct target *target,
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* re-read the data only if `abstract command busy` or `DMI busy`
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* is encountered in the process.
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*/
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static int read_memory_progbuf_inner(struct target *target, const riscv_mem_access_args_t args)
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static mem_access_result_t
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read_memory_progbuf_inner(struct target *target, const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_read(args));
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assert(args.count > 1 && "If count == 1, read_memory_progbuf_inner_one must be called");
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if (read_memory_progbuf_inner_fill_progbuf(target, args.increment, args.size) != ERROR_OK)
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return ERROR_FAIL;
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if (read_memory_progbuf_inner_fill_progbuf(target,
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args.increment, args.size) != ERROR_OK)
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return MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED;
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if (read_memory_progbuf_inner_startup(target, args.address,
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args.increment, /*index*/ 0)
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!= ERROR_OK)
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return ERROR_FAIL;
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args.increment, /*index*/ 0) != ERROR_OK)
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return MEM_ACCESS_FAILED_PROGBUF_STARTUP_FAILED;
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/* The program in program buffer is executed twice during
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* read_memory_progbuf_inner_startup().
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* Here:
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@ -4285,13 +4314,13 @@ static int read_memory_progbuf_inner(struct target *target, const riscv_mem_acce
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if (read_memory_progbuf_inner_try_to_read(target, args, &elements_read,
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index, loop_count) != ERROR_OK) {
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dm_write(target, DM_ABSTRACTAUTO, 0);
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return ERROR_FAIL;
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return MEM_ACCESS_FAILED_PROGBUF_INNER_FAILED;
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}
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if (elements_read == 0) {
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if (read_memory_progbuf_inner_ensure_forward_progress(target, args,
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index) != ERROR_OK) {
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dm_write(target, DM_ABSTRACTAUTO, 0);
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return ERROR_FAIL;
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return MEM_ACCESS_FAILED_NO_FORWARD_PROGRESS;
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}
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elements_read = 1;
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}
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@ -4299,12 +4328,12 @@ static int read_memory_progbuf_inner(struct target *target, const riscv_mem_acce
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assert(index <= loop_count);
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}
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if (dm_write(target, DM_ABSTRACTAUTO, 0) != ERROR_OK)
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return ERROR_FAIL;
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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/* Read the penultimate word. */
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if (read_word_from_dm_data_regs(target, args, args.count - 2)
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!= ERROR_OK)
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return ERROR_FAIL;
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if (read_word_from_dm_data_regs(target,
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args, args.count - 2) != ERROR_OK)
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return MEM_ACCESS_FAILED_DM_ACCESS_FAILED;
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/* Read the last word. */
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return read_word_from_s1(target, args, args.count - 1);
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}
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@ -4313,33 +4342,35 @@ static int read_memory_progbuf_inner(struct target *target, const riscv_mem_acce
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* Only need to save/restore one GPR to read a single word, and the progbuf
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* program doesn't need to increment.
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*/
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static int read_memory_progbuf_inner_one(struct target *target, const riscv_mem_access_args_t args)
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static mem_access_result_t
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read_memory_progbuf_inner_one(struct target *target, const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_read(args));
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if (riscv013_reg_save(target, GDB_REGNO_S1) != ERROR_OK)
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return ERROR_FAIL;
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return MEM_ACCESS_SKIPPED_REG_SAVE_FAILED;
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struct riscv_program program;
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riscv_program_init(&program, target);
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if (riscv_program_load(&program, GDB_REGNO_S1, GDB_REGNO_S1, 0, args.size) != ERROR_OK)
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return ERROR_FAIL;
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if (riscv_program_ebreak(&program) != ERROR_OK)
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return ERROR_FAIL;
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if (riscv_program_load(&program, GDB_REGNO_S1, GDB_REGNO_S1,
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/* offset = */ 0, args.size) != ERROR_OK
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|| riscv_program_ebreak(&program) != ERROR_OK)
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return MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED;
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if (riscv_program_write(&program) != ERROR_OK)
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return ERROR_FAIL;
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return MEM_ACCESS_SKIPPED_PROGRAM_WRITE_FAILED;
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/* Write address to S1, and execute buffer. */
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if (write_abstract_arg(target, 0, args.address, riscv_xlen(target))
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!= ERROR_OK)
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return ERROR_FAIL;
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if (write_abstract_arg(target, /* index = */ 0,
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args.address, riscv_xlen(target)) != ERROR_OK)
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return MEM_ACCESS_SKIPPED_WRITE_ABSTRACT_ARG_FAILED;
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uint32_t command = riscv013_access_register_command(target, GDB_REGNO_S1,
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riscv_xlen(target), AC_ACCESS_REGISTER_WRITE |
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AC_ACCESS_REGISTER_TRANSFER | AC_ACCESS_REGISTER_POSTEXEC);
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uint32_t cmderr;
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if (riscv013_execute_abstract_command(target, command, &cmderr) != ERROR_OK)
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return ERROR_FAIL;
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return MEM_ACCESS_FAILED_EXECUTE_ABSTRACT_FAILED;
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return read_word_from_s1(target, args, 0);
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}
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@ -4358,11 +4389,9 @@ read_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
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if (execute_autofence(target) != ERROR_OK)
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return MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED;
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int res = (args.count == 1) ?
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return (args.count == 1) ?
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read_memory_progbuf_inner_one(target, args) :
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read_memory_progbuf_inner(target, args);
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return res == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
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}
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static mem_access_result_t
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@ -4390,7 +4419,7 @@ access_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
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riscv_reg_t dcsr_old = 0;
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if (modify_privilege_for_virt2phys_mode(target,
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&mstatus, &mstatus_old, &dcsr, &dcsr_old) != ERROR_OK)
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return MEM_ACCESS_FAILED_PRIV_MOD_FAILED;
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return MEM_ACCESS_SKIPPED_PRIV_MOD_FAILED;
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mem_access_result_t result = is_read ?
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read_memory_progbuf(target, args) :
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@ -4398,7 +4427,7 @@ access_memory_progbuf(struct target *target, const riscv_mem_access_args_t args)
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if (restore_privilege_from_virt2phys_mode(target,
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mstatus, mstatus_old, dcsr, dcsr_old) != ERROR_OK)
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return MEM_ACCESS_FAILED;
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return MEM_ACCESS_FAILED_PRIV_MOD_FAILED;
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return result;
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}
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@ -4421,17 +4450,18 @@ access_memory_sysbus(struct target *target, const riscv_mem_access_args_t args)
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int ret = ERROR_FAIL;
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const bool is_read = riscv_mem_access_is_read(args);
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const uint64_t sbver = get_field(info->sbcs, DM_SBCS_SBVERSION);
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if (sbver == 0)
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if (sbver == 0) {
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ret = is_read ? read_memory_bus_v0(target, args) :
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write_memory_bus_v0(target, args);
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else if (sbver == 1)
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} else if (sbver == 1) {
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ret = is_read ? read_memory_bus_v1(target, args) :
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write_memory_bus_v1(target, args);
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else
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LOG_TARGET_ERROR(target,
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"Unknown system bus version: %" PRIu64, sbver);
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} else {
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LOG_TARGET_ERROR(target, "Unknown system bus version: %" PRIu64, sbver);
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return MEM_ACCESS_SKIPPED_UNKNOWN_SYSBUS_VERSION;
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}
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return (ret == ERROR_OK) ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
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return ret == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_SKIPPED_SYSBUS_ACCESS_FAILED;
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}
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static mem_access_result_t
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@ -4449,10 +4479,8 @@ access_memory_abstract(struct target *target, const riscv_mem_access_args_t args
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TARGET_PRIxADDR, access_type, args.count,
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args.size, args.address);
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int result = is_read ? read_memory_abstract(target, args) :
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return is_read ? read_memory_abstract(target, args) :
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write_memory_abstract(target, args);
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return result == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
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}
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static int
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@ -4913,16 +4941,19 @@ static int write_memory_progbuf_fill_progbuf(struct target *target, uint32_t siz
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return riscv_program_write(&program);
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}
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static int write_memory_progbuf_inner(struct target *target, const riscv_mem_access_args_t args)
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static mem_access_result_t
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write_memory_progbuf_inner(struct target *target,
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const riscv_mem_access_args_t args)
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{
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assert(riscv_mem_access_is_write(args));
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if (write_memory_progbuf_fill_progbuf(target, args.size) != ERROR_OK)
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return ERROR_FAIL;
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return MEM_ACCESS_SKIPPED_PROGBUF_FILL_FAILED;
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target_addr_t addr_on_target = args.address;
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if (write_memory_progbuf_startup(target, &addr_on_target, args.write_buffer, args.size) != ERROR_OK)
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return ERROR_FAIL;
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if (write_memory_progbuf_startup(target, &addr_on_target,
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args.write_buffer, args.size) != ERROR_OK)
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return MEM_ACCESS_FAILED_PROGBUF_STARTUP_FAILED;
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const target_addr_t end_addr = args.address + (target_addr_t)args.size * args.count;
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@ -4932,7 +4963,7 @@ static int write_memory_progbuf_inner(struct target *target, const riscv_mem_acc
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if (write_memory_progbuf_try_to_write(target, &next_addr_on_target,
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end_addr, args.size, curr_buff) != ERROR_OK) {
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write_memory_progbuf_teardown(target);
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return ERROR_FAIL;
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return MEM_ACCESS_FAILED_PROGBUF_INNER_FAILED;
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}
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/* write_memory_progbuf_try_to_write() ensures that at least one item
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* gets successfully written even when busy condition is encountered.
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assert(next_addr_on_target - args.address <= (target_addr_t)args.size * args.count);
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}
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return write_memory_progbuf_teardown(target);
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return write_memory_progbuf_teardown(target) == ERROR_OK ?
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MEM_ACCESS_OK : MEM_ACCESS_FAILED_PROGBUF_TEARDOWN_FAILED;
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}
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static mem_access_result_t
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{
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assert(riscv_mem_access_is_write(args));
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int result = write_memory_progbuf_inner(target, args);
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mem_access_result_t result = write_memory_progbuf_inner(target, args);
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if (execute_autofence(target) != ERROR_OK)
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return MEM_ACCESS_SKIPPED_FENCE_EXEC_FAILED;
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return MEM_ACCESS_FAILED_FENCE_EXEC_FAILED;
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return result == ERROR_OK ? MEM_ACCESS_OK : MEM_ACCESS_FAILED;
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return result;
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}
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static bool riscv013_get_impebreak(const struct target *target)
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