interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

target/arc: allow reading memory while target runs 

There is no reason that ARC can't support reading from memory over JTAG
while the target is executing, and this is in fact required for RTT
support. Remove this check from arc_mem_read and arc_mem_write

Change-Id: I2accfb4b99bf77c5473d133623e0eb0632cb45f6
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8721
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Daniel DeGrasse 2025-01-16 22:33:48 -05:00 committed by Antonio Borneo
parent 9bb0a4558b
commit 44e782d55b
1 changed files with 0 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/target/arc_mem.c
View File

@ -161,11 +161,6 @@ int arc_mem_write(struct target *target, target_addr_t address, uint32_t size,
LOG_TARGET_DEBUG(target, "address: 0x%08" TARGET_PRIxADDR ", size: %" PRIu32 ", count: %" PRIu32,
address, size, count);
if (target->state != TARGET_HALTED) {
LOG_TARGET_ERROR(target, "not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || !(count) || !(buffer))
return ERROR_COMMAND_SYNTAX_ERROR;
@ -246,11 +241,6 @@ int arc_mem_read(struct target *target, target_addr_t address, uint32_t size,
LOG_TARGET_DEBUG(target, "Read memory: addr=0x%08" TARGET_PRIxADDR ", size=%" PRIu32
", count=%" PRIu32, address, size, count);
if (target->state != TARGET_HALTED) {
LOG_TARGET_WARNING(target, "target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* Sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || !(count) || !(buffer))
return ERROR_COMMAND_SYNTAX_ERROR;