Clifford Wolf
|
bcc873b805
|
Fixed some visual studio warnings
|
2016-02-13 17:31:24 +01:00 |
Clifford Wolf
|
801c022457
|
Improved dffsr2dff pass
|
2016-02-02 19:42:49 +01:00 |
Clifford Wolf
|
d69395ca08
|
Added dffsr2dff
|
2016-02-02 17:19:01 +01:00 |
Clifford Wolf
|
17372d8abd
|
Added "abc -luts" option, Improved Xilinx logic mapping
|
2016-02-01 12:40:32 +01:00 |
Clifford Wolf
|
9251553592
|
Improvements in dfflibmap (FFs with Q/QN outputs, DFFs from ADFFs)
|
2016-02-01 11:49:11 +01:00 |
Clifford Wolf
|
71f418c468
|
More clang sanitizer stuff
|
2016-01-31 19:55:48 +01:00 |
Clifford Wolf
|
d98d99aec6
|
Added "abc -g"
|
2015-11-10 11:10:11 +01:00 |
Marcus Comstedt
|
8c2bdef36d
|
Fix a segfault in dffinit when the value has too few bits
The code was already trying to add the required number of bits, but
fell one short of the mark.
|
2015-11-08 19:16:56 +01:00 |
Clifford Wolf
|
f401eeb0cf
|
Bugfix in mapping $tribuf to $_TBUF_
|
2015-11-05 12:37:43 +01:00 |
Clifford Wolf
|
207736b4ee
|
Import more std:: stuff into Yosys namespace
|
2015-10-25 19:30:49 +01:00 |
Clifford Wolf
|
6fe48cf41e
|
equiv_purge bugfix, using SigChunk in Yosys namespace
|
2015-10-24 19:09:45 +02:00 |
Clifford Wolf
|
eb1e3caae7
|
Fixed "flatten" for unconnected inout ports
|
2015-10-13 10:30:23 +02:00 |
Clifford Wolf
|
598a475724
|
Added nlutmap
|
2015-09-18 21:57:34 +02:00 |
Clifford Wolf
|
c851f51656
|
Added lut2mux pass
|
2015-09-18 21:55:48 +02:00 |
Clifford Wolf
|
db548800b6
|
Added buffer detection to "abc -lut"
|
2015-09-18 20:12:56 +02:00 |
Clifford Wolf
|
452d4bf741
|
Added support for "dfflibmap -liberty +/..."
|
2015-09-18 11:55:57 +02:00 |
Clifford Wolf
|
24e7cf89bc
|
Fixed iopadmap help message
|
2015-08-31 16:49:42 +02:00 |
Clifford Wolf
|
92dce21f6e
|
Using dict<> and pool<> in alumacc pass
|
2015-08-31 16:26:01 +02:00 |
Clifford Wolf
|
f43815054e
|
Properly clean up unused "init" attributes
|
2015-08-18 13:50:15 +02:00 |
Clifford Wolf
|
9c33172ece
|
Added tribuf command
|
2015-08-16 12:55:25 +02:00 |
Clifford Wolf
|
ff50bc2ac3
|
Added $tribuf and $_TBUF_ cell types
|
2015-08-16 12:54:52 +02:00 |
Larry Doolittle
|
6c00704a5e
|
Another block of spelling fixes
Smaller this time
|
2015-08-14 23:27:05 +02:00 |
Clifford Wolf
|
0350074819
|
Re-created command-reference-manual.tex, copied some doc fixes to online help
|
2015-08-14 11:27:19 +02:00 |
Clifford Wolf
|
84bf862f7c
|
Spell check (by Larry Doolittle)
|
2015-08-14 10:56:05 +02:00 |
Clifford Wolf
|
80910d13a6
|
Merge branch 'master' of github.com:cliffordwolf/yosys
|
2015-08-13 09:52:06 +02:00 |
Clifford Wolf
|
08ad5409a2
|
Some ASCII encoding fixes (comments and docs) by Larry Doolittle
|
2015-08-13 09:30:20 +02:00 |
Clifford Wolf
|
e4ef000b70
|
Adjust makefiles to work with out-of-tree builds
This is based on work done by Larry Doolittle
|
2015-08-12 15:04:44 +02:00 |
Clifford Wolf
|
3860c9a9f2
|
Fixed flatten $meminit handling
|
2015-07-30 21:43:41 +02:00 |
Clifford Wolf
|
ad919ae4e3
|
Fixed techmap processes error msg
|
2015-07-18 12:16:27 +02:00 |
Clifford Wolf
|
6c84341f22
|
Fixed trailing whitespaces
|
2015-07-02 11:14:30 +02:00 |
Clifford Wolf
|
1ae360cf72
|
AigMaker refactoring
|
2015-06-10 23:00:12 +02:00 |
Clifford Wolf
|
56d4822719
|
Renamed "aig" to "aigmap"
|
2015-06-10 07:24:26 +02:00 |
Clifford Wolf
|
85287295b2
|
Fixed cellaigs port extending
|
2015-06-10 07:16:30 +02:00 |
Clifford Wolf
|
66f9ee412a
|
Added "aig" pass
|
2015-06-09 22:33:26 +02:00 |
Clifford Wolf
|
522705cc28
|
Added liberty dont_use support to dfflibmap
|
2015-05-31 07:51:12 +02:00 |
Clifford Wolf
|
9f772eb970
|
Improved "flatten" handlings of inout ports
|
2015-05-23 10:14:53 +02:00 |
Clifford Wolf
|
e5116eeb77
|
Generalized blifparse API
|
2015-05-17 15:10:37 +02:00 |
Clifford Wolf
|
7dad017c9c
|
abc/blifparse files reorganization
|
2015-05-17 14:44:28 +02:00 |
Clifford Wolf
|
794d22969d
|
Added simplemap $lut support
|
2015-04-27 10:16:07 +02:00 |
Clifford Wolf
|
49859393bb
|
Improved attributes API and handling of "src" attributes
|
2015-04-24 22:04:05 +02:00 |
Clifford Wolf
|
8cdbcf6859
|
Bugfix for $_DFF_?_ in "dff2dffe -direct-match"
|
2015-04-17 21:35:59 +02:00 |
Clifford Wolf
|
e050467b89
|
Improved "maccmap" help message
|
2015-04-16 18:23:43 +02:00 |
Clifford Wolf
|
dc30b034f7
|
Fixed "dff2dffe -direct-match"
|
2015-04-16 11:47:59 +02:00 |
Clifford Wolf
|
f80d020f17
|
Added "dff2dffe -direct-match"
|
2015-04-16 11:30:17 +02:00 |
Clifford Wolf
|
be7b9b34ca
|
techmap code cleanup
|
2015-04-09 12:02:26 +02:00 |
Clifford Wolf
|
21a1cc1b60
|
Added support for "file names with blanks"
|
2015-04-08 12:14:34 +02:00 |
Clifford Wolf
|
aa0ab975b9
|
Removed "techmap -share_map" (use "-map +/filename" instead)
|
2015-04-08 12:13:53 +02:00 |
Clifford Wolf
|
724cead61d
|
Added "pmuxtree" command
|
2015-04-07 20:27:10 +02:00 |
Clifford Wolf
|
590f74d8f0
|
Added decoder generation to "muxcover"
|
2015-04-07 18:03:27 +02:00 |
Clifford Wolf
|
f7fb21f185
|
Added "muxcover" command
|
2015-04-07 15:42:25 +02:00 |
Clifford Wolf
|
c52a4cdeed
|
Added "dffinit", Support for initialized Xilinx DFF
|
2015-04-04 19:00:15 +02:00 |
Clifford Wolf
|
8b1e0bdd9e
|
Fixed handling of quotes in liberty parser
|
2015-03-18 16:03:19 +01:00 |
Clifford Wolf
|
27a918eadf
|
Merge branch 'master' of github.com:cliffordwolf/yosys
|
2015-02-25 23:01:54 +01:00 |
Clifford Wolf
|
331f8b8d0b
|
Bugfix in iopadmap
|
2015-02-25 23:01:42 +01:00 |
Clifford Wolf
|
3fe18c26cd
|
Added "keep_hierarchy" attribute
|
2015-02-25 12:46:00 +01:00 |
Clifford Wolf
|
49dd9c713f
|
Fixed "flatten" for non-pre-derived modules
|
2015-02-21 15:01:13 +01:00 |
Clifford Wolf
|
f778a4081c
|
Catch constants assigned to cell outputs in "flatten"
|
2015-02-21 11:21:28 +01:00 |
Clifford Wolf
|
f41378af8c
|
Fixed clang (svn trunk) warnings
|
2015-02-18 14:54:22 +01:00 |
Clifford Wolf
|
3216f9420e
|
More emscripten stuff, Added example app
|
2015-02-15 12:09:30 +01:00 |
Clifford Wolf
|
2a9ad48eb6
|
Added ENABLE_NDEBUG makefile options
|
2015-01-24 12:16:46 +01:00 |
Clifford Wolf
|
8658eed52a
|
Added support for memories to flatten (techmap)
|
2015-01-17 20:46:52 +01:00 |
Clifford Wolf
|
8ce8a230f4
|
Bugfix in dff2dffe
|
2015-01-16 17:51:17 +01:00 |
Clifford Wolf
|
9065fb25cc
|
Fixed handling of foo.__TECHMAP_...
|
2015-01-15 13:36:57 +01:00 |
Clifford Wolf
|
4a0b3a5423
|
Various small improvements to synth_xilinx
|
2015-01-06 14:37:50 +01:00 |
Clifford Wolf
|
c64b1de11d
|
Fixed build with SMALL=1
|
2014-12-30 11:41:24 +01:00 |
Clifford Wolf
|
a6c96b986b
|
Added Yosys::{dict,nodict,vector} container types
|
2014-12-26 10:53:21 +01:00 |
Clifford Wolf
|
170788a3de
|
Fixed simplemap for $ne cells with output width > 1
|
2014-12-25 16:41:20 +01:00 |
Clifford Wolf
|
aad195b88c
|
Added "dfflibmap -prepare" help
|
2014-12-24 12:56:05 +01:00 |
Clifford Wolf
|
35f5aa300f
|
Added "dfflibmap -prepare"
|
2014-12-24 12:19:20 +01:00 |
Clifford Wolf
|
032ce573a3
|
Added "dff2dffe -direct" for direct gate mapping
|
2014-12-24 11:39:15 +01:00 |
Clifford Wolf
|
8c1a72c2a4
|
Added "dff2dffe -unmap"
|
2014-12-24 11:09:01 +01:00 |
Clifford Wolf
|
afcacd6437
|
Added support for gate-level cells in dff2dffe
|
2014-12-24 10:49:54 +01:00 |
Clifford Wolf
|
4aa9fbbf3f
|
Improvements in simplemap api, added $ne $nex $eq $eqx support
|
2014-12-24 10:49:24 +01:00 |
Clifford Wolf
|
edb3c9d0c4
|
Renamed extend() to extend_xx(), changed most users to extend_u0()
|
2014-12-24 09:51:17 +01:00 |
Clifford Wolf
|
032511fac8
|
Added functionality to dff2dffe pass
|
2014-12-08 15:38:58 +01:00 |
Clifford Wolf
|
97487fee32
|
Added skeleton dff2dffe pass
|
2014-12-08 14:10:52 +01:00 |
Clifford Wolf
|
f1764b4fe9
|
Added $dffe cell type
|
2014-12-08 10:50:19 +01:00 |
Clifford Wolf
|
546e8b5fe7
|
Improved TopoSort determinism
|
2014-11-07 15:21:03 +01:00 |
Clifford Wolf
|
84ffe04075
|
Fixed various VS warnings
|
2014-10-18 15:20:38 +02:00 |
Clifford Wolf
|
973d376733
|
Added genfiles.zip to MXE "make dist"
|
2014-10-17 12:11:15 +02:00 |
Clifford Wolf
|
c21c9dab1e
|
Removed CHECK() macro from libparse.cc (was using non-std c features)
|
2014-10-13 17:22:06 +02:00 |
Clifford Wolf
|
54bf3a95dd
|
More Win32 build fixes
|
2014-10-10 18:34:19 +02:00 |
Clifford Wolf
|
bbd808072b
|
Added format __attribute__ to stringf()
|
2014-10-10 17:22:08 +02:00 |
Clifford Wolf
|
4569a747f8
|
Renamed SIZE() to GetSize() because of name collision on Win32
|
2014-10-10 17:07:24 +02:00 |
Clifford Wolf
|
ccf7b2e342
|
Added mxe-based cross build for win32
|
2014-10-09 10:50:44 +02:00 |
Clifford Wolf
|
696d7ed40e
|
Fixes in "hilomap" help message
|
2014-10-08 21:38:37 +02:00 |
Clifford Wolf
|
f9a307a50b
|
namespace Yosys
|
2014-09-27 16:17:53 +02:00 |
Clifford Wolf
|
b86410b2ab
|
More aggressive $macc merging in alumacc
|
2014-09-15 12:42:11 +02:00 |
Clifford Wolf
|
b470c480e9
|
Added the obvious optimizations to alumacc $macc generator
|
2014-09-15 12:22:03 +02:00 |
Clifford Wolf
|
fcbda07411
|
Improved maccmap tree bit packing
|
2014-09-15 12:00:19 +02:00 |
Clifford Wolf
|
7e156a5419
|
Fixed techmap_wrap for techmap_celltype
|
2014-09-14 15:34:36 +02:00 |
Clifford Wolf
|
014bb34e0e
|
Various fixes/cleanups in alumacc and maccmap
|
2014-09-14 14:49:53 +02:00 |
Clifford Wolf
|
124e759280
|
Added techmap_wrap attribute
|
2014-09-14 14:49:26 +02:00 |
Clifford Wolf
|
b34ca15185
|
alumacc fix for $pos cells
|
2014-09-14 14:00:14 +02:00 |
Clifford Wolf
|
0df1d9ad72
|
Extract $alu cells in alumacc
|
2014-09-14 13:23:44 +02:00 |
Clifford Wolf
|
7b16c63101
|
Merge $macc cells in alumacc pass
|
2014-09-14 11:21:37 +02:00 |
Clifford Wolf
|
0b72f0acb1
|
Basic $macc extract in alumacc
|
2014-09-14 10:45:28 +02:00 |
Clifford Wolf
|
ff157fb74f
|
alumacc skeleton
|
2014-09-14 10:02:00 +02:00 |
Clifford Wolf
|
d46bac3305
|
Added "$fa" cell type
|
2014-09-08 12:15:39 +02:00 |
Clifford Wolf
|
1a88e47396
|
Trim msb/lsb zero bits from full adder in maccmap
|
2014-09-08 11:21:58 +02:00 |
Clifford Wolf
|
c50b841b29
|
Added 'techmap_maccmap' techmap attribute
|
2014-09-07 18:23:37 +02:00 |
Clifford Wolf
|
015dcdc84c
|
Added "maccmap" command
|
2014-09-07 18:23:04 +02:00 |
Clifford Wolf
|
8927aa6148
|
Removed $bu0 cell type
|
2014-09-04 02:07:52 +02:00 |
Clifford Wolf
|
826fdb34d8
|
Added "techmap -autoproc"
|
2014-09-01 15:36:29 +02:00 |
Clifford Wolf
|
d148b0af0d
|
Fixed inserting of Q-inverters in dfflibmap
|
2014-08-27 19:44:12 +02:00 |
Clifford Wolf
|
c642dd0b3e
|
Only call proc_share_dirname() in techmap when necessary
|
2014-08-23 15:32:00 +02:00 |
Clifford Wolf
|
19cff41eb4
|
Changed frontend-api from FILE to std::istream
|
2014-08-23 15:03:55 +02:00 |
Clifford Wolf
|
5dce303a2a
|
Changed backend-api from FILE to std::ostream
|
2014-08-23 13:54:21 +02:00 |
Clifford Wolf
|
410d043dd8
|
Renamed toposort.h to utils.h
|
2014-08-17 00:55:35 +02:00 |
Clifford Wolf
|
674f421b47
|
Bugfix in iopadmap
|
2014-08-15 14:29:42 +02:00 |
Clifford Wolf
|
f092b50148
|
Renamed $_INV_ cell type to $_NOT_
|
2014-08-15 14:11:40 +02:00 |
Clifford Wolf
|
ca87116449
|
More idstring sort_by_* helpers and fixed tpl ordering in techmap
|
2014-08-15 02:40:46 +02:00 |
Clifford Wolf
|
d320e75087
|
document "techmap -map %<design-name>"
|
2014-08-15 02:01:30 +02:00 |
Clifford Wolf
|
1bf7a18fec
|
Added module->ports
|
2014-08-14 16:22:52 +02:00 |
Clifford Wolf
|
014a41fcf3
|
Implemented recursive techmap
|
2014-08-03 12:40:43 +02:00 |
Clifford Wolf
|
08ec33a5e5
|
Implemented simplemap support for "techmap -extern"
|
2014-08-02 21:55:13 +02:00 |
Clifford Wolf
|
b6acbc82e6
|
Bugfix in "techmap -extern"
|
2014-08-02 20:54:30 +02:00 |
Clifford Wolf
|
04727c7e0f
|
No implicit conversion from IdString to anything else
|
2014-08-02 18:58:40 +02:00 |
Clifford Wolf
|
768eb846c4
|
More bugfixes related to new RTLIL::IdString
|
2014-08-02 18:14:21 +02:00 |
Clifford Wolf
|
b9bd22b8c8
|
More cleanups related to RTLIL::IdString usage
|
2014-08-02 13:19:57 +02:00 |
Clifford Wolf
|
bd74ed7da4
|
Replaced sha1 implementation
|
2014-08-01 19:01:10 +02:00 |
Clifford Wolf
|
cdae8abe16
|
Renamed port access function on RTLIL::Cell, added param access functions
|
2014-07-31 16:38:54 +02:00 |
Clifford Wolf
|
e6d33513a5
|
Added module->design and cell->module, wire->module pointers
|
2014-07-31 14:11:39 +02:00 |
Clifford Wolf
|
1cb25c05b3
|
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
|
2014-07-31 13:19:47 +02:00 |
Clifford Wolf
|
1202f7aa4b
|
Renamed "stdcells.v" to "techmap.v"
|
2014-07-31 02:32:00 +02:00 |
Clifford Wolf
|
6ca0c569d9
|
Added "techmap -assert"
|
2014-07-31 02:21:41 +02:00 |
Clifford Wolf
|
2541489105
|
Added techmap CONSTMAP feature
|
2014-07-30 22:04:30 +02:00 |
Clifford Wolf
|
03c96f9ce7
|
Added "techmap -map %{design-name}"
|
2014-07-29 16:35:13 +02:00 |
Clifford Wolf
|
7bd2d1064f
|
Using log_assert() instead of assert()
|
2014-07-28 11:27:48 +02:00 |
Clifford Wolf
|
8b0f50792c
|
Added techmap -extern
|
2014-07-27 21:31:18 +02:00 |
Clifford Wolf
|
5da343b7de
|
Added topological sorting to techmap
|
2014-07-27 16:43:39 +02:00 |
Clifford Wolf
|
49f72421d5
|
Using new obj iterator API in a few places
|
2014-07-27 11:32:42 +02:00 |
Clifford Wolf
|
10e5791c5e
|
Refactoring: Renamed RTLIL::Design::modules to modules_
|
2014-07-27 11:18:30 +02:00 |
Clifford Wolf
|
4c4b602156
|
Refactoring: Renamed RTLIL::Module::cells to cells_
|
2014-07-27 01:51:45 +02:00 |
Clifford Wolf
|
f9946232ad
|
Refactoring: Renamed RTLIL::Module::wires to wires_
|
2014-07-27 01:49:51 +02:00 |
Clifford Wolf
|
d68c993ed2
|
Changed more code to the new RTLIL::Wire constructors
|
2014-07-26 21:30:38 +02:00 |
Clifford Wolf
|
3f4e3ca8ad
|
More RTLIL::Cell API usage cleanups
|
2014-07-26 16:14:02 +02:00 |
Clifford Wolf
|
f8fdc47d33
|
Manual fixes for new cell connections API
|
2014-07-26 15:58:23 +02:00 |
Clifford Wolf
|
b7dda72302
|
Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
|
2014-07-26 15:58:23 +02:00 |
Clifford Wolf
|
cc4f10883b
|
Renamed RTLIL::{Module,Cell}::connections to connections_
|
2014-07-26 11:58:03 +02:00 |
Clifford Wolf
|
4755e14e7b
|
Added copy-constructor-like module->addCell(name, other) method
|
2014-07-26 00:38:44 +02:00 |
Clifford Wolf
|
2bec47a404
|
Use only module->addCell() and module->remove() to create and delete cells
|
2014-07-25 17:56:19 +02:00 |
Clifford Wolf
|
45b4154b37
|
Added "make SMALL=1"
|
2014-07-24 19:03:57 +02:00 |
Clifford Wolf
|
b17d6531c8
|
Added "make PRETTY=1"
|
2014-07-24 17:15:01 +02:00 |
Clifford Wolf
|
a62c21c9c6
|
Removed RTLIL::SigSpec::expand() method
|
2014-07-23 19:34:51 +02:00 |
Clifford Wolf
|
4e802eb7f6
|
Fixed all users of SigSpec::chunks_rw() and removed it
|
2014-07-23 15:36:09 +02:00 |
Clifford Wolf
|
ec923652e2
|
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
|
2014-07-23 09:52:55 +02:00 |
Clifford Wolf
|
a8d3a68971
|
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
|
2014-07-23 09:49:43 +02:00 |
Clifford Wolf
|
28b3fd05fa
|
SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()
|
2014-07-22 20:58:44 +02:00 |
Clifford Wolf
|
4b4048bc5f
|
SigSpec refactoring: using the accessor functions everywhere
|
2014-07-22 20:39:37 +02:00 |