Chung Shien Chai
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924622f5e5
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Issue 1248 - fix bug bintoi_charvec()
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2023-07-15 17:46:43 -07:00 |
tangxifan
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091ac88c7e
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[lib] code format
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2023-07-14 12:16:40 -07:00 |
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tangxifan
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3bc959dcec
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[lib] create tile config lib and start integration to core
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2023-07-14 12:13:31 -07:00 |
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tangxifan
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d0831507c0
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[lib] format fabric key writer
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2023-07-06 19:21:45 -07:00 |
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tangxifan
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85f9899588
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[lib] fixed some bugs and now fabric key io is working
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2023-07-06 16:30:36 -07:00 |
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tangxifan
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74e776f3b0
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[lib] syntax errors and now fabric key is under the namespace of openfpga
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2023-07-06 11:57:22 -07:00 |
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tangxifan
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6c623d60f9
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[lib] code format
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2023-07-06 11:16:36 -07:00 |
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tangxifan
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82a60d64e3
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[lib] add api to fabric key
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2023-07-05 23:53:16 -07:00 |
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tangxifan
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ed25cf0dc4
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[lib] developing sub key io and APIs
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2023-07-05 21:18:33 -07:00 |
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tangxifan
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c2020d6cef
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[lib] now use constants in xml io for fabric key
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2023-07-04 21:04:21 -07:00 |
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tangxifan
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93158bdc62
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[lib] adding subkey feature
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2023-07-03 15:53:22 -07:00 |
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tangxifan
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1b9aeab2a7
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[lib] reorganize the source files of libfabrickey
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2023-07-03 15:02:23 -07:00 |
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tangxifan
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83fa6a421e
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[core] code format
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2023-06-26 10:06:17 -07:00 |
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tangxifan
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70f40cd21a
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[core] fixing bugs in the preconfig module when supporting dut module of fpga_core
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2023-06-26 10:03:19 -07:00 |
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tangxifan
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987a562e0f
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[core] fixed the bug when checking mapping status of fpga core ports
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2023-06-23 17:21:52 -07:00 |
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tangxifan
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b30148f8fb
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[core] apply more sanity checks on top module port
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2023-06-23 12:37:46 -07:00 |
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tangxifan
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d9f271eaed
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[lib] fixed a bug where constant string is not initialized
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2023-06-23 11:18:36 -07:00 |
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tangxifan
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8bd9ae02fd
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[core] io name map now supports dummy port direction
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2023-06-23 11:09:33 -07:00 |
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tangxifan
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0811409c4f
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[lib] support dummy port direction in IoNameMap io
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2023-06-22 23:20:22 -07:00 |
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tangxifan
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7961223eac
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[core] enabling io naming rules in fabric builder
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2023-06-22 22:18:09 -07:00 |
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tangxifan
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4d265c3965
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[lib] reworked io name map data structure. Passed I/O test
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2023-06-22 17:44:07 -07:00 |
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tangxifan
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a628a1e7b0
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[lib] add missing file
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2023-06-21 23:02:43 -07:00 |
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tangxifan
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b8d89d2a5c
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[lib] code format
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2023-06-21 22:51:38 -07:00 |
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tangxifan
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227d147dca
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[lib] add an example file
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2023-06-21 22:51:15 -07:00 |
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tangxifan
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77b082ab55
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[src] debugging
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2023-06-21 22:50:37 -07:00 |
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tangxifan
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f3c07d6138
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[lib] finish the io for io naming rules
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2023-06-21 21:48:52 -07:00 |
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tangxifan
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2ed86d1897
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[lib] developing io for io naming rule
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2023-06-21 18:08:45 -07:00 |
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tangxifan
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b42677aa9d
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[lib] developing the io name mapping data structure
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2023-06-21 17:33:40 -07:00 |
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tangxifan
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c7ade72200
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[core] code complete for the core wrapper creator. Start debugging
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2023-06-18 19:17:42 -07:00 |
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tangxifan
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e20ac5f272
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[core] fixed a bug which cause configuration protocols other than ccff failed
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2023-04-24 22:46:46 +08:00 |
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tangxifan
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18b078d1d5
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[core] fixed bugs which cause ci failed
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2023-04-24 21:20:07 +08:00 |
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tangxifan
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667d9df028
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[core] developing testbench generator for ccff v2
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2023-04-24 11:36:21 +08:00 |
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tangxifan
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ba90f5020b
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[core] fixed some bugs which cause netlist generation failed
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2023-04-23 16:48:14 +08:00 |
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tangxifan
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28b7a12f68
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[core] code format
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2023-04-23 14:31:35 +08:00 |
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tangxifan
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bd511ba515
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[core] fixed syntax errors
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2023-04-23 14:26:08 +08:00 |
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tangxifan
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592765af48
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[core] code complete for upgrading netlist generator w.r.t. ccff v2
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2023-04-23 13:57:37 +08:00 |
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tangxifan
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5500b9a289
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[core] upgrading netlist generator
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2023-04-22 16:27:27 +08:00 |
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tangxifan
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ea8ae29b53
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[core] code format
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2023-04-22 15:12:38 +08:00 |
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tangxifan
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297a23dee7
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[core] fixed syntax errors
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2023-04-22 15:09:39 +08:00 |
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tangxifan
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5e8e982334
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[core] finished developing checkers
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2023-04-22 12:44:34 +08:00 |
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tangxifan
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dba449f42a
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[core] code complete for parsers
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2023-04-21 23:45:35 +08:00 |
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tangxifan
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6e44f3f5fc
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[core] developing ccff_v2 parsers
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2023-04-21 17:01:51 +08:00 |
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tangxifan
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953625b1ca
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[core] format
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2023-03-05 22:32:05 -08:00 |
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tangxifan
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de1e300ec7
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[core] now resize rr_node for clock graph is working
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2023-03-05 22:21:55 -08:00 |
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tangxifan
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81e9187aac
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[core] debugging
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2023-03-03 22:55:14 -08:00 |
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tangxifan
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4423d917fa
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[core] debugging
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2023-03-03 18:00:43 -08:00 |
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tangxifan
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29ee6e7136
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[core] debugging
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2023-03-03 17:33:53 -08:00 |
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tangxifan
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98d8c75d86
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[code] format
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2023-03-02 21:36:08 -08:00 |
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tangxifan
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02b50e3464
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[lib] now clock spine requires explicit definition of track type and direction when coordinate is vague
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2023-03-02 21:33:32 -08:00 |
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tangxifan
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46510388be
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[core] now fabric generator can wire clock ports to routing blocks
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2023-03-02 12:33:26 -08:00 |
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tangxifan
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099d9f32f4
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[core] dev
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2023-03-01 16:08:15 -08:00 |
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tangxifan
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60ff298987
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[lib] add new feature to enable clock tree connection to global ports of tiles
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2023-02-28 22:36:41 -08:00 |
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tangxifan
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2ff8fb8737
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[core] wrapping up clock routing command
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2023-02-28 16:52:54 -08:00 |
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tangxifan
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8d5c21b14d
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[core] code format
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2023-02-27 23:00:15 -08:00 |
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tangxifan
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2735b708d3
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[core] reworked the tapping XML syntax
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2023-02-27 22:59:44 -08:00 |
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tangxifan
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ff69664c14
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[core] syntax
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2023-02-27 22:39:12 -08:00 |
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tangxifan
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d4e19edc71
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[core] finishing up clock rr_graph appending
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2023-02-27 22:31:16 -08:00 |
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tangxifan
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9f20d2e639
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[lib] now clock arch supports tap points
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2023-02-27 22:06:13 -08:00 |
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tangxifan
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3a40c5e15f
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[lib] update example of clock arch definition
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2023-02-27 21:49:14 -08:00 |
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tangxifan
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7d0c23c675
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[lib] new api for lowest level clock connections
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2023-02-27 15:16:23 -08:00 |
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tangxifan
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b3dec93eb9
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[core] code format
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2023-02-27 15:12:59 -08:00 |
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tangxifan
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9ec4d690db
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[core] clock edges interconnecting clock tracks across levels
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2023-02-27 15:10:36 -08:00 |
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tangxifan
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b6eace8fac
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[core] now switch id is linked in clock network
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2023-02-27 13:10:54 -08:00 |
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tangxifan
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009d711ba5
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[core] code format
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2023-02-26 22:23:41 -08:00 |
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tangxifan
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87a9146082
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[core] adding rr spatial lookup for clock nodes only
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2023-02-26 22:23:17 -08:00 |
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tangxifan
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db36f87dfa
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[core] enhance clock tree arch validation
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2023-02-26 18:39:53 -08:00 |
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tangxifan
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780fc0f26d
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[core] developing validators and annotate rr_segment for clock arch
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2023-02-26 18:03:55 -08:00 |
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tangxifan
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75773ddd4e
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[code] format
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2023-02-26 12:46:29 -08:00 |
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tangxifan
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3db5acfb37
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[core] dev
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2023-02-26 12:40:13 -08:00 |
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tangxifan
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8f0d94ba73
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[code] format
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2023-02-25 22:43:21 -08:00 |
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tangxifan
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0b33650761
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[core] dev
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2023-02-25 22:41:33 -08:00 |
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tangxifan
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7f07a9d031
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[lib] add default seg/switch to clock arch. Fixed syntax
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2023-02-24 19:15:39 -08:00 |
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tangxifan
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65b27a3377
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[lib] fixed a few bugs
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2023-02-22 21:29:18 -08:00 |
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tangxifan
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40f6b5a3fe
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[lib] fixed a few bugs
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2023-02-22 21:23:08 -08:00 |
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tangxifan
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a9d5e4dfbd
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[lib] update example clock arch xml
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2023-02-22 21:18:00 -08:00 |
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tangxifan
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d1133000ba
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[lib] code format
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2023-02-22 21:03:04 -08:00 |
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tangxifan
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aafd1e6fb3
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[lib] syntax
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2023-02-22 21:02:35 -08:00 |
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tangxifan
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b2ef1db5f4
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[lib] finishing up code changes; start debugging
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2023-02-22 20:46:18 -08:00 |
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tangxifan
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1c8a5eb098
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[lib] adding linker
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2023-02-22 20:29:32 -08:00 |
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tangxifan
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bf2876c60e
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[lib] developing linker
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2023-02-22 18:36:22 -08:00 |
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tangxifan
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ce20a16aad
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[lib] adding unit test
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2023-02-22 18:26:18 -08:00 |
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tangxifan
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b37deb4b02
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[lib] adding writer
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2023-02-22 18:21:28 -08:00 |
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tangxifan
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5cd310c4cc
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[lib] adding missing apis
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2023-02-22 15:04:52 -08:00 |
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tangxifan
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7bc843b74a
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[lib] developing xml parser for clk arch
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2023-02-22 13:23:09 -08:00 |
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tangxifan
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25e43b47da
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[lib] first round of data structure on clock arch
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2023-02-22 12:18:44 -08:00 |
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tangxifan
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9eb2374bc6
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[lib] developing
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2023-02-21 22:29:25 -08:00 |
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tangxifan
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fe594acab1
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[lib] adding clock network data structure
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2023-02-21 16:53:05 -08:00 |
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tangxifan
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e7fc065032
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[lib] start developing clock arch data structure and I/O
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2023-02-21 15:06:35 -08:00 |
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tangxifan
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ac8c0e243c
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[core] code format
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2023-01-15 12:13:59 -08:00 |
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tangxifan
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cab7e04901
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[core] fixed a bug in repacker to avoid routing constrained nets
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2023-01-15 12:13:12 -08:00 |
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tangxifan
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ff0a4dfccb
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[lib] format
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2023-01-08 22:41:07 -08:00 |
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tangxifan
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aec592b27e
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[lib] now shell forbids to call any hidden commands from interactive mode or script mode
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2023-01-08 22:34:35 -08:00 |
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tangxifan
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da7153f031
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[lib] typo which causes shell show hidden commands mistakenly
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2023-01-08 21:43:35 -08:00 |
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tangxifan
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b569d6b603
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[core] format
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2023-01-07 11:40:17 -08:00 |
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tangxifan
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d2632b17cd
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[lib] bug
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2023-01-07 11:39:26 -08:00 |
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tangxifan
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c7a4d25e35
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[core] now all the commands can be optionally hidden
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2023-01-07 11:36:10 -08:00 |
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tangxifan
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7028c1ec72
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[lib] now openfpga shell supports a new type of executive functions
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2023-01-07 11:17:02 -08:00 |
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tangxifan
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77b64a21d4
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[lib] format
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2023-01-02 12:41:24 -08:00 |
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tangxifan
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994402ec9a
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[engine] move shell cmd split function to openfpga tokenizer
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2023-01-02 12:38:16 -08:00 |
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tangxifan
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faff254808
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[lib] now command line supports pairs of "" where users can define a long string with spaces inside
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2023-01-01 11:56:58 -08:00 |