[core] enhance clock tree arch validation
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@ -381,6 +381,18 @@ bool ClockNetwork::validate_tree() const {
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spine_end_point(spine_id).y());
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return false;
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}
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/* parent spine and child spine should be in different track type */
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ClockSpineId parent_spine = spine_parents_[spine_id];
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if (valid_spine_id(parent_spine)) {
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if (spine_track_type(spine_id) == spine_track_type(parent_spine)) {
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VTR_LOG_ERROR(
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"Spine '%s' and its parent '%s' are in the same track type (both "
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"horizental or vertical). Expect they are othorgonal (one "
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"horizental and one vertical)!\n",
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spine_name(spine_id).c_str(), spine_name(parent_spine).c_str());
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return false;
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}
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}
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}
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}
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return true;
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@ -106,7 +106,9 @@ static void add_rr_graph_block_clock_nodes(RRGraphBuilder& rr_graph_builder,
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rr_graph_builder.set_node_direction(clk_node, node_dir);
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rr_graph_builder.set_node_capacity(clk_node, 1);
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/* set cost_index using segment id */
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rr_graph_builder.set_node_cost_index(clk_node, RRIndexedDataId(cost_index_offset + size_t(clk_ntwk.default_segment())));
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rr_graph_builder.set_node_cost_index(
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clk_node, RRIndexedDataId(cost_index_offset +
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size_t(clk_ntwk.default_segment())));
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/* FIXME: need to set rc_index and cost_index when building the graph
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* in VTR */
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/* TODO: register the node to a dedicated lookup for clock nodes only
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@ -141,7 +143,8 @@ static void add_rr_graph_clock_nodes(RRGraphBuilder& rr_graph_builder,
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continue;
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}
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add_rr_graph_block_clock_nodes(rr_graph_builder, rr_graph_view, clk_ntwk,
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chanx_coord, CHANX, CHANX_COST_INDEX_START);
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chanx_coord, CHANX,
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CHANX_COST_INDEX_START);
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}
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}
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@ -155,8 +158,9 @@ static void add_rr_graph_clock_nodes(RRGraphBuilder& rr_graph_builder,
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(false == is_chany_exist(grids, chany_coord))) {
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continue;
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}
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add_rr_graph_block_clock_nodes(rr_graph_builder, rr_graph_view, clk_ntwk,
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chany_coord, CHANY, CHANX_COST_INDEX_START + rr_graph_view.num_rr_segments());
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add_rr_graph_block_clock_nodes(
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rr_graph_builder, rr_graph_view, clk_ntwk, chany_coord, CHANY,
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CHANX_COST_INDEX_START + rr_graph_view.num_rr_segments());
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}
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}
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}
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